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1. 发明授权

US08527691B2 Nonvolatile memory device and nonvolatile memory system with fast boot capability 有权
标题翻译：非易失性存储器件和具有快速启动能力的非易失性存储器系统
公开(公告)号：US08527691B2
公开(公告)日：2013-09-03
申请号：US12665064
申请日：2008-07-30
申请人： Toshiyuki Honda , Masayuki Toyama , Masahiro Nakanishi
发明人： Toshiyuki Honda , Masayuki Toyama , Masahiro Nakanishi
IPC分类号： G06F13/00
CPC分类号： G06F9/4403 , G06F12/0246 , G06F2212/7201
摘要： A nonvolatile storage device includes a controller and a nonvolatile memory. The controller has: a logical-physical address conversion part for converting a logical address designated by a host device into a physical address; and a boot code address conversion part for converting boot code address information designated by the host device into a physical address. After the power-on and before the logical-physical address conversion part becomes usable, a boot code is read from a part of region which can be accessed by designating a logical address from the host device by designating the boot code address information from the outside. Thus, it is possible to rapidly start the nonvolatile memory system after the power-on. In the state where the logical-physical address conversion part can be used, data-reading and data-writing are carried out by designating a logical address from the host device.
摘要翻译：非易失性存储装置包括控制器和非易失性存储器。控制器具有：逻辑 - 物理地址转换部分，用于将由主机设备指定的逻辑地址转换成物理地址; 以及引导代码地址转换部分，用于将由主机设备指定的引导代码地址信息转换为物理地址。在上电之后并且在逻辑 - 物理地址转换部分变得可用之前，通过从外部指定引导代码地址信息从主机设备指定逻辑地址可以访问的区域的一部分读取引导代码。因此，可以在通电之后快速启动非易失性存储器系统。在可以使用逻辑 - 物理地址转换部分的状态下，通过从主机设备指定逻辑地址来执行数据读取和数据写入。

2. 发明授权

US08161225B2 Semiconductor memory card, access device and method 有权
标题翻译：半导体存储卡，接入设备和方法
公开(公告)号：US08161225B2
公开(公告)日：2012-04-17
申请号：US10567241
申请日：2004-08-03
申请人： Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue , Makoto Ochi
发明人： Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue , Makoto Ochi
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F3/0659 , G06F3/061 , G06F3/0632 , G06F3/0679
摘要： A card information-storing portion is provided in a semiconductor memory card, and information relating to access performance such as access condition and access rate is held in the storing portion. Further, an access device acquires the held information from the semiconductor memory card to make it possible that the information can be used for control of a file system. This optimizes processing of the access device and the semiconductor memory card independent of differences in characteristics of semiconductor memory cards and management methods used, realizing high-rate access from the access device to a semiconductor memory card.
摘要翻译：在半导体存储卡中设置有卡片信息存储部分，并且存储与存取条件和访问速率有关的访问性能的信息被保存在存储部分中。此外，访问装置从半导体存储卡获取保持的信息，使得该信息可以用于文件系统的控制。这优化了访问设备和半导体存储卡的处理，而与半导体存储卡的特性差异以及使用的管理方法无关，实现了从访问设备到半导体存储卡的高速率访问。

3. 发明申请

US20110246188A1 NONVOLATILE STORAGE SYSTEM AND MUSIC SOUND GENERATION SYSTEM 审中-公开
标题翻译：非挥发性存储系统和音乐声音发生系统
公开(公告)号：US20110246188A1
公开(公告)日：2011-10-06
申请号：US13124704
申请日：2010-05-26
申请人： Masahiro Nakanishi
发明人： Masahiro Nakanishi
IPC分类号： G10L11/04 , G06F12/00
CPC分类号： G10H7/02 , G10H1/183 , G10H2250/621
摘要： A music sound generation system is formed with a high sound quality and with a small size using a large-capacity NAND flash memory for storing music sound data. Music sound data is divided into N pitch groups and stored into N different storage modules as being divided in these storage modules. A sound generation command classification unit (3000) classifies sound generation commands provided from an external unit into N sound generation command groups. A read command unit in each access module reads data from a storage module based on the sound generation command group. This structure enables music sound data to be read from a plurality of storage modules in parallel. When used in a system that cannot predict the pitch of music sound data for which a read command is transmitted, such as a music sound generation system, this structure enables a plurality of pieces of data to be read from a plurality of storage modules in parallel, and shortens the sound generation delay time to fall within its a permissible range.
摘要翻译：使用大容量NAND闪存存储音乐声音数据，形成具有高音质和小尺寸的音乐声音生成系统。音乐声音数据分为N个音调组，并存储在N个不同的存储模块中，分为这些存储模块。声音生成命令分类单元（3000）将从外部单元提供的声音生成命令分类为N个声音生成命令组。每个访问模块中的读命令单元基于声音生成命令组从存储模块读取数据。该结构使音乐声音数据能够从多个存储模块并行读取。当用于不能预测诸如音乐声音生成系统的诸如音乐声音生成系统之类的读取命令的音乐声音数据的音调的系统中时，该结构使得能够并行地从多个存储模块读取多条数据并且将声音产生延迟时间缩短到其允许范围内。

4. 发明申请

US20110125928A1 HOST DEVICE, STORAGE DEVICE, AND METHOD FOR ACCESSING STORAGE DEVICE 审中-公开
标题翻译：主机设备，存储设备和用于访问存储设备的方法
公开(公告)号：US20110125928A1
公开(公告)日：2011-05-26
申请号：US13014875
申请日：2011-01-27
申请人： Masayuki TOYAMA , Takuji MAEDA , Tomoaki IZUMI , Shouichi TSUJITA , Masahiro NAKANISHI , Shinji INOUE
发明人： Masayuki TOYAMA , Takuji MAEDA , Tomoaki IZUMI , Shouichi TSUJITA , Masahiro NAKANISHI , Shinji INOUE
IPC分类号： G06F3/01
CPC分类号： G06F3/0659 , G06F3/0619 , G06F3/0679
摘要： A host device is connected to a storage device via a bus and reads and writes data in the storage device. The host device includes a command transmitter that sequentially transmits a command in a command sequence, which includes a set of commands which do not change data stored in the storage device, and a response receptor that accepts a response from the storage device for each command transmission from the command transmitter and determines whether or not an error exists. An acceptable/unacceptable access determiner provided in the host device enables access to the storage device when a normal response is identified by the response receptor and otherwise determines that access to the storage device is unacceptable. The normal response is when the responses received from the storage device for the transmissions of all commands in the command sequence do not include an error.
摘要翻译：主机通过总线连接到存储设备，并在存储设备中读取和写入数据。主机装置包括命令发送器，其顺序地发送命令序列中的命令，该命令序列包括不改变存储在存储装置中的数据的一组命令，以及响应接收器，用于接收来自存储装置的每个命令传输的响应从命令发送器确定是否存在错误。在主机设备中提供的可接受/不能接受的访问确定器使得能够在响应受体识别出正常响应时访问存储设备，并且另外确定对存储设备的访问是不可接受的。正常响应是当从存储设备接收的用于命令序列中的所有命令的传输的响应不包括错误。

5. 发明授权

US07921340B2 Nonvolatile memory device, nonvolatile memory system, and defect management method for nonvolatile memory device 有权
标题翻译：非易失性存储器件，非易失性存储器系统以及用于非易失性存储器件的缺陷管理方法
公开(公告)号：US07921340B2
公开(公告)日：2011-04-05
申请号：US12160972
申请日：2006-11-30
申请人： Masahiro Nakanishi
发明人： Masahiro Nakanishi
IPC分类号： G11C29/00
CPC分类号： G06F11/008 , G11C16/349
摘要： A life parameter generator generates life parameters related to the life of a nonvolatile memory device by using parameters related to allowable capacity for memory defect and occurrence capacity for memory defect. The life parameters are stored in a life parameter storing block of a nonvolatile memory. An access device reads and displays the stored life parameters. Thus, the user can precisely know the life of the nonvolatile memory device or the moment when a device having a built in nonvolatile memory such as a portable audio becomes unusable.
摘要翻译：寿命参数发生器通过使用与存储器缺陷的容许容量相关的参数和存储器缺陷的发生容量来产生与非易失性存储器件的寿命相关的寿命参数。寿命参数存储在非易失性存储器的寿命参数存储块中。访问设备读取并显示存储的生命参数。因此，用户可以精确地知道非易失性存储器件的寿命，或者具有诸如便携式音频的内置非易失性存储器的器件变得不可用的时刻。

6. 发明授权

US07900007B2 Host device, storage device, and method for accessing storage device 有权
标题翻译：主机设备，存储设备和访问存储设备的方法
公开(公告)号：US07900007B2
公开(公告)日：2011-03-01
申请号：US11571592
申请日：2005-06-28
申请人： Masayuki Toyama , Takuji Maeda , Tomoaki Izumi , Shouichi Tsujita , Masahiro Nakanishi , Shinji Inoue
发明人： Masayuki Toyama , Takuji Maeda , Tomoaki Izumi , Shouichi Tsujita , Masahiro Nakanishi , Shinji Inoue
IPC分类号： G06F13/14
CPC分类号： G06F3/0659 , G06F3/0619 , G06F3/0679
摘要： A host device transmits a command from a command transmission unit (101a) along a predetermined command sequence. A storage device (2) receives the command in a command reception unit (202a). An access determination unit (202c) determines the sequence of the command transmitted from the host device (1) and determines that reception of the access to the host device (1) is enabled only when the sequence is identical with a predetermined sequence. Thus, with simple control, it is possible to prevent data destruction by a host device of an old version.
摘要翻译：主机设备沿着预定的命令序列从命令发送单元（101a）发送命令。存储装置（2）在命令接收部（202a）中接收命令。访问确定单元（202c）确定从主机设备（1）发送的命令的顺序，并且确定只有当序列与预定序列相同时，对主机设备（1）的访问的接收才被使能。因此，通过简单的控制，可以防止主机装置破坏老版本的数据。

7. 发明授权

US07849382B2 Memory control circuit, nonvolatile storage apparatus, and memory control method 有权
标题翻译：存储器控制电路，非易失性存储装置和存储器控制方法
公开(公告)号：US07849382B2
公开(公告)日：2010-12-07
申请号：US11568564
申请日：2005-05-12
申请人： Tetsushi Kasahara , Tomoaki Izumi , Masahiro Nakanishi , Kazuaki Tamura , Kiminori Matsuno , Yoshihisa Inagaki , Manabu Inoue
发明人： Tetsushi Kasahara , Tomoaki Izumi , Masahiro Nakanishi , Kazuaki Tamura , Kiminori Matsuno , Yoshihisa Inagaki , Manabu Inoue
IPC分类号： G11C29/00
CPC分类号： G11C16/10 , G06F11/1068
摘要： An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.
摘要翻译：发生写入错误的地址被保持，并且在一系列写入完成之后，读取保持的地址的数据。然后，仅对于确定需要重写写入的地址执行错误块处理，从而防止错误块的增加。这可以抑制在特定闪速存储器中执行写入时经常发生写入错误并发生大量错误块的问题。

8. 发明申请

US20100223510A1 NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY SYSTEM, AND DEFECT MANAGEMENT METHOD FOR NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件，非易失性存储器系统和非易失性存储器件的缺陷管理方法
公开(公告)号：US20100223510A1
公开(公告)日：2010-09-02
申请号：US12160972
申请日：2006-11-30
申请人： Masahiro Nakanishi
发明人： Masahiro Nakanishi
IPC分类号： G11C29/08 , G06F1/26
CPC分类号： G06F11/008 , G11C16/349
摘要： A life parameter generator generates life parameters related to the life of a nonvolatile memory device by using parameters related to allowable capacity for memory defect and occurrence capacity for memory defect. The life parameters are stored in a life parameter storing block of a nonvolatile memory. An access device reads and displays the stored life parameters. Thus, the user can precisely know the life of the nonvolatile memory device or the moment when a device having a built in nonvolatile memory such as a portable audio becomes unusable.
摘要翻译：寿命参数发生器通过使用与存储器缺陷的容许容量相关的参数和存储器缺陷的发生容量来产生与非易失性存储器件的寿命相关的寿命参数。寿命参数存储在非易失性存储器的寿命参数存储块中。访问设备读取并显示存储的生命参数。因此，用户可以精确地知道非易失性存储器件的寿命，或者具有诸如便携式音频的内置非易失性存储器的器件变得不可用的时刻。

9. 发明授权

US07702846B2 Memory controller, nonvolatile storage device, nonvolatile storage system, and data writing method 有权
标题翻译：内存控制器，非易失性存储设备，非易失性存储系统和数据写入方式
公开(公告)号：US07702846B2
公开(公告)日：2010-04-20
申请号：US11908715
申请日：2006-03-09
申请人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Yutaka Nakamura , Masayuki Toyama , Yasushi Goho , Syunichi Iwanari , Yoshihisa Kato , Manabu Inoue
发明人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Yutaka Nakamura , Masayuki Toyama , Yasushi Goho , Syunichi Iwanari , Yoshihisa Kato , Manabu Inoue
IPC分类号： G06F12/12
CPC分类号： G06F3/0656 , G06F3/0613 , G06F3/0619 , G06F3/0643 , G06F3/0679 , G06F12/0246 , G06F2212/1016 , G06F2212/7203
摘要： A nonvolatile storage device is provided with a nonvolatile main storage memory whose erase size is larger than a cluster size, and a buffer, i.e. a nonvolatile auxiliary storage memory. At the time of writing data in the memory, the data is temporarily stored in the buffer, then, a plurality of data in the buffer are collectively taken out to be stored in the main storage memory. Data in an original block is saved in a write block in the main storage memory. Thus, the data can be written in the main storage memory at a high speed.
摘要翻译：非易失性存储装置具有擦除大小大于簇大小的非易失性主存储存储器和缓冲器，即非易失性辅助存储存储器。在将数据写入存储器时，将数据临时存储在缓冲器中，然后将缓冲器中的多个数据共同取出以存储在主存储器中。原始块中的数据保存在主存储器中的写入块中。因此，可以高速地将数据写入主存储存储器。

10. 发明授权

US07654466B2 Semiconductor memory card, semiconductor memory control apparatus, and semiconductor memory control method 有权
标题翻译：半导体存储卡，半导体存储器控制装置和半导体存储器控制方法
公开(公告)号：US07654466B2
公开(公告)日：2010-02-02
申请号：US10553725
申请日：2004-09-13
申请人： Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue
发明人： Takuji Maeda , Shinji Inoue , Yoshiho Gotoh , Jun Ohara , Masahiro Nakanishi , Shoichi Tsujita , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Koichi Horiuchi , Manabu Inoue
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F3/0611 , G06F3/0625 , G06F3/0658 , G06F3/0659 , G06F3/0688 , Y02D10/154
摘要： A host information memory is provided in a semiconductor memory card and a data write start address and a data size supplied by an access unit are stored. A free physical area generation section determines whether or not to perform erasing of an invalid block of a nonvolatile memory when writing of data based on the data write start address and data size, and determines the number of blocks to be erased. When erasing, writing of data and erasing of invalid blocks are simultaneously performed with respect to different memory chips. Erase process of data, herewith, can be optimized and high speed access from the access unit to a semiconductor memory card can be realized.
摘要翻译：在半导体存储卡中提供主机信息存储器，并且存储由访问单元提供的数据写入起始地址和数据大小。空闲物理区域生成部分基于数据写入开始地址和数据大小来确定在写入数据时是否执行非易失性存储器的无效块的擦除，并且确定要擦除的块的数量。当擦除时，相对于不同的存储器芯片同时执行数据的写入和无效块的擦除。可以优化数据的擦除处理，并且可以实现从存取单元到半导体存储卡的高速访问。

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