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    • 1. 发明申请
    • RECEIVER CIRCUIT AND FILTERING METHOD USED THEREIN
    • 接收电路及其使用的滤波方法
    • US20140029707A1
    • 2014-01-30
    • US14008614
    • 2012-03-28
    • Masaki Kitsunezuka
    • Masaki Kitsunezuka
    • H04L27/148
    • H04L27/148H04B1/28
    • A receiver circuit includes a first mixer that performs frequency conversion on a first signal of containing a first frequency entered from outside to output the resulting frequency-converted first signal, and a first selector that selects one out of an output signal of the first mixer and a second signal containing a second frequency entered from outside. A filter removes a pre-set frequency band of the signal selected by the first selector, and a second selector that selects between outputting the signal removed of the frequency band to outside and outputting the signal to a subsequent side circuit. A second mixer performs frequency conversion of the signal output from the second selector to output the resulting frequency-converted signal. The second mixer is the subsequent side circuit. The second frequency has a carrier frequency of a radio signal.
    • 一种接收机电路包括:第一混频器,对包含从外部输入的第一频率的第一信号执行频率转换,以输出所得到的经频率转换的第一信号;以及第一选择器,从第一混频器的输出信号中选择一个, 包含从外部输入的第二频率的第二信号。 滤波器去除由第一选择器选择的信号的预置频带,以及第二选择器,其在将去除频带的信号输出到外部之间进行选择,并将信号输出到后续侧电路。 第二混频器对从第二选择器输出的信号进行频率转换,以输出所得到的频率转换信号。 第二混频器是随后的侧电路。 第二频率具有无线电信号的载波频率。
    • 4. 发明申请
    • MIXER CIRCUIT AND VARIATION SUPPRESSING METHOD
    • 混合电路和变量抑制方法
    • US20130015901A1
    • 2013-01-17
    • US13508513
    • 2010-10-22
    • Masaki Kitsunezuka
    • Masaki Kitsunezuka
    • G06G7/16H03K5/00
    • H03D7/165H03D7/1441H03D7/1458H03D7/1483
    • In a mixer circuit that solves the problem of the extreme increase in circuit complexity that accompanies compensating for amplitude errors and phase errors, a voltage current conversion unit (11) converts an RF signal, which is a voltage signal, to a current signal and supplies the current signal. An RF path selection unit (12) connects its input terminal to any of its output terminals in accordance with the state of a four-phase clock signal and separately supplies, from its output terminals, a plurality of IF signals obtained by multiplying the RF signal by clock signals in the four-phase clock signal. An IF path selection unit (13) switches the connection relationship between its input terminals and its output terminals in accordance with a selection signal (S) and supplies the IF signal input to each of its input terminals from its output terminals that are connected to the input terminals.
    • 在解决伴随补偿振幅误差和相位误差的电路复杂度极度增加的问题的混频器电路中,电压电流转换单元(11)将作为电压信号的RF信号转换为电流信号并提供 当前信号。 RF路径选择单元(12)根据四相时钟信号的状态将其输入端子连接到其输出端子,并从其输出端分别提供通过将RF信号 通过四相时钟信号中的时钟信号。 IF路径选择单元(13)根据选择信号(S)切换其输入端子与其输出端子之间的连接关系,并将其输入的每个输入端子的IF信号从连接到其的输出端子 输入端子。
    • 7. 发明授权
    • Quadrature mixer
    • 正交搅拌机
    • US08521112B2
    • 2013-08-27
    • US13382143
    • 2010-06-23
    • Masaki KitsunezukaTakashi Tokairin
    • Masaki KitsunezukaTakashi Tokairin
    • H04B1/16
    • H03D7/1441H03D7/1458H03D7/165
    • This invention provides an quadrature mixer which does not require a long time to adjust the amplitude value at the time of demodulation of the IQ signal. The quadrature mixer, comprising a first frequency-conversion unit that outputs a sixth signal derived by multiplying a first signal by a second and a fourth signals, a second frequency-conversion unit that outputs a seventh signal derived by multiplying the first signal by a third and a fifth signals, a first amplitude adjustment unit that outputs a eighth signal derived by multiplying the sixth signal by the third and fifth signals and a second amplitude adjustment unit that outputs a ninth signal derived by multiplying the seventh signal by the second and fifth signals.
    • 本发明提供一种正交混频器,其不需要很长时间来调整IQ信号解调时的振幅值。 正交混频器,包括:第一频率转换单元,输出通过将第一信号乘以第二和第四信号而导出的第六信号;第二频率转换单元,输出通过将第一信号乘以第三信号而导出的第七信号 和第五信号,第一幅度调整单元,输出通过将第六信号乘以第三和第五信号而导出的第八信号;以及第二幅度调整单元,其输出通过将第七信号乘以第二和第五信号而导出的第九信号 。
    • 8. 发明申请
    • SIGNAL PROCESSING CIRCUIT, SIGNAL PROCESSING METHOD AND CONTROL PROGRAM RECORDING MEDIUM
    • 信号处理电路,信号处理方法和控制程序记录介质
    • US20130165063A1
    • 2013-06-27
    • US13822044
    • 2011-08-18
    • Masaki Kitsunezuka
    • Masaki Kitsunezuka
    • G06F7/523
    • H03D7/1441H03D7/1458H03D7/163
    • In order to provide a means for solving a problem that it provides a signal processing circuit with small circuit area and low power consumption, a signal processing circuit includes the first multiplying means which multiplies the first signal including the first frequency component by the second signal including the second frequency component and thereby outputs the third signal, the second multiplying means which multiplies the first signal by the fourth signal of the second frequency whose phase is lagging equals to the first phase difference relative to the second signal and thereby outputs the fifth signal, the third multiplying means which multiplies the first signal by the sixth signal of the second frequency whose phase is lagging equals to the second phase difference relative to the second signal and thereby outputs the seventh signal, the first adding means which adds the third signal with the first weight, the fifth signal with the second weight and the seventh signal with the third weight respectively and a signal generating means which controls the first phase difference and the second phase difference based on a control signal and thereby outputs the second signal, the fourth signal and the sixth signal.
    • 为了提供一种解决提供具有小电路面积和低功耗的信号处理电路的问题的手段,信号处理电路包括第一乘法装置,其将包括第一频率分量的第一信号乘以第二信号,包括 第二频率分量,从而输出第三信号,第二乘法装置将相位滞后的第二频率的第四信号乘以相对于第二信号的第一相位差,从而输出第五信号, 所述第三乘法装置将所述第一信号乘以相位滞后的第二频率的第六信号相对于所述第二信号等于所述第二相位差,从而输出所述第七信号,所述第一加法装置将所述第三信号与 第一个权重,第五个信号与第二个权重和第七个信号 第三权重和信号发生装置,其基于控制信号控制第一相位差和第二相位差,从而输出第二信号,第四信号和第六信号。