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1. 发明申请

US20130212550A1 Thermal Relief Automation 失效
标题翻译：散热自动化
公开(公告)号：US20130212550A1
公开(公告)日：2013-08-15
申请号：US13397474
申请日：2012-02-15
申请人： Michael Anthony Christo , Julio Alejandro Maldonado , Samuel Wynne Yang
发明人： Michael Anthony Christo , Julio Alejandro Maldonado , Samuel Wynne Yang
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F2217/80
摘要： An approach is provided in which a dynamic thermal relief generator retrieves a circuit board file that identifies power plane thru pin locations and a power plane layer. The dynamic thermal relief generator selects one of the power plane thru pin locations and identifies one or more electrical properties corresponding to a component assigned to the selected power plane thru pin location. As such, the dynamic thermal relief generator computes a conductive material exclusion amount based upon the identified electrical properties, which indicates an amount of area to exclude conductive material on the selected power plane layer. In turn, the dynamic thermal relief generator creates a thermal relief pattern based upon the computed conductive material exclusion amount that identifies conductive material voids on the selected power plane layer to exclude the substantially conductive material.
摘要翻译：提供了一种方法，其中动态热释放发生器检索通过引脚位置识别电力平面的电路板文件和功率平面层。动态热释放发生器通过引脚位置选择电源平面中的一个，并且识别与通过引脚位置分配给所选择的电源平面的部件相对应的一个或多个电气特性。因此，动态热释放发生器基于所识别的电特性来计算导电材料排除量，其指示在所选择的功率平面层上排除导电材料的面积的量。反过来，动态热释放发生器基于计算的导电材料排除量产生热释放图案，其识别所选功率平面层上的导电材料空隙以排除基本上导电的材料。

2. 发明授权

US07863106B2 Silicon interposer testing for three dimensional chip stack 有权
标题翻译：硅插入式测试三维芯片堆栈
公开(公告)号：US07863106B2
公开(公告)日：2011-01-04
申请号：US12343678
申请日：2008-12-24
申请人： Michael Anthony Christo , Julio Alejandro Maldonado , Roger Donell Weekly , Tingdong Zhou
发明人： Michael Anthony Christo , Julio Alejandro Maldonado , Roger Donell Weekly , Tingdong Zhou
IPC分类号： H01L21/44 , H01L23/02
CPC分类号： H01L21/6835 , H01L22/14 , H01L23/147 , H01L24/16 , H01L2224/16 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105
摘要： A testing method for a silicon interposer employs a test probe and an electrically conductive glass handler. The silicon interposer includes multiple interconnects that extend between the opposed major surfaces of the interposer, namely from a test side of the interposer to a conductive glass handler side of the interposer. On the glass handler side, the interposer includes a layer of patterned insulative resist with open regions at some interconnects on the glass handler side and remaining resist regions at other interconnects on the glass handler side. The interposer may include a conductive adhesive layer that couples together interconnects at the open regions on the glass handler side. In this manner, a probe may send a test signal from a first interconnect at one location on the test side of the interposer, through the first interconnect, through the conductive adhesive, through a second interconnect to another probe on the test side of the interposer. The method thus provides same-sided probe testing of the interposer. The method also provides for loading or power application to the conductive glass handler and testing of circuits and interconnects on the test side of the silicon interposer.
摘要翻译：硅插入件的测试方法采用测试探针和导电玻璃处理器。硅插入器包括在插入器的相对的主表面之间延伸的多个互连，即从插入件的测试侧到插入件的导电玻璃处理器侧。在玻璃处理机侧，插入件包括一层图案化的绝缘抗蚀剂，其玻璃处理器侧的某些互连处具有开放区域，并且在玻璃处理器侧的其它互连处具有剩余的抗蚀剂区域。插入器可以包括导电粘合剂层，其将玻璃处理器侧上的开放区域处的互连件连接在一起。以这种方式，探针可以通过第一互连通过第一互连通过第二互连通过插入件的测试侧上的另一探针将来自第一互连的测试信号从中间层的测试侧的一个位置发送到另一探针。因此，该方法提供了插入器的相同侧探针测试。该方法还提供了对导电玻璃处理器的负载或功率施加以及在硅插入器的测试侧上的电路和互连的测试。

3. 发明申请

US20100155888A1 SILICON INTERPOSER TESTING FOR THREE DIMENSIONAL CHIP STACK 有权
标题翻译：用于三维芯片堆叠的硅插件测试
公开(公告)号：US20100155888A1
公开(公告)日：2010-06-24
申请号：US12343678
申请日：2008-12-24
申请人： Michael Anthony Christo , Julio Alejandro Maldonado , Roger Donell Weekly , Tingdong Zhou
发明人： Michael Anthony Christo , Julio Alejandro Maldonado , Roger Donell Weekly , Tingdong Zhou
IPC分类号： H01L23/48 , H01L21/66 , H05K7/02
CPC分类号： H01L21/6835 , H01L22/14 , H01L23/147 , H01L24/16 , H01L2224/16 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105
摘要： A testing method for a silicon interposer employs a test probe and an electrically conductive glass handler. The silicon interposer includes multiple interconnects that extend between the opposed major surfaces of the interposer, namely from a test side of the interposer to a conductive glass handler side of the interposer. On the glass handler side, the interposer includes a layer of patterned insulative resist with open regions at some interconnects on the glass handler side and remaining resist regions at other interconnects on the glass handler side. The interposer may include a conductive adhesive layer that couples together interconnects at the open regions on the glass handler side. In this manner, a probe may send a test signal from a first interconnect at one location on the test side of the interposer, through the first interconnect, through the conductive adhesive, through a second interconnect to another probe on the test side of the interposer. The method thus provides same-sided probe testing of the interposer. The method also provides for loading or power application to the conductive glass handler and testing of circuits and interconnects on the test side of the silicon interposer.
摘要翻译：硅插入件的测试方法采用测试探针和导电玻璃处理器。硅插入器包括在插入器的相对的主表面之间延伸的多个互连，即从插入件的测试侧到插入件的导电玻璃处理器侧。在玻璃处理机侧，插入件包括一层图案化的绝缘抗蚀剂，其玻璃处理器侧的某些互连处具有开放区域，并且在玻璃处理器侧的其它互连处具有剩余的抗蚀剂区域。插入器可以包括导电粘合剂层，其将玻璃处理器侧上的开放区域处的互连件连接在一起。以这种方式，探针可以通过第一互连通过第一互连通过第二互连通过插入件的测试侧上的另一探针将来自第一互连的测试信号从中间层的测试侧的一个位置发送到另一探针。因此，该方法提供了插入器的相同侧探针测试。该方法还提供了对导电玻璃处理器的负载或功率施加以及在硅插入器的测试侧上的电路和互连的测试。

4. 发明授权

US08464200B1 Thermal relief optimization 失效
标题翻译：热释放优化
公开(公告)号：US08464200B1
公开(公告)日：2013-06-11
申请号：US13397510
申请日：2012-02-15
申请人： Michael Anthony Christo , Julio Alejandro Maldonado , Samuel Wynne Yang
发明人： Michael Anthony Christo , Julio Alejandro Maldonado , Samuel Wynne Yang
IPC分类号： G06F9/455 , G06F17/50
CPC分类号： G06F17/5068 , G06F2217/80
摘要： An approach is in which a dynamic thermal relief generator retrieves a circuit board file that identifies power plane thru pin locations and a power plane layer. The dynamic thermal relief generator selects one of the power plane thru pin locations and creates a thermal relief pattern that includes thermal relief shapes that identify conductive material voids on a power plane layer to exclude substantially conductive material. The dynamic thermal relief generator determines that one of the conductive material voids affects one or more proximate signal tracks and, in turn, automatically adjusts the thermal relief pattern accordingly.
摘要翻译：一种方法是动态热释放发生器检索通过引脚位置识别电源平面的电路板文件和电源平面层。动态热释放发生器选择功率平面通过引脚位置中的一个，并产生热浮雕图案，其包括热释放形状，其识别功率平面层上的导电材料空隙以排除基本上导电的材料。动态热释放发生器确定导电材料空隙之一影响一个或多个相邻的信号轨道，并且依次自动调整热浮雕图案。

5. 发明授权

US08566773B2 Thermal relief automation 失效
标题翻译：热释放自动化
公开(公告)号：US08566773B2
公开(公告)日：2013-10-22
申请号：US13397474
申请日：2012-02-15
申请人： Michael Anthony Christo , Julio Alejandro Maldonado , Samuel Wynne Yang
发明人： Michael Anthony Christo , Julio Alejandro Maldonado , Samuel Wynne Yang
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F2217/80
摘要： An approach is provided in which a dynamic thermal relief generator retrieves a circuit board file that identifies power plane thru pin locations and a power plane layer. The dynamic thermal relief generator selects one of the power plane thru pin locations and identifies one or more electrical properties corresponding to a component assigned to the selected power plane thru pin location. As such, the dynamic thermal relief generator computes a conductive material exclusion amount based upon the identified electrical properties, which indicates an amount of area to exclude conductive material on the selected power plane layer. In turn, the dynamic thermal relief generator creates a thermal relief pattern based upon the computed conductive material exclusion amount that identifies conductive material voids on the selected power plane layer to exclude the substantially conductive material.
摘要翻译：提供了一种方法，其中动态热释放发生器检索通过引脚位置识别电力平面的电路板文件和功率平面层。动态热释放发生器通过引脚位置选择电源平面中的一个，并且识别与通过引脚位置分配给所选择的电源平面的部件相对应的一个或多个电气特性。因此，动态热释放发生器基于所识别的电特性来计算导电材料排除量，其指示在所选择的功率平面层上排除导电材料的面积的量。反过来，动态热释放发生器基于计算的导电材料排除量产生热释放图案，其识别所选功率平面层上的导电材料空隙以排除基本上导电的材料。

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