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1. 发明授权

US08766889B2 Liquid crystal display and driving method thereof 有权
标题翻译：液晶显示及其驱动方法
公开(公告)号：US08766889B2
公开(公告)日：2014-07-01
申请号：US12056355
申请日：2008-03-27
申请人： Ming-Sheng Lai , Chih-Wei Wang , Hsueh-Ying Huang , Chen-Kuo Yang
发明人： Ming-Sheng Lai , Chih-Wei Wang , Hsueh-Ying Huang , Chen-Kuo Yang
IPC分类号： G09G3/36
CPC分类号： G09G3/3659 , G09G3/3614 , G09G2300/0443 , G09G2300/0447 , G09G2300/0809 , G09G2300/0876 , G09G2310/0281 , G09G2320/028
摘要： A liquid crystal display and a driving method thereof are provided. The liquid crystal display includes a plurality of pixels, a plurality of scan lines, and a plurality of data lines. Each pixel includes a plurality of sub-pixels. Each sub-pixel is coupled to the data line, and includes a switch, a storage capacitor, and a sub-pixel electrode. The switch is coupled to a scan line to receive a scan signal. The switch is turned on by the scan signal to receive a data signal transmitted from the data line. The storage capacitors of the sub-pixels of each pixel are coupled to the scan lines, or the storage capacitor of one of the sub-pixels of each pixel is coupled to a common electrode and the storage capacitors of the other sub-pixels are coupled to the scan lines. The switch and the storage capacitor of each sub-pixel are coupled to different scan lines. The method includes transmitting the scan signal having a plurality of voltage levels to modulate the voltage levels of one or more sub-pixel electrodes of the sub-pixels of the same pixel, thereby enabling the sub-pixels of the same pixel to have different voltage levels.
摘要翻译：提供了一种液晶显示器及其驱动方法。液晶显示器包括多个像素，多条扫描线和多条数据线。每个像素包括多个子像素。每个子像素耦合到数据线，并且包括开关，存储电容器和子像素电极。开关耦合到扫描线以接收扫描信号。开关由扫描信号接通，以接收从数据线发送的数据信号。每个像素的子像素的存储电容器耦合到扫描线，或者每个像素的一个子像素的存储电容器耦合到公共电极，并且其他子像素的存储电容器被耦合到扫描线。每个子像素的开关和存储电容器耦合到不同的扫描线。该方法包括发送具有多个电压电平的扫描信号，以调制相同像素的子像素的一个或多个子像素电极的电压电平，从而使相同像素的子像素具有不同的电压水平。

2. 发明申请

US20130163279A1 BACKLIGHT MODULE 有权
标题翻译：背光模组
公开(公告)号：US20130163279A1
公开(公告)日：2013-06-27
申请号：US13471435
申请日：2012-05-14
申请人： Ci-Guang Peng , Cheng-Yu Wang , Chung-Yang Hung , Te-Hen Lo , Cheng-Min Tsai , Ming-Sheng Lai , Ren-Wei Huang , Shu-Ting Jhuang
发明人： Ci-Guang Peng , Cheng-Yu Wang , Chung-Yang Hung , Te-Hen Lo , Cheng-Min Tsai , Ming-Sheng Lai , Ren-Wei Huang , Shu-Ting Jhuang
IPC分类号： F21V7/04 , F21V8/00
CPC分类号： F21V7/04 , G02B6/0011 , G02B6/002
摘要： A backlight module including a light guide plate and a light source is provided. The light guide plate has a light incident surface, a light reflection surface, a first side surface and a second side surface. The light incident surface is connected to the second side surface. The reflection surface is connected between the first side surface and the light incident surface. The first and the second side surfaces are two planes with their extending planes intersected. The light incident surface is a chamfering plane connected between the first and the second side surfaces. The light reflection surface is a cambered surface connected between the first side surface and the light incident surface. The light source is disposed next to the light incident surface, so as to transmit light into the light guide plate through the light incident surface.
摘要翻译：提供了包括导光板和光源的背光模块。导光板具有光入射面，光反射面，第一侧面和第二侧面。光入射表面连接到第二侧表面。反射面连接在第一侧面和光入射面之间。第一和第二侧表面是两个平面，它们的延伸平面相交。光入射表面是连接在第一和第二侧表面之间的倒角平面。光反射表面是连接在第一侧表面和光入射表面之间的弧形表面。光源设置在光入射表面附近，以便通过光入射表面将光透射到导光板中。

3. 发明授权

US08340240B2 Shift register of LCD devices 有权
标题翻译： LCD设备的移位寄存器
公开(公告)号：US08340240B2
公开(公告)日：2012-12-25
申请号：US13492916
申请日：2012-06-10
申请人： Tsung-Ting Tsai , Ming-Sheng Lai , Min-Feng Chiang , Chun-Hsin Liu
发明人： Tsung-Ting Tsai , Ming-Sheng Lai , Min-Feng Chiang , Chun-Hsin Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/00 , G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2320/0219 , G11C19/28
摘要： A shift register includes a plurality of shift register units coupled in series. Each shift register unit, receiving an input voltage at an input end and an output voltage at an output end, includes a node, a pull-up driving circuit, a pull-up circuit and first through third pull-down circuits. The pull-up driving circuit can transmit the input voltage to the node, and the pull-up circuit can provide the output voltage based on a high-frequency clock signal and the input signal. The first pull-down circuit can provide a bias voltage at the node or at the output end based on a first low-frequency clock signal. The second pull-down circuit can provide a bias voltage at the node or at the output end based on a second low-frequency clock signal. The third pull-down circuit can provide a bias voltage at the node or at the output end based on a feedback voltage.
摘要翻译：移位寄存器包括串联耦合的多个移位寄存器单元。接收输入端的输入电压和输出端的输出电压的每个移位寄存器单元包括节点，上拉驱动电路，上拉电路和第一至第三下拉电路。上拉驱动电路可以将输入电压传输到节点，并且上拉电路可以基于高频时钟信号和输入信号提供输出电压。第一下拉电路可以基于第一低频时钟信号在节点处或在输出端提供偏置电压。第二下拉电路可以基于第二低频时钟信号在节点处或在输出端提供偏置电压。第三下拉电路可以基于反馈电压在节点处或输出端提供偏置电压。

4. 发明授权

US08229058B2 Shift register of LCD devices 有权
公开(公告)号：US08229058B2
公开(公告)日：2012-07-24
申请号：US12607042
申请日：2009-10-27
申请人： Tsung-Ting Tsai , Ming-Sheng Lai , Min-Feng Chiang , Chun-Hsin Liu
发明人： Tsung-Ting Tsai , Ming-Sheng Lai , Min-Feng Chiang , Chun-Hsin Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/00 , G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2320/0219 , G11C19/28
摘要： A shift register includes a plurality of shift register units coupled in series. Each shift register unit, receiving an input voltage at an input end and an output voltage at an output end, includes a node, a pull-up driving circuit, a pull-up circuit and first through third pull-down circuits. The pull-up driving circuit can transmit the input voltage to the node, and the pull-up circuit can provide the output voltage based on a high-frequency clock signal and the input signal. The first pull-down circuit can provide a bias voltage at the node or at the output end based on a first low-frequency clock signal. The second pull-down circuit can provide a bias voltage at the node or at the output end based on a second low-frequency clock signal. The third pull-down circuit can provide a bias voltage at the node or at the output end based on a feedback voltage.

5. 发明授权

US08217879B2 Liquid crystal display and operation method thereof 有权
公开(公告)号：US08217879B2
公开(公告)日：2012-07-10
申请号：US12912230
申请日：2010-10-26
申请人： Ming-Feng Chiang , Hsueh-Ying Huang , Ming-Sheng Lai
发明人： Ming-Feng Chiang , Hsueh-Ying Huang , Ming-Sheng Lai
IPC分类号： G09G3/36
CPC分类号： G09G3/3659 , G02F1/13624 , G02F2001/134345 , G09G2300/0443 , G09G2300/0447 , G09G2310/0205 , G09G2320/028
摘要： A pixel unit in the present invention is divided into two sub-pixels. Each sub-pixel includes a thin film transistor, a liquid crystal capacitor and a storage capacitor. The two transistors respectively located in different sub-pixels are connected to different scan lines. One of the two transistors is connected to the data line through another transistor. Therefore, two different pixel voltages are formed in a pixel.

6. 发明授权

US07953201B2 Shift register with pre-pull-down module to suppress a spike 有权
标题翻译：移位寄存器与预下拉模块以抑制尖峰
公开(公告)号：US07953201B2
公开(公告)日：2011-05-31
申请号：US12502696
申请日：2009-07-14
申请人： Tsung-ting Tsai , Ming-sheng Lai , Min-feng Chiang , Po-yuan Liu
发明人： Tsung-ting Tsai , Ming-sheng Lai , Min-feng Chiang , Po-yuan Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G2310/027 , G09G2310/0286 , G09G2330/025
摘要： A shift register includes a plurality of shift register stages cascade-connected with each other. Each shift register stage includes a pull up module for outputting an output pulse in response to a first clock signal, a pull-up driving module for turning on the pull up module in response to a driving pulse of a previous one stage of the shift register, a pre-pull-down module coupled to a previous two stage of the shift register and a first node for pulling down voltage level of the first node in response to a output pulse of the previous two stage of the shift register, a pull down module coupled to the first node for pulling down voltage level of the first node in response to a pulling-down triggering signal, and a pulling down driving module for providing the pulling-down triggering signal.
摘要翻译：移位寄存器包括彼此级联的多个移位寄存器级。每个移位寄存器级包括用于响应于第一时钟信号输出输出脉冲的上拉模块，用于响应于移位寄存器的前一级的驱动脉冲导通上拉模块的上拉驱动模块耦合到移位寄存器的前两级的预下拉模块和用于响应于移位寄存器的前两级的输出脉冲而拉低第一节点的电压电平的第一节点，下拉耦合到第一节点的模块，用于响应于下拉触发信号而降低第一节点的电压电平，以及用于提供下拉触发信号的下拉驱动模块。

7. 发明授权

US07928942B2 Signal-driving system and shift register unit thereof 有权
标题翻译：信号驱动系统及其移位寄存器单元
公开(公告)号：US07928942B2
公开(公告)日：2011-04-19
申请号：US11846383
申请日：2007-08-28
申请人： Yu-ju Kuo , Ming-sheng Lai , Kuo-hsing Cheng , Chih-yuan Chien
发明人： Yu-ju Kuo , Ming-sheng Lai , Kuo-hsing Cheng , Chih-yuan Chien
IPC分类号： G09G3/36
CPC分类号： G11C19/28 , G09G3/3648 , G09G3/3677 , G09G2300/0417 , G09G2320/0223
摘要： A signal-driving system for constructing gate signals of liquid crystal display (LCD), includes a plural stage of cascaded shift register units. Each stage of shift register unit includes a first pull-up switch unit, which is turned on for outputting a gate pulse on an output of this stage, based on either the first clock signal or the second clock signal; a pull-up driving unit, which is used for providing a driving pulse via a node for driving the first pull-up switch unit; a first pull-down switch unit, which is turned on to connect the output to a low-level voltage source; a second pull-down switch unit, which is turned on to connect said node to the low-level voltage source; a carry buffer unit, which is used for providing a control pulse on the second pull-down switch unit of previous stage, based on either the first clock signal or the second clock signal, and thereby ensuring operation of each stage independent of gate pulse signals outputted from the other stages.
摘要翻译：用于构成液晶显示器（LCD）的门信号的信号驱动系统包括多级级联移位寄存器单元。移位寄存器单元的每个级包括第一上拉开关单元，其基于第一时钟信号或第二时钟信号而被导通以输出该级输出上的门脉冲; 上拉驱动单元，用于经由用于驱动第一上拉开关单元的节点提供驱动脉冲; 第一下拉开关单元，其被接通以将输出连接到低电平电压源; 第二下拉开关单元，其被接通以将所述节点连接到所述低电平电压源; 进位缓冲单元，用于基于第一时钟信号或第二时钟信号在前一级的第二下拉开关单元上提供控制脉冲，从而确保每个级的操作独立于门脉冲信号从其他阶段输出。

8. 发明授权

US07817771B2 Shift register 有权
标题翻译：移位寄存器
公开(公告)号：US07817771B2
公开(公告)日：2010-10-19
申请号：US12334874
申请日：2008-12-15
申请人： Tsung-Ting Tsai , Ming-Sheng Lai , Min-Feng Chiang , Po-Yuan Liu
发明人： Tsung-Ting Tsai , Ming-Sheng Lai , Min-Feng Chiang , Po-Yuan Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A shift register comprises a plurality of stages, {Sn}, n=1, 2, . . . , N, N being a positive integer. In one embodiment, each stage Sn includes a pull-up circuit having an input for receiving one of a first clock signal, CK1, and a second clock signal, XCK1, an output for responsively outputting an output signal, On, and an input node Qn, a pull-up control circuit electrically coupled to the input node Qn and configured such that when receiving a first input signal, the pull-up control circuit responsively generates a signal that is provided to the input node Qn to turn on the pull-up circuit, a pull-down circuit electrically coupled to the input node Qn and configured to provide a first voltage to one of the input node Qn and the output of the pull-up circuit, and a pull-down control circuit configured to receive one of a third clock signal, CK2, and a fourth clock signal, XCK2, and responsively generate the first voltage to turn on the pull-down circuit of the stage Sn and the pull-down circuit of one of the stage Sn−1 and the stage Sn+1.
摘要翻译：移位寄存器包括多个级，{Sn}，n = 1,2。。。，N，N为正整数。在一个实施例中，每级Sn包括一个上拉电路，该上拉电路具有用于接收第一时钟信号CK1和第二时钟信号XCK1中的一个的输入端，用于响应地输出输出信号的输出端和输入节点 Qn是电耦合到输入节点Qn并被配置为使得当接收到第一输入信号时，上拉控制电路响应地产生提供给输入节点Qn的信号，以接通上拉电路，电耦合到输入节点Qn并被配置为向输入节点Qn和上拉电路的输出之一提供第一电压的下拉电路，以及被配置为接收一个电压的下拉控制电路第三时钟信号CK2和第四时钟信号XCK2，并且响应地产生第一电压以接通级Sn的下拉电路和级Sn-1之一的下拉电路和阶段Sn + 1。

9. 发明授权

US07705952B2 Electronic device with uniform-resistance fan-out blocks 有权
标题翻译：具有均匀电阻扇出电路的电子装置
公开(公告)号：US07705952B2
公开(公告)日：2010-04-27
申请号：US11593551
申请日：2006-11-07
申请人： Ming-Chin Lee , Ming-Sheng Lai
发明人： Ming-Chin Lee , Ming-Sheng Lai
IPC分类号： G02F1/1345
CPC分类号： G02F1/1345 , G02F1/136286
摘要： The present invention provides an electronic device and manufacturing method thereof. The interconnecting leads of adjacent fan-out blocks have different heights along boundary area, thereby making the resistance of the adjacent interconnecting leads uniform and ensuring the quality of the electronic device.
摘要翻译：本发明提供一种电子设备及其制造方法。相邻扇出块的互连引线沿着边界区域具有不同的高度，从而使相邻互连引线的电阻均匀并确保电子器件的质量。

10. 发明授权

US07688934B2 Shift register and shift register unit for diminishing clock coupling effect 有权
标题翻译：移位寄存器和移位寄存器单元用于减小时钟耦合效应
公开(公告)号：US07688934B2
公开(公告)日：2010-03-30
申请号：US12409280
申请日：2009-03-23
申请人： Tsung-ting Tsai , Ming-sheng Lai , Yung-chih Chen , Po-yuan Liu
发明人： Tsung-ting Tsai , Ming-sheng Lai , Yung-chih Chen , Po-yuan Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G3/3677
摘要： A shift register and a shift register unit for diminishing clock coupling effect are introduced herein. Each stage shift register unit includes at least one pull-up driving module, a pull-up module, at least one pull-down module and a pull-down driving module. Before a waveform of either a first clock signal or a second clock signal employed by the pull-up module transits into a rising edge, the pull-down driving module employs a first periodic signal to turn on the pull-down module in advance for a specific period, and/or before the waveform of the first or second clock signal employed by the pull-up module transits into a falling edge, the pull-down driving module employs a second periodic signal to turn off the pull-down module in advance for a specific period. Accordingly, the pull-down module can gain a sufficient capability against the clock coupling effect so as to optimize the waveform outputted from the shift register unit.
摘要翻译：本文介绍了一种用于减小时钟耦合效应的移位寄存器和移位寄存器单元。每级移位寄存器单元包括至少一个上拉驱动模块，上拉模块，至少一个下拉模块和下拉驱动模块。在由上拉模块采用的第一时钟信号或第二时钟信号的波形进入上升沿之前，下拉驱动模块采用第一周期信号来预先为下拉模块接通在上拉模块采用的第一或第二时钟信号的波形转入下降沿之前和/或之前，下拉驱动模块采用第二周期信号预先关闭下拉模块在一段特定的时期。因此，下拉模块可以针对时钟耦合效应获得足够的能力，以优化从移位寄存器单元输出的波形。

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