会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 5. 发明申请
    • SEMICONDUCTOR STORAGE DEVICE
    • 半导体存储设备
    • US20100061132A1
    • 2010-03-11
    • US12516690
    • 2006-12-07
    • Yoshihisa FujisakiSatoru HanzawaKenzo KurotsuchiNozomu MatsuzakiNorikatsu Takaura
    • Yoshihisa FujisakiSatoru HanzawaKenzo KurotsuchiNozomu MatsuzakiNorikatsu Takaura
    • G11C11/00H01L45/00G11C5/02G11C7/00
    • H01L45/144G11C13/0004G11C13/0069G11C2213/75H01L27/2436H01L27/2463H01L27/2472H01L45/06H01L45/1233
    • In a semiconductor storage device such as a phase change memory, a technique which can realize high integration is provided. The semiconductor storage device includes a phase change thin film 101 having two stable phases of a crystal state with low electric resistance and an amorphous state with high electric resistance, upper plug electrodes 102 and 103 provided on one side of the phase change thin film 101, a lower electrode 104 provided on the other side of the phase change thin film 101, a selecting transistor 114 whose drain/source terminals are connected to the upper plug electrode 102 and the lower electrode 104, and a selecting transistor 115 whose drain/source terminals are connected to the upper plug electrode 103 and the lower electrode 104, and a first memory cell is configured with the selecting transistor 114 and a phase change region 111 in the phase change thin film 101 sandwiched between the upper plug electrode 102 and the lower electrode 104, and a second memory cell is configured with the selecting transistor 115 and a phase change region 112 in the phase change thin film 101 sandwiched between the upper plug electrode 103 and the lower electrode 104.
    • 在诸如相变存储器的半导体存储装置中,提供了可以实现高集成度的技术。 半导体存储装置包括:具有低电阻的晶体状态的两个稳定相和具有高电阻的非晶态的相变薄膜101,设置在相变薄膜101一侧的上部插塞电极102和103, 设置在相变薄膜101的另一侧的下部电极104,漏极/源极端子连接到上部插塞电极102和下部电极104的选择晶体管114,以及选择晶体管115,其漏极/源极端子 连接到上插头电极103和下电极104,并且第一存储单元配置有夹在上插头电极102和下电极之间的相变薄膜101中的选择晶体管114和相变区域111 104,并且第二存储单元配置有夹在b中的相变薄膜101中的选择晶体管115和相变区域112 在上塞电极103和下电极104之间。