会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Processing unit, process control system and control method
    • 处理单元,过程控制系统和控制方法
    • US08671300B2
    • 2014-03-11
    • US12938557
    • 2010-11-03
    • Noritaka MatsumotoTsutomu YamadaEiji KobayashiAkihiro OhashiShin Kokura
    • Noritaka MatsumotoTsutomu YamadaEiji KobayashiAkihiro OhashiShin Kokura
    • G06F1/04G06F1/12G06F15/16
    • G06F11/0766G06F11/0724G06F11/076
    • A processing unit is connected to another processing unit through a system bus composed of serial signal communication line and synchronization signal communication line to be able to communicate therewith. When an operation unit detects abnormal state in the processing unit, the operation unit supplies notification of detection of the abnormal state to synchronization unit. The synchronization unit transmits the received detection notification of abnormal state to the other processing unit through the synchronization signal communication line. Conversion unit receives parallel communication data from the operation unit through important signal line instead of general signal line and converts the received parallel signal into serial signal to be transmitted to the other processing unit through the serial signal communication line, thereby soundness among processing units connected to the system bus is ensured when the system bus is configured to attain serial communication.
    • 处理单元通过由串行信号通信线路和同步信号通信线路组成的系统总线连接到另一个处理单元,以能够与其通信。 当操作单元检测到处理单元中的异常状态时,操作单元将异常状态的检测通知提供给同步单元。 同步单元通过同步信号通信线路将接收到的异常状态的检测通知发送给其他处理单元。 转换单元通过重要信号线代替通用信号线从操作单元接收并行通信数据,并将接收到的并行信号转换为串行信号,以通过串行信号通信线路发送到另一个处理单元,从而在连接到 当系统总线被配置为实现串行通信时,确保系统总线。
    • 2. 发明授权
    • Modular computer system and I/O module
    • 模块化计算机系统和I / O模块
    • US07272665B2
    • 2007-09-18
    • US10759193
    • 2004-01-20
    • Tsutomu YamadaTetsuaki NakamikawaHiromichi EndohNoritaka MatsumotoHirokazu Kasashima
    • Tsutomu YamadaTetsuaki NakamikawaHiromichi EndohNoritaka MatsumotoHirokazu Kasashima
    • G06F3/00G06F13/42H02J13/00
    • G06F13/4095
    • Without being restrained to a specific bus scheme, kinds of I/O modules connected to a processing module can be discriminated. Module exclusive selection parts respectively provided in I/O modules connected in a stacked form to a processing module via connectors judge only a module select signal input from terminals in the same position on processing module side connectors to be active. Based thereon, identification information of its own I/O module is output to a predetermined terminal on the connector. Without being restrained to a specific bus scheme, therefore, the processing module can acquire identification information of the I/O modules from a predetermined terminal on a connector. One I/O module can be selected by a simple module selection circuit scheme of inputting module select signals successively output from the processing module to terminals in the same position on processing module side connectors according to the connection order of the I/O modules.
    • 不受特定总线方案的约束,可以区分连接到处理模块的各种I / O模块。 分别在I / O模块中以堆叠形式连接到处理模块的模块专用选择部件通过连接器判断只有模块选择信号从位于处理模块侧连接器上相同位置的端子输入才能激活。 基于此,其自身的I / O模块的识别信息被输出到连接器上的预定端子。 因此,不受特定总线方案的约束,处理模块可以从连接器上的预定端子获取I / O模块的识别信息。 可以通过简单的模块选择电路方案来选择一个I / O模块,该模块选择电路根据I / O模块的连接顺序将从处理模块连续输出的模块选择信号输入到位于处理模块侧连接器上相同位置的端子。
    • 5. 发明申请
    • Processing module
    • 处理模块
    • US20070038745A1
    • 2007-02-15
    • US11491247
    • 2006-07-24
    • Tsutomu YamadaHiromichi EndohNoritaka MatsumotoSatoru FunakiAtsushi ItoNorihisa Yanagihara
    • Tsutomu YamadaHiromichi EndohNoritaka MatsumotoSatoru FunakiAtsushi ItoNorihisa Yanagihara
    • G06F15/173
    • G06F12/0676
    • A processing module to use for a processing system having a plurality of processing modules connected via a communication line is comprising mounting position information for the processing module in the communication line; a unique logical address to indicate the processing module; a database to correspond with a physical address of the processing module in the communication line; a position identification device to identify the mounting position information in the communication line of the processing module; a unique/physical address conversion device to fetch the physical address corresponding to the unique logical address from the database using a data packet having the unique logical address as a destination; and a position/physical address conversion device for searching for the physical address from the mounting position information.
    • 一种用于具有通过通信线路连接的多个处理模块的处理系统的处理模块包括:在通信线路中安装处理模块的位置信息; 用于指示处理模块的唯一逻辑地址; 与所述通信线路中的处理模块的物理地址对应的数据库; 位置识别装置,用于识别处理模块的通信线路中的安装位置信息; 唯一/物理地址转换装置,使用具有唯一逻辑地址作为目的地的数据包从数据库中取出对应于唯一逻辑地址的物理地址; 以及位置/物理地址转换装置,用于从安装位置信息搜索物理地址。
    • 7. 发明申请
    • Computer system
    • 电脑系统
    • US20070112983A1
    • 2007-05-17
    • US11599383
    • 2006-11-15
    • Tsutomu YamadaHiromichi EndohNoritaka MatsumotoSatoru FunakiTatsuya MaruyamaAtsushi ItoFumiyuki TamuraNorihisa YanagiharaMakiko Naemura
    • Tsutomu YamadaHiromichi EndohNoritaka MatsumotoSatoru FunakiTatsuya MaruyamaAtsushi ItoFumiyuki TamuraNorihisa YanagiharaMakiko Naemura
    • G06F13/00
    • G06F13/37
    • A computer system, being a stack bus system in which a plurality of computer modules are stacked and connected to one another and being capable of automatically matching and allocating bus resources such as clocks and interrupts, is provided. In the computer system including one system module and n peripheral modules, each peripheral module includes an interrupt selector, a clock selector, an arbitration signal selector, a resource decision unit, and a position identification unit. The position identification unit cooperates with a position configuration unit present in the system module to identify a position of the module, which includes the position identification unit, in the computer system, and autonomously decides bus resources used by the module. By allowing the interrupt selector, the clock selector, and the arbitration signal selector to select and use the decided bus resources, each peripheral module can match and configure the bus resources in the computer system.
    • 一种作为堆叠总线系统的计算机系统,其中多个计算机模块彼此堆叠并彼此连接并且能够自动匹配和分配诸如时钟和中断的总线资源。 在包括一个系统模块和n个外围模块的计算机系统中,每个外围模块包括中断选择器,时钟选择器,仲裁信号选择器,资源判定单元和位置识别单元。 所述位置识别单元与存在于所述系统模块中的位置配置单元配合,以在所述计算机系统中识别包括所述位置识别单元的模块的位置,并且自主地决定所述模块使用的总线资源。 通过允许中断选择器,时钟选择器和仲裁信号选择器来选择和使用所决定的总线资源,每个外围模块可以匹配和配置计算机系统中的总线资源。
    • 10. 发明授权
    • Computer system
    • 电脑系统
    • US07716405B2
    • 2010-05-11
    • US11599383
    • 2006-11-15
    • Tsutomu YamadaHiromichi EndohNoritaka MatsumotoSatoru FunakiTatsuya MaruyamaAtsushi ItoFumiyuki TamuraNorihisa YanagiharaMakiko Naemura
    • Tsutomu YamadaHiromichi EndohNoritaka MatsumotoSatoru FunakiTatsuya MaruyamaAtsushi ItoFumiyuki TamuraNorihisa YanagiharaMakiko Naemura
    • G06F13/36
    • G06F13/37
    • A computer system, being a stack bus system in which a plurality of computer modules are stacked and connected to one another and being capable of automatically matching and allocating bus resources such as clocks and interrupts, is provided. In the computer system including one system module and n peripheral modules, each peripheral module includes an interrupt selector, a clock selector, an arbitration signal selector, a resource decision unit, and a position identification unit. The position identification unit cooperates with a position configuration unit present in the system module to identify a position of the module, which includes the position identification unit, in the computer system, and autonomously decides bus resources used by the module. By allowing the interrupt selector, the clock selector, and the arbitration signal selector to select and use the decided bus resources, each peripheral module can match and configure the bus resources in the computer system.
    • 一种作为堆叠总线系统的计算机系统,其中多个计算机模块彼此堆叠并彼此连接并且能够自动匹配和分配诸如时钟和中断的总线资源。 在包括一个系统模块和n个外围模块的计算机系统中,每个外围模块包括中断选择器,时钟选择器,仲裁信号选择器,资源判定单元和位置识别单元。 所述位置识别单元与存在于所述系统模块中的位置配置单元配合,以在所述计算机系统中识别包括所述位置识别单元的模块的位置,并且自主地决定所述模块使用的总线资源。 通过允许中断选择器,时钟选择器和仲裁信号选择器来选择和使用所决定的总线资源,每个外围模块可以匹配和配置计算机系统中的总线资源。