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1. 发明授权

US09235345B2 Method and system for controlling loss of reliability of non-volatile memory 有权
标题翻译：控制非易失性存储器可靠性损失的方法和系统
公开(公告)号：US09235345B2
公开(公告)日：2016-01-12
申请号：US13977343
申请日：2011-12-23
申请人： Amedeo Veneroso , Francesco Varone , Pasquale Vastano , Vitantonio Distasio
发明人： Amedeo Veneroso , Francesco Varone , Pasquale Vastano , Vitantonio Distasio
IPC分类号： G06F3/00 , G06F13/00 , G11C29/00 , G06F3/06 , G06F11/00 , G07F7/08 , G11C29/50 , G06F12/02 , G11C16/04 , G11C29/04
CPC分类号： G06F3/0614 , G06F11/008 , G06F12/0246 , G07F7/082 , G11C16/04 , G11C29/50 , G11C29/50016 , G11C2029/0409 , G11C2029/5002
摘要： A method for controlling a loss of reliability of a non-volatile memory (NVM) included in an integrated circuit card (ICC) may include determining whether the NVM is reliable at the operating system (OS) side of the ICC, and generating an event associated with the reliability of the NVM at the OS side for an application of the ICC, if the NVM is determined to be unreliable.
摘要翻译：用于控制集成电路卡（ICC）中包括的非易失性存储器（NVM）的可靠性损失的方法可以包括确定NVM在ICC的操作系统（OS）侧是否可靠，并且生成事件与NVM在OS侧的可靠性有关，用于ICC的应用，如果NVM被确定为不可靠的。

2. 发明授权

US08745407B2 Virtual machine or hardware processor for IC-card portable electronic devices 有权
标题翻译：用于IC卡便携式电子设备的虚拟机或硬件处理器
公开(公告)号：US08745407B2
公开(公告)日：2014-06-03
申请号：US11912936
申请日：2006-05-02
申请人： Francesco Varone , Pasquale Vastano , Amedeo Veneroso
发明人： Francesco Varone , Pasquale Vastano , Amedeo Veneroso
IPC分类号： G06F12/14
CPC分类号： G06F21/123
摘要： A virtual machine or hardware processor for an IC-card portable electronic device includes a non-volatile memory unit, a remote decryption unit, and associated objects for storing an executable program in an encrypted format in the non-volatile memory. The IC-card stores a licence key to encrypt and decrypt the executable program through an IC-card interface. The IC-card interface extracts and encrypts the operands of the plain executable program into encrypted operands so as to not limit performance. The remote decryption unit detects if an instruction contains encrypted operands, and queries a decryption to the IC-card interface. The IC-card interface decrypts the encrypted operands and re-encrypts the just decrypted operands into obscured operands through a dynamic obscuration key.
摘要翻译：用于IC卡便携式电子设备的虚拟机或硬件处理器包括非易失性存储器单元，远程解密单元和用于在非易失性存储器中以加密格式存储可执行程序的相关对象。 IC卡存储许可证密钥，以通过IC卡接口对可执行程序进行加密和解密。 IC卡接口将普通可执行程序的操作数提取并加密为加密操作数，以便不会限制性能。远程解密单元检测指令是否包含加密操作数，并向IC卡接口查询解密。 IC卡接口解密加密的操作数，并通过动态遮蔽键将刚解密的操作数重新加密成模糊的操作数。

3. 发明申请

US20140025869A1 METHOD AND SYSTEM FOR IMPROVING A CONTROL OF A LIMIT ON WRITING CYCLES OF AN IC CARD 审中-公开
标题翻译：用于改善IC卡周期限制控制的方法和系统
公开(公告)号：US20140025869A1
公开(公告)日：2014-01-23
申请号：US13976686
申请日：2011-12-23
申请人： Amedeo Veneroso , Francesco Varone , Vitantonio Distasio , Pasquale Vastano
发明人： Amedeo Veneroso , Francesco Varone , Vitantonio Distasio , Pasquale Vastano
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F12/0238 , G06F2212/1036 , G06F2212/7211
摘要： The present invention relates to a method and system for controlling a number of writing cycles supported by a cell or portion (11) of a non volatile memory (4) of an IC Card (10), including the steps of counting write accesses to the memory portion (11) and storing a first counter (21) of the write accesses in another portion (21) of said non volatile memory (4). The method comprises coupling the first counter (21) to a second counter or value (31) associated to a RAM (4) (Random Access Memory) of the IC Card (10), wherein the second counter or value (31) is updated each time the write accesses occur on said cell or portion (11) to be controlled and the first counter (21) is written in the another portion of non volatile memory only when the second counter or value (21) corresponds to a predetermined value.
摘要翻译：本发明涉及一种用于控制由IC卡（10）的非易失性存储器（4）的单元或部分（11）支持的写入周期数量的方法和系统，包括以下步骤：对对存储部分（11），并且将所述写访问的第一计数器（21）存储在所述非易失性存储器（4）的另一部分（21）中。该方法包括将第一计数器（21）耦合到与IC卡（10）的RAM（4）（随机存取存储器）相关联的第二计数器或值（31），其中第二计数器或值（31）被更新每当写入访问发生在要被控制的所述单元或部分（11）上时，只有当第二计数器或值（21）对应于预定值时，才将第一计数器（21）写入非易失性存储器的另一部分。

4. 发明申请

US20080276100A1 Virtual Machine or Hardware Processor for Ic-Card Portable Electronic Devices 有权
标题翻译：用于Ic卡便携式电子设备的虚拟机或硬件处理器
公开(公告)号：US20080276100A1
公开(公告)日：2008-11-06
申请号：US11912936
申请日：2006-05-02
申请人： Francesco Varone , Pasquale Vastano , Amedeo Veneroso
发明人： Francesco Varone , Pasquale Vastano , Amedeo Veneroso
IPC分类号： G06F21/00
CPC分类号： G06F21/123
摘要： A virtual machine or hardware processor for an IC-card portable electronic device includes a non-volatile memory unit, a remote decryption unit, and associated objects for storing an executable program in an encrypted format in the non-volatile memory. The IC-card stores a licence key to encrypt and decrypt the executable program through an IC-card interface. The IC-card interface extracts and encrypts the operands of the plain executable program into encrypted operands so as to not limit performance. The remote decryption unit detects if an instruction contains encrypted operands, and queries a decryption to the IC-card interface. The IC-card interface decrypts the encrypted operands and re-encrypts the just decrypted operands into obscured operands through a dynamic obscuration key.
摘要翻译：用于IC卡便携式电子设备的虚拟机或硬件处理器包括非易失性存储器单元，远程解密单元和用于在非易失性存储器中以加密格式存储可执行程序的相关对象。 IC卡存储许可证密钥，以通过IC卡接口对可执行程序进行加密和解密。 IC卡接口将普通可执行程序的操作数提取并加密为加密操作数，以便不会限制性能。远程解密单元检测指令是否包含加密的操作数，并向IC卡接口查询解密。 IC卡接口解密加密的操作数，并通过动态遮蔽键将刚解密的操作数重新加密成模糊的操作数。

5. 发明申请

US20050228959A1 Method for patching ROM instructions in an electronic embedded system including at least a further memory portion 失效
标题翻译：一种用于在包括至少另外的存储器部分的电子嵌入式系统中修补ROM指令的方法
公开(公告)号：US20050228959A1
公开(公告)日：2005-10-13
申请号：US10820462
申请日：2004-04-08
申请人： Guido D'Albore , Pasquale Vastano
发明人： Guido D'Albore , Pasquale Vastano
IPC分类号： G06F12/00
CPC分类号： G06F9/30181 , G06F8/66 , G06F9/328
摘要： A mechanism for patching read only memory (ROM) instructions in an embedded system is provided. The embedded system includes non-volatile memory such as a ROM, a RAM and an EEPROM. In one configuration, the ROM contains application modules (subroutines) that are subordinate to a flag status. The flag status indicates to the subroutine whether to execute the ROM instructions in the ROM or the extended instructions in the EEPROM. The instructions in the EEPROM may be used to patch or to extend the behaviors masked in the ROM instructions. The extended instructions in the EEPROM may reuse the ROM instructions in the ROM without resulting in recursive actions.
摘要翻译：提供了一种用于在嵌入式系统中修补只读存储器（ROM）指令的机制。嵌入式系统包括诸如ROM，RAM和EEPROM的非易失性存储器。在一个配置中，ROM包含从属于标志状态的应用程序模块（子程序）。标志状态向子程序指示是否执行ROM中的ROM指令或EEPROM中的扩展指令。 EEPROM中的指令可用于修补或扩展ROM指令中屏蔽的行为。 EEPROM中的扩展指令可以重新使用ROM中的ROM指令，而不会导致递归动作。

6. 发明授权

US07424570B2 Method for patching ROM instructions in an electronic embedded system including at least a further memory portion 失效
标题翻译：一种用于在包括至少另外的存储器部分的电子嵌入式系统中修补ROM指令的方法
公开(公告)号：US07424570B2
公开(公告)日：2008-09-09
申请号：US10820462
申请日：2004-04-08
申请人： Guido D'Albore , Pasquale Vastano
发明人： Guido D'Albore , Pasquale Vastano
IPC分类号： G06F12/00
CPC分类号： G06F9/30181 , G06F8/66 , G06F9/328
摘要： A mechanism for patching read only memory (ROM) instructions in an embedded system is provided. The embedded system includes non-volatile memory such as a ROM, a RAM and an EEPROM. In one configuration, the ROM contains application modules (subroutines) that are subordinate to a flag status. The flag status indicates to the subroutine whether to execute the ROM instructions in the ROM or the extended instructions in the EEPROM. The instructions in the EEPROM may be used to patch or to extend the behaviors masked in the ROM instructions. The extended instructions in the EEPROM may reuse the ROM instructions in the ROM without resulting in recursive actions.
摘要翻译：提供了一种用于在嵌入式系统中修补只读存储器（ROM）指令的机制。嵌入式系统包括诸如ROM，RAM和EEPROM的非易失性存储器。在一个配置中，ROM包含从属于标志状态的应用程序模块（子程序）。标志状态向子程序指示是否执行ROM中的ROM指令或EEPROM中的扩展指令。 EEPROM中的指令可用于修补或扩展ROM指令中屏蔽的行为。 EEPROM中的扩展指令可以重新使用ROM中的ROM指令，而不会导致递归动作。

7. 发明申请

US20130290617A1 METHOD AND SYSTEM FOR CONTROLLING LOSS OF RELIABILITY OF NON-VOLATILE MEMORY 有权
标题翻译：用于控制非易失性存储器可靠性损失的方法和系统
公开(公告)号：US20130290617A1
公开(公告)日：2013-10-31
申请号：US13977343
申请日：2011-12-23
申请人： Amedeo Veneroso , Francesco Varone , Pasquale Vastano , Vitantonio Distasio
发明人： Amedeo Veneroso , Francesco Varone , Pasquale Vastano , Vitantonio Distasio
IPC分类号： G06F3/06 , G06F12/02
CPC分类号： G06F3/0614 , G06F11/008 , G06F12/0246 , G07F7/082 , G11C16/04 , G11C29/50 , G11C29/50016 , G11C2029/0409 , G11C2029/5002
摘要： A method for controlling a loss of reliability of a non-volatile memory (NVM) included in an integrated circuit card (ICC) may include determining whether the NVM is reliable at the operating system (OS) side of the ICC, and generating an event associated with the reliability of the NVM at the OS side for an application of the ICC, if the NVM is determined to be unreliable.
摘要翻译：用于控制集成电路卡（ICC）中包括的非易失性存储器（NVM）的可靠性损失的方法可以包括确定NVM在ICC的操作系统（OS）侧是否可靠，并且生成事件与NVM在OS侧的可靠性有关，用于ICC的应用，如果NVM被确定为不可靠的。

8. 发明授权

US08499180B2 IC card with low precision clock 有权
标题翻译：具有低精度时钟的IC卡
公开(公告)号：US08499180B2
公开(公告)日：2013-07-30
申请号：US12122359
申请日：2008-05-16
申请人： Francesco Varone , Pasquale Vastano , Amedeo Veneroso
发明人： Francesco Varone , Pasquale Vastano , Amedeo Veneroso
IPC分类号： G06F1/00
CPC分类号： G06F1/14
摘要： An IC Card may include electronic components to receive a power supply and a main clock signal by a reader device. The power supply may be provided to a subset of the electronic components during a main clock stop status wherein the main clock signal is suspended for avoiding a maximum power consumption threshold. The IC Card may also include a low precision clock included in the subset of electronic components for measuring time in the main clock stop status.
摘要翻译： IC卡可以包括用于通过读取器装置接收电源和主时钟信号的电子部件。在主时钟停止状态期间，可以将电源提供给电子部件的子集，其中暂停主时钟信号以避免最大功耗阈值。 IC卡还可以包括包含在电子元件子集中的低精度时钟，用于测量主时钟停止状态下的时间。

9. 发明申请

US20080294930A1 IC CARD WITH LOW PRECISION CLOCK 有权
标题翻译： IC卡低精度时钟
公开(公告)号：US20080294930A1
公开(公告)日：2008-11-27
申请号：US12122359
申请日：2008-05-16
申请人： Francesco VARONE , Pasquale Vastano , Amedeo Veneroso
发明人： Francesco VARONE , Pasquale Vastano , Amedeo Veneroso
IPC分类号： G06F1/04
CPC分类号： G06F1/14
摘要： An IC Card may include electronic components to receive a power supply and a main clock signal by a reader device. The power supply may be provided to a subset of the electronic components during a main clock stop status wherein the main clock signal is suspended for avoiding a maximum power consumption threshold. The IC Card may also include a low precision clock included in the subset of electronic components for measuring time in the main clock stop status.
摘要翻译： IC卡可以包括用于通过读取器装置接收电源和主时钟信号的电子部件。在主时钟停止状态期间，可以将电源提供给电子部件的子集，其中暂停主时钟信号以避免最大功耗阈值。 IC卡还可以包括包含在电子元件子集中的低精度时钟，用于测量主时钟停止状态下的时间。

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