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1. 发明申请

US20150278070A1 BIOS TRACING USING A HARDWARE PROBE 有权
标题翻译： BIOS跟踪使用硬件探针
公开(公告)号：US20150278070A1
公开(公告)日：2015-10-01
申请号：US14229679
申请日：2014-03-28
申请人： ALEXEY CHINKOV , PAVEL KONEV
发明人： ALEXEY CHINKOV , PAVEL KONEV
IPC分类号： G06F11/34
CPC分类号： G06F11/348 , G06F11/3419 , G06F11/3636 , G06F11/3648 , G06F13/00
摘要： Methods and apparatuses may provide for tracing the performance of BIOS from the start of its execution. A hardware device such as a hardware probe may be connected to the processor on a target board and used to gather and transfer data to a host computer without resort to a COM port.
摘要翻译：方法和设备可以提供从执行开始跟踪BIOS的性能。诸如硬件探测器的硬件设备可以连接到目标板上的处理器，并用于收集和传送数据到主机而不需要使用COM端口。

2. 发明申请

US20140237301A1 PRESET EVALUATION TO IMPROVE INPUT/OUTPUT PERFORMANCE IN HIGH-SPEED SERIAL INTERCONNECTS 有权
标题翻译：预测评估提高高速串行互连中的输入/输出性能
公开(公告)号：US20140237301A1
公开(公告)日：2014-08-21
申请号：US13767881
申请日：2013-02-15
申请人： Ivan Herrera Mejia , Manuel A. Aguilar Arreola , Shrinivas Venkatraman , Andrea R. Vavra , Pavel Konev
发明人： Ivan Herrera Mejia , Manuel A. Aguilar Arreola , Shrinivas Venkatraman , Andrea R. Vavra , Pavel Konev
IPC分类号： G06F11/30
CPC分类号： G06F13/4282 , G06F9/4411 , G06F13/385 , G06F13/4072 , G06F2213/0026
摘要： Methods and apparatus for utilization of preset evaluation to improve input/output performance in high-speed serial interconnects are described. In some embodiments, performance of a link is evaluated at a plurality of equalization values and one of the plurality of equalization values is selected for the link based on comparison of a plurality of margin values that are to be determined for each of the plurality of equalization values. Other embodiments are also claimed and/or disclosed.
摘要翻译：描述了利用预设评估来提高高速串行互连中的输入/输出性能的方法和装置。在一些实施例中，在多个均衡值处评估链路的性能，并且基于为多个均衡值中的每一个确定的多个边缘值的比较来为链路选择多个均衡值中的一个价值观。还要求和/或公开其它实施例。

3. 发明申请

US20140189224A1 TRAINING FOR MAPPING SWIZZLED DATA TO COMMAND/ADDRESS SIGNALS 有权
标题翻译：培训将调度数据映射到命令/寻址信号
公开(公告)号：US20140189224A1
公开(公告)日：2014-07-03
申请号：US13728581
申请日：2012-12-27
申请人： ALEXEY KOSTINSKY , ZVIKA GREENFIELD , CHRISTOPHER P. MOZAK , PAVEL KONEV , OLGA FOMENKO
发明人： ALEXEY KOSTINSKY , ZVIKA GREENFIELD , CHRISTOPHER P. MOZAK , PAVEL KONEV , OLGA FOMENKO
IPC分类号： G11C7/10
CPC分类号： G11C7/1072 , G11C7/1063 , G11C7/20 , G11C11/4072 , G11C29/023 , G11C29/028 , G11C2207/105 , G11C2207/2254
摘要： Data pin mapping and delay training techniques. Valid values are detected on a command/address (CA) bus at a memory device. A first part of the pattern (high phase) is transmitted via a first subset of data pins on the memory device in response to detecting values on the CA bus; a second part of the pattern (low phase) is transmitted via a second subset of data pins on the memory device in response to detecting values on the CA bus. Signals are sampled at the memory controller from the data pins while the CA pattern is being transmitted to obtain a first memory device's sample (high phase) and the second memory device's sample (low phase) by analyzing the first and the second subset of sampled data pins. The analysis combined with the knowledge of the transmitted pattern on the CA bus leads to finding the unknown data pins mapping. Varying the transmitted CA patterns and the resulting feedbacks sampled on memory controller data signals allows CA/CTRL/CLK signals delay training with and without priory data pins mapping knowledge.
摘要翻译：数据引脚映射和延迟训练技术。在存储设备的命令/地址（CA）总线上检测到有效值。响应于CA总线上的检测值，该模式的第一部分（高相位）经由存储器件上的数据引脚的第一子集传输; 响应于CA总线上的检测值，经由数据引脚的第二子集在存储器件上传送图案（低相位）的第二部分。信号在存储器控制器处被从数据引脚采样，同时正在发送CA模式，以通过分析采样数据的第一和第二子集来获得第一存储器件的采样（高相位）和第二存储器件的采样（低相位）针脚。分析结合CA总线上传输模式的知识，找到未知的数据引脚映射。改变传输的CA模式和在存储器控制器数据信号上采样的结果反馈允许CA / CTRL / CLK信号延迟训练，并且不使用二进制数据引脚映射知识。

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