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1. 发明授权

US08316331B1 Method and mechanism for implementing extraction for an integrated circuit design 有权
标题翻译：实现集成电路设计提取的方法和机制
公开(公告)号：US08316331B1
公开(公告)日：2012-11-20
申请号：US12987072
申请日：2011-01-07
申请人： Eric Nequist , Richard Brashears , Matthew A. Liberty , Michael C. McSherry
发明人： Eric Nequist , Richard Brashears , Matthew A. Liberty , Michael C. McSherry
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： An improved method and system for stitching one or more islands of an integrated circuit design is disclosed. Multiple connected island objects in the IC design are first identified. At least one of the multiple identified connected island objects is then modified to form a modified island object. The modified island object may then be stitched into the multiple identified connected island objects. In some embodiments, stitching a modified island object may be implemented by tracking the endpoint(s), port(s), or node(s) of the connected island object being modified and stitched.
摘要翻译：公开了一种用于拼接集成电路设计的一个或多个岛的改进的方法和系统。首先确定IC设计中的多个连接岛对象。然后修改多个确定的连接的岛对象中的至少一个以形成修改的岛对象。然后可以将经修改的岛屿物体缝合到多个识别的连接的岛屿物体中。在一些实施例中，缝合修改的岛屿对象可以通过跟踪被修改和缝合的连接的岛对象的端点，端口或节点来实现。

2. 发明授权

US07657860B1 Method and system for implementing routing refinement and timing convergence 有权
标题翻译：实现路由优化和定时收敛的方法和系统
公开(公告)号：US07657860B1
公开(公告)日：2010-02-02
申请号：US11741694
申请日：2007-04-27
申请人： Richard Brashears , Eric Nequist
发明人： Richard Brashears , Eric Nequist
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： Disclosed is an improved method, system, and article of manufacture for implementing routing for an electrical circuit and chip design. A routing architecture can be represented as a spectrum of different granular routing levels. Instead of routing based upon area, routing can be performed for specific routes or portions of routes. Different types of representation or levels of abstraction for the routing can be used for the same net or route. Partial topological reconfiguration, refinement, or rip-up can be performed for a portion of the integrated circuit design, where the portion is smaller than an entire route or net. Non-uniform levels of routing activities or resources may be applied to route the design. Prioritization may be used to route certain portions of the design with greater levels of detail, abstraction, or resources than other portions of the design.
摘要翻译：公开了一种用于实现电路和芯片设计的路由的改进的方法，系统和制造。路由架构可以表示为不同粒度路由级别的频谱。代替基于区域的路由，可以针对特定路由或路由的一部分来执行路由。路由的不同类型的抽象或抽象级别可以用于相同的网络或路由。可以对集成电路设计的一部分进行部分拓扑重构，细化或分解，其中该部分小于整个路线或网络。不一致的路由活动或资源级别可能被应用于路由设计。可以使用优先级来设计具有比设计的其他部分更多的细节，抽象或资源的特定部分。

3. 发明申请

US20050031458A1 Portable air compressor 审中-公开
标题翻译：便携式空气压缩机
公开(公告)号：US20050031458A1
公开(公告)日：2005-02-10
申请号：US10909945
申请日：2004-08-02
申请人： Richard Brashears
发明人： Richard Brashears
IPC分类号： B25H3/00 , F04B35/04 , F04B41/02 , F04B53/00
CPC分类号： B25H3/006 , F04B35/04 , F04B41/02
摘要： A portable air compressor having a compressor, a motor and a housing. The motor is coupled to the compressor and provides a source of power thereto. The housing defines an air compressor storage cavity in which the compressor and motor are stored. The housing has a first portion and a second portion that are hingedly coupled to one another to permit access to at least a portion of the interior of the housing.
摘要翻译：一种具有压缩机，电动机和壳体的便携式空气压缩机。电动机耦合到压缩机并提供电源。壳体限定了空气压缩机储存腔，压缩机和电动机在其中被储存。壳体具有第一部分和第二部分，第一部分和第二部分彼此铰接地联接以允许接近壳体内部的至少一部分。

4. 发明授权

US07870517B1 Method and mechanism for implementing extraction for an integrated circuit design 有权
标题翻译：实现集成电路设计提取的方法和机制
公开(公告)号：US07870517B1
公开(公告)日：2011-01-11
申请号：US11741699
申请日：2007-04-27
申请人： Eric Nequist , Richard Brashears , Matthew A. Liberty , Michael C. McSherry
发明人： Eric Nequist , Richard Brashears , Matthew A. Liberty , Michael C. McSherry
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： An improved method and system for performing extraction on an integrated circuit design is disclosed. Extraction can be performed at granularities much smaller than the entire IC design, in which a halo is used to identify a geometric volume surrounding an object of interest to identify neighboring objects and generate an electrical model. The extraction approach can be taken for Islands, Nets, as well as other granularities within the design. Re-extraction of a design can occur at granularities smaller than a net. Some approaches utilize Island-stitching to replace an island within a net. An approach is also described for improving cross-references for cross-coupled objects.
摘要翻译：公开了一种用于在集成电路设计上执行提取的改进的方法和系统。可以以比整个IC设计小得多的粒度执行提取，其中使用光晕来识别围绕感兴趣对象的几何体，以识别相邻对象并生成电模型。提取方法可以用于群岛，网络以及设计中的其他粒度。设计的重新提取可能发生在小于网格的粒度上。一些方法利用岛缝来替代网内的岛屿。还描述了一种改进交叉耦合对象的交叉引用的方法。

5. 发明授权

US07614028B1 Representation, configuration, and reconfiguration of routing method and system 失效
标题翻译：路由方法和系统的表示，配置和重新配置
公开(公告)号：US07614028B1
公开(公告)日：2009-11-03
申请号：US11741668
申请日：2007-04-27
申请人： Eric Nequist , Richard Brashears
发明人： Eric Nequist , Richard Brashears
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： Disclosed is an improved method, system, and article of manufacture for implementing routing for an electrical circuit and chip design. A routing architecture can be represented as a spectrum of different granular routing levels. Instead of routing based upon area, routing can be performed for specific routes or portions of routes. Different types of representation or levels of abstraction for the routing can be used for the same net or route. Partial topological reconfiguration, refinement, or rip-up can be performed for a portion of the integrated circuit design, where the portion is smaller than an entire route or net. Non-uniform levels of routing activities or resources may be applied to route the design. Prioritization may be used to route certain portions of the design with greater levels of detail, abstraction, or resources than other portions of the design.
摘要翻译：公开了一种用于实现电路和芯片设计的路由的改进的方法，系统和制造。路由架构可以表示为不同粒度路由级别的频谱。代替基于区域的路由，可以针对特定路由或路由的一部分来执行路由。路由的不同类型的抽象或抽象级别可以用于相同的网络或路由。可以对集成电路设计的一部分进行部分拓扑重构，细化或分解，其中该部分小于整个路线或网络。不一致的路由活动或资源级别可能被应用于路由设计。可以使用优先级来设计具有比设计的其他部分更多的细节，抽象或资源的特定部分。

6. 发明授权

US08635574B1 Method and mechanism for implementing extraction for an integrated circuit design 有权
标题翻译：实现集成电路设计提取的方法和机制
公开(公告)号：US08635574B1
公开(公告)日：2014-01-21
申请号：US12987067
申请日：2011-01-07
申请人： Eric Nequist , Richard Brashears , Matthew A. Liberty , Michael C. McSherry
发明人： Eric Nequist , Richard Brashears , Matthew A. Liberty , Michael C. McSherry
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： An improved method and system for performing extraction on an integrated circuit design is disclosed. Extraction may be performed at granularities much smaller than the entire IC design, in which a halo is used to identify a geometric volume surrounding an object of interest to identify neighboring objects and generate an electrical model. The extraction approach can be taken for Islands, Nets, as well as other granularities within the design. Re-extraction of a design can occur at granularities smaller than a net. Some approaches utilize Island-stitching to replace an island within a net. An approach is also described for improving cross-references for cross-coupled objects.
摘要翻译：公开了一种用于在集成电路设计上执行提取的改进的方法和系统。可以以比整个IC设计小得多的粒度执行提取，其中使用光晕来识别围绕感兴趣对象的几何体积以识别相邻对象并生成电模型。提取方法可以用于群岛，网络以及设计中的其他粒度。设计的重新提取可能发生在小于网格的粒度上。一些方法利用岛缝来替代网内的岛屿。还描述了一种改进交叉耦合对象的交叉引用的方法。

7. 发明授权

US07721235B1 Method and system for implementing edge optimization on an integrated circuit design 有权
标题翻译：在集成电路设计中实现边缘优化的方法和系统
公开(公告)号：US07721235B1
公开(公告)日：2010-05-18
申请号：US11648128
申请日：2006-12-29
申请人： Eric Nequist , Richard Brashears
发明人： Eric Nequist , Richard Brashears
IPC分类号： G06F17/50
CPC分类号： G06F17/5072 , G06F17/5077 , G06F17/5081 , G06F2217/12 , Y02P90/265
摘要： Disclosed is a method, system, and computer program product for performing edge optimization on an electronic design. According to some approaches, the number of edges and/or the length of edges within an IC design are configured for optimized manufacturability and yield of an integrated circuit. The edge optimization may occur in real-time during layout, placement, and/or routing, or occur in a post-optimization step.
摘要翻译：公开了一种用于在电子设计上执行边缘优化的方法，系统和计算机程序产品。根据一些方法，IC设计中边缘的数量和/或边缘的长度被配置为优化集成电路的可制造性和产量。边缘优化可能在布局，放置和/或路由期间实时发生，或者发生在后优化步骤中。

8. 发明授权

US07698666B2 Method and system for model-based design and layout of an integrated circuit 有权
标题翻译：集成电路基于模型设计和布局的方法和系统
公开(公告)号：US07698666B2
公开(公告)日：2010-04-13
申请号：US11648150
申请日：2006-12-29
申请人： Eric Nequist , Richard Brashears
发明人： Eric Nequist , Richard Brashears
IPC分类号： G06F17/50
CPC分类号： G06F17/5072 , G06F17/5077
摘要： Disclosed is a method, system, and computer program product for implementing model-based layout, placement, and routing. Models are used to guide the placement and routing of polygons on the IC layout. In effect, the parameters that are used for placement and routing are guided by the model data so that the layout can be formed with a high degree of manufacturability from the outset.
摘要翻译：公开了一种用于实现基于模型的布局，布局和路由的方法，系统和计算机程序产品。模型用于指导IC布局上多边形的放置和布线。实际上，用于放置和布线的参数由模型数据引导，从而可以从一开始就以高度的可制造性形成布局。

9. 发明申请

US20090172626A1 METHOD AND SYSTEM FOR VISUAL IMPLEMENTATION OF LAYOUT STRUCTURES FOR AN INTEGRATED CIRCUIT 有权
标题翻译：用于集成电路的布局结构的视觉实现的方法和系统
公开(公告)号：US20090172626A1
公开(公告)日：2009-07-02
申请号：US11965676
申请日：2007-12-27
申请人： Steven Lee Pucci , Richard Brashears
发明人： Steven Lee Pucci , Richard Brashears
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： The present approach is directed to an improved method, system, and computer program product for visually presenting layout options for generating an electronic design. The visual presentation could be employed to display a set of layout choices when correcting errors or rules violations identified in the design. Alternatively, the visual presentation could be employed to display layout choices during the initial design entry phase for the electronic design.
摘要翻译：本方法涉及用于可视地呈现用于生成电子设计的布局选项的改进的方法，系统和计算机程序产品。可以使用视觉呈现来在校正在设计中识别的错误或规则违规时显示一组布局选择。或者，可以采用视觉呈现来在电子设计的初始设计进入阶段期间显示布局选择。

10. 发明授权

US07971173B1 Method and system for implementing partial reconfiguration and rip-up of routing 有权
标题翻译：用于实现部分重配置和路由选择的方法和系统
公开(公告)号：US07971173B1
公开(公告)日：2011-06-28
申请号：US11741685
申请日：2007-04-27
申请人： Richard Brashears , Eric Nequist
发明人： Richard Brashears , Eric Nequist
IPC分类号： G06F17/50
CPC分类号： G06F17/5077
摘要： Disclosed is an improved method, system, and article of manufacture for implementing routing for an electrical circuit and chip design. A routing architecture can be represented as a spectrum of different granular routing levels. Instead of routing based upon area, routing can be performed for specific routes or portions of routes. Different types of representation or levels of abstraction for the routing can be used for the same net or route. Partial topological reconfiguration, refinement, or rip-up can be performed for a portion of the integrated circuit design, where the portion is smaller than an entire route or net. Non-uniform levels of routing activities or resources may be applied to route the design. Prioritization may be used to route certain portions of the design with greater levels of detail, abstraction, or resources than other portions of the design.
摘要翻译：公开了一种用于实现电路和芯片设计的路由的改进的方法，系统和制造。路由架构可以表示为不同粒度路由级别的频谱。代替基于区域的路由，可以针对特定路由或路由的一部分来执行路由。路由的不同类型的抽象或抽象级别可以用于相同的网络或路由。可以对集成电路设计的一部分进行部分拓扑重构，细化或分解，其中该部分小于整个路线或网络。不一致的路由活动或资源级别可能被应用于路由设计。可以使用优先级来设计具有比设计的其他部分更多的细节，抽象或资源的特定部分。

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