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    • 1. 发明授权
    • Radio frequency interface circuit for a radio frequency identification tag
    • 用于射频识别标签的射频接口电路
    • US07929265B2
    • 2011-04-19
    • US12097599
    • 2006-12-14
    • Roland BrandlEwald BerglerRobert Spindler
    • Roland BrandlEwald BerglerRobert Spindler
    • H02H9/00
    • G06K19/07749G06K19/0701
    • A radio frequency interface circuit (11) for a radio frequency identification tag comprising—at least two input terminals (RF+, RF−) for connecting the circuit (10) with an antenna structure of the radio frequency identification tag, —one or more variable resistive loads (14) coupled across pairs of the input terminals (RF+, RF−)—one or more rectifiers (15) each connected on its input side to a pair of input terminals (RF+, RF−) and on its output side to a parallel connection of voltage control means (16) and modulation control means (17), wherein combiner means (18) are provided which are adapted to receive an output signal (19, 20) from the voltage control means (16) and the modulation control means (17), respectively, and to generate a control signal (21) for controlling each variable resistive load (14) depending on the received signals (19, 20) in such a way that each variable resistive load (14) serves as a modulation and voltage regulation circuit, and wherein each variable resistive load is adapted to serve as an electro static discharge protection circuit.
    • 一种用于射频识别标签的射频接口电路(11),包括用于将电路(10)与射频识别标签的天线结构连接的至少两个输入端(RF +,RF-), - 一个或多个变量 耦合在输入端(RF +,RF - )对上的电阻负载(14) - 一个或多个整流器(15),每个整流器在其输入侧连接到一对输入端子(RF +,RF-)并且在其输出侧 电压控制装置(16)和调制控制装置(17)的并联连接,其中提供组合器装置(18),其适于从电压控制装置(16)接收输出信号(19,20),并且调制 控制装置(17),并且根据所接收的信号(19,20)产生用于控制每个可变电阻负载(14)的控制信号(21),使得每个可变电阻负载(14)用作 调制和电压调节电路,其中每个v 适用的电阻负载适用于静电放电保护电路。
    • 2. 发明授权
    • Device comprising two mutually adapted impedances for the purpose of power transmission
    • 设备包括用于电力传输目的的两个相互适应的阻抗
    • US07513434B2
    • 2009-04-07
    • US10526859
    • 2003-08-29
    • Roland Brandl
    • Roland Brandl
    • G06K19/06G06K7/08
    • G06K19/0701G06K19/0723G06K19/07777H03H7/38
    • A device (1) for processing a signal (S) has firstly an antenna configuration (5) that is arranged to transmit a signal (S), that has at least one antenna-configuration terminal (6, 7) intended for connecting the antenna configuration (5) to a circuit (2), and that has an antenna-configuration impedance (ZA) at the antenna-configuration terminal (6, 7), and the circuit (2) further has at least one circuit terminal (3, 4) at which the circuit (2) has a circuit impedance (ZS) and at which the circuit (2) is connected to the antenna-configuration terminal (6, 7) for the purpose of power transmission between the antenna configuration (5) and the circuit (2) by using the signal (S), at least one of the two impedances (ZA, ZS) having, in respect of its reactance (YA, YS), a difference in reactance value (ΔY) from a nominal reactance value (YNOM) that is adapted for the transmission of power between the antenna configuration (5) and the circuit (2), and one of the two impedances (ZA, ZS) having a resistance (XA, XS) whose value (X) is greater than a nominal resistance value (XNOM) that is adapted for the transmission of power between the antenna configuration (5) and the circuit (2) and is smaller than a maximum resistance value (XMAX) that is a function of the difference in the reactance value (ΔY).
    • 用于处理信号(S)的装置(1)首先具有布置成发送信号(S)的天线配置(5),所述信号(S)具有用于连接天线的至少一个天线配置端子(6,7) 配置(5)到电路(2),并且在天线配置端子(6,7)处具有天线配置阻抗(ZA),并且电路(2)还具有至少一个电路端子(3, 4),其中电路(2)具有电路阻抗(ZS),并且电路(2)连接到天线配置端子(6,7),用于天线配置(5)之间的电力传输, 和电路(2),通过使用信号(S),两个阻抗(ZA,ZS)中的至少一个相对于其电抗(YA,YS),具有与标称值 适于在天线配置(5)和电路(2)之间传输电力以及两个阻抗(ZA,ZS)中的一个的电抗值(YNOM) 具有其值(X)大于适于在天线配置(5)和电路(2)之间传输电力并且小于最大值的标称电阻值(XNOM)的电阻(XA,XS) 电阻值(XMAX),其是电抗值(DeltaY)的差的函数。
    • 3. 发明授权
    • Data carrier comprising an integrated circuit with an ESD protection circuit
    • 数据载体包括具有ESD保护电路的集成电路
    • US07460345B2
    • 2008-12-02
    • US10517327
    • 2003-05-16
    • Roland Brandl
    • Roland Brandl
    • H02H9/00H02H3/22H02H1/00H02H1/04H02H9/06H01C7/12
    • G06K19/07735G06K19/07749H01L27/0255
    • In the case of a data carrier (1) or an integrated circuit (5) for the data carrier (1), an ESD protection circuit (8) is formed by means of a series connection (9) comprising a first protection diode (10) and a protection stage (11) together with a second protection diode connected in parallel with the series connection (9), and a rectifier circuit (13) connected with the ESD protection circuit (8) is provided, which comprises a rectifier diode connected in parallel with the ESD protection circuit (8), wherein the rectifier diode takes the form of a Schottky diode (21) with a parasitic p/n junction (26) and wherein the Schottky diode (21) with the parasitic p/n junction (26) forms the second protection diode of the ESD protection circuit (8).
    • 在数据载体(1)或数据载体(1)的集成电路(5)的情况下,ESD保护电路(8)通过包括第一保护二极管(10)的串联(9)形成, )和保护级(11)以及与串联连接(9)并联连接的第二保护二极管,并且提供与ESD保护电路(8)连接的整流器电路(13),其包括连接的整流二极管 与ESD保护电路(8)并联,其中整流二极管采用具有寄生p / n结(26)的肖特基二极管(21)的形式,并且其中具有寄生p / n结的肖特基二极管(21) (26)形成ESD保护电路(8)的第二保护二极管。
    • 4. 发明申请
    • Communication system and anti-collision method
    • 通信系统和防碰撞方法
    • US20070273482A1
    • 2007-11-29
    • US10575834
    • 2004-10-12
    • Franz AmtmannRoland BrandlChristian ScherabonHubert Watzinger
    • Franz AmtmannRoland BrandlChristian ScherabonHubert Watzinger
    • H04Q5/22
    • G06K7/10039H04L12/413
    • In a receiving method for the contactless reception of identification information (11,12), which is stored in a data carrier (3,3′) and which can be received from the data carrier (3, 3) in a contactless manner in the form of information units (IU, IU′) with a communication device (2), it is envisaged that firstly an information unit (R.IU) is received and that secondly it is detected that the received information unit (R.IU) represents a collision of two different information units (IU, IU′) occurring essentially simultaneously, of which two different information units (IU, IU′) the one information unit (IU) originates from a first data carrier (3) and the other information unit (IU) originates from a second data carrier (3), and that thirdly a received information unit (R.IU) that represents a collision is replaced with a first replacement information unit (R.IU1) established by the communication device (2), which is used instead of the information unit (R.IU) representing the collision, as the information unit (IU) that originates from the first data carrier (3), and that fourthly, the first replacement information unit (R.IU1) is delivered in a contactless manner.
    • 在用于非接触式接收识别信息(11,12)的接收方法中,所述接收方法被存储在数据载体(3,3')中并且可以以非接触方式从所述数据载体(3,3)接收 具有通信装置(2)的信息单元(IU,IU')的形式,设想首先接收信息单元(R.IU),其次检测到接收到的信息单元(R.IU)表示 基本上同时出现的两个不同信息单元(IU,IU')的冲突,其中一个信息单元(IU)的两个不同的信息单元(IU,IU')来自第一数据载体(3),另一个信息单元 (IU)来自第二数据载体(3),并且第三个表示冲突的接收信息单元(R.IU)被由通信设备(2)建立的第一替换信息单元(R.IU 1)替换 ),代替信息单元(R.IU)代替 作为来自第一数据载体(3)的信息单元(IU),以及第四替换信息单元(R.IU 1)以非接触方式传送。
    • 6. 发明授权
    • Session flag control for RFID tags
    • RFID标签的会话标志控制
    • US08893969B2
    • 2014-11-25
    • US13601899
    • 2012-08-31
    • Roland Brandl
    • Roland Brandl
    • G06F19/00G06K5/00
    • G06K7/10059G06K19/0717G06K19/0723G06K2017/0051
    • Various exemplary embodiments relate to an integrated circuit (IC) including: an inventoried flag configured to indicate whether the integrated circuit has been inventoried in a current inventory round; and an event detector configured to detect a tag event at the integrated circuit and reset the inventoried flag based on the tag event. In various embodiments, the IC further includes a timer circuit configured to measure a predetermined time since the inventoried flag was set and to prevent the reset of the inventoried flag until the predetermined time has expired.
    • 各种示例性实施例涉及集成电路(IC),其包括:被配置为指示集成电路是否已经在当前库存轮回中被存储的库存标志; 以及事件检测器,被配置为检测所述集成电路处的标签事件,并且基于所述标签事件来重置所述已标记的标志。 在各种实施例中,IC还包括定时器电路,其被配置为测量自从盘点标志设置以来的预定时间,并且防止已经存储的标志的重置直到预定时间到期。
    • 7. 发明申请
    • SESSION FLAG CONTROL FOR RFID TAGS
    • RFID标签的会议标志控制
    • US20140061303A1
    • 2014-03-06
    • US13601899
    • 2012-08-31
    • Roland Brandl
    • Roland Brandl
    • G06F19/00
    • G06K7/10059G06K19/0717G06K19/0723G06K2017/0051
    • Various exemplary embodiments relate to an integrated circuit (IC) including: an inventoried flag configured to indicate whether the integrated circuit has been inventoried in a current inventory round; and an event detector configured to detect a tag event at the integrated circuit and reset the inventoried flag based on the tag event. In various embodiments, the IC further includes a timer circuit configured to measure a predetermined time since the inventoried flag was set and to prevent the reset of the inventoried flag until the predetermined time has expired.
    • 各种示例性实施例涉及集成电路(IC),其包括:被配置为指示集成电路是否已经在当前库存轮回中被存储的库存标志; 以及事件检测器,被配置为检测所述集成电路处的标签事件,并且基于所述标签事件来重置所述已标记的标志。 在各种实施例中,IC还包括定时器电路,其被配置为测量自从盘点标志设置以来的预定时间,并且防止已经存储的标志的重置直到预定时间到期。
    • 8. 发明申请
    • CIRCUIT AND DATA CARRIER WITH RADIO FREQUENCY INTERFACE
    • 电路和数据载波与无线电频率接口
    • US20090045832A1
    • 2009-02-19
    • US12158112
    • 2006-12-14
    • Roland BrandlEwald BerglerRobert Spindler
    • Roland BrandlEwald BerglerRobert Spindler
    • G01R31/3187
    • G01R31/31701G01R31/2884G01R31/3025G06K19/07749
    • A circuit (12) comprises a first circuit point (13) and a second circuit point (14), which first circuit point (13) and second circuit point (14) are designed to be connected with RF transmission means (11) being designed for receiving in a contact-less manner a carrier signal (CS) from a read/write station and for feeding the circuit (12) with the received carrier signal (CS). The circuit (12) further comprises circuit testing means (4) being designed to carry out functional tests of the circuit (12) and to output a modulated response signal (TS-MOD) via the first and second circuit points (13, 14) only if the functional tests have been successful. The circuit (12) further comprises test trigger signal detecting means (5) being designed for detecting a test trigger signal (TS) that is applied across the first circuit point (13) and the second circuit point (14), wherein the test trigger signal detecting means (5) are designed to trigger the circuit testing means (4) to carry out the functional tests if they detect the test trigger signal (TS).
    • 电路(12)包括第一电路点(13)和第二电路点(14),该第一电路点(13)和第二电路点(14)被设计为与设计成的RF传输装置(11)连接 用于以无接触的方式接收来自读/写站的载波信号(CS),并用于向所述电路(12)馈送所接收的载波信号(CS)。 电路(12)还包括被设计成执行电路(12)的功能测试并经由第一和第二电路点(13,14)输出经调制的响应信号(TS-MOD)的电路测试装置(4) 只有功能测试成功。 电路(12)还包括测试触发信号检测装置(5),其被设计用于检测跨越第一电路点(13)和第二电路点(14)施加的测试触发信号(TS),其中测试触发器 信号检测装置(5)被设计成如果它们检测到测试触发信号(TS),则触发电路测试装置(4)执行功能测试。
    • 9. 发明申请
    • Electric Counter Circuit
    • 电子计数器电路
    • US20080267016A1
    • 2008-10-30
    • US12097039
    • 2006-12-06
    • Robert SpindlerRoland BrandlEwald Bergler
    • Robert SpindlerRoland BrandlEwald Bergler
    • G04F10/04
    • G04F10/04H03K5/15013
    • An electric counter circuit (30, 40, 80) comprises a clock generator (1, 54, 111, 120, 130) for generating a plurality of clock signals (21-24, 121-125, 131-134) and a sampling device (32, 81) for sampling the clock signals (21-24, 121-125, 131-134) at a first moment in time when a first characteristic signal section (LE) of a digital signal (DS) appears. Furthermore, the circuit (30, 40, 80) comprises a calculation device (33) for calculating the time between the first moment and a second moment which is later than the first moment. This calculation is based on the clock signals (21-24, 121-125, 131-134) at the first moment and based on the clock signals (21-24, 121-125, 131-134) at the second moment. The clock signals (21-24, 121-125, 131-134) each have the same cycle duration (T) and are phase-shifted with respect to each other.
    • 电计数器电路(30,40,80)包括用于产生多个时钟信号(21-24,21-125,131-134)的时钟发生器(1,54,111,120,130)和采样装置 (32,81),用于在数字信号(DS)的第一特征信号部分(LE)出现时的第一时刻对时钟信号(21-24,121- 125,131-134)进行采样。 此外,电路(30,40,80)包括用于计算第一时刻与晚于第一时刻的第二时刻之间的时间的计算装置(33)。 该计算基于第一时刻的时钟信号(21-24,121,125,131-134),并且基于第二时刻的时钟信号(21-24,121,125,131-134)。 时钟信号(21-24,121,125,131-134)各自具有相同的周期持续时间(T)并且相对于彼此相移。
    • 10. 发明申请
    • Electric Circuit for and Method of Generating a Clock Signal
    • 电路和产生时钟信号的方法
    • US20080265946A1
    • 2008-10-30
    • US12097038
    • 2006-12-06
    • Robert SpindlerRoland BrandlEwald Bergler
    • Robert SpindlerRoland BrandlEwald Bergler
    • H03K5/22
    • H04L7/0338
    • An electric circuit (30) for generating a clock-sampling signal (CLK) for a sampling device (31) comprises a clock generator (1, 40, 50, 60) for generating a plurality of clock signals (21-24, 51-54, 61-64), a correlation device (L) for correlating a characteristic signal section (LE) of a digital signal (DS) with the plurality of clock signals (21, 22, 23, 24, 51-56, 61-64), and a selecting device (MX) for selecting one of the clock signals (21, 22, 23, 24, 51-55, 61-64) as the clock-sampling signal (CLK) for the sampling device (31) on the basis of the correlation by the correlation device (L). The clock signals (21-24, 51-54, 61-64) have the same cycle duration (T) and are phase-shifted with respect to each other. The sampling device (31) subsequently samples the digital signal (DS) with the clock-sampling signal (CLK).
    • 一种用于产生采样装置(31)的时钟采样信号(CLK)的电路(30)包括用于产生多个时钟信号的时钟发生器(40,40,50,60),用于产生多个时钟信号(21-24,51- 用于将数字信号(DS)的特征信号部分(LE)与多个时钟信号(21,22,23,24,51-56,61-6)相关联的相关装置(L) 64),以及用于选择时钟信号(21,22,23,24,51-55,61-64)中的一个作为采样装置(31)的时钟采样信号(CLK)的选择装置(MX) 基于相关装置(L)的相关性。 时钟信号(21-24,51-54,61-64)具有相同的周期持续时间(T)并相对于彼此相移。 采样装置(31)随后用时钟采样信号(CLK)采样数字信号(DS)。