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1. 发明申请

US20160372512A1 METHOD FOR FORMING PAD OF WAFER 审中-公开
标题翻译：形成垫片的方法
公开(公告)号：US20160372512A1
公开(公告)日：2016-12-22
申请号：US14902085
申请日：2014-04-30
申请人： SILICONFILE TECHNOLOGIES INC.
发明人： Heui Gyun AHN
IPC分类号： H01L27/146 , H01L21/683
CPC分类号： H01L27/14687 , H01L21/6835 , H01L24/02 , H01L24/03 , H01L24/92 , H01L27/14636 , H01L27/1464 , H01L27/14685 , H01L2221/68327 , H01L2221/6834 , H01L2221/68368 , H01L2224/0231 , H01L2224/03002 , H01L2224/92 , H01L2924/00014 , H01L2221/683 , H01L21/304 , H01L21/76898 , H01L2224/03
摘要： The present invention relates to a technology for simply performing a process of forming a pad on the rear surface of a via hole in a packing process in a process of forming a pad of a wafer. The present invention is characterized by a packing process in a process for manufacturing a wafer, the packing process comprising the steps of: attaching glass to the upper portion of a micro lens and then separating a handling wafer from an element wafer, thereby exposing metal layers formed on the element wafer to the outside; and forming pads for the metal layers.
摘要翻译：本发明涉及一种用于在形成晶片垫的过程中在包装过程中简单地执行在通孔的后表面上形成焊盘的工艺的技术。本发明的特征在于在制造晶片的过程中的包装过程，所述包装过程包括以下步骤：将玻璃附着到微透镜的上部，然后将处理晶片与元件晶片分离，由此暴露金属层在元件晶片上形成到外部; 以及用于金属层的成形垫。

2. 发明申请

US20160284745A1 IMAGE SENSOR CHIP 审中-公开
标题翻译：图像传感器芯片
公开(公告)号：US20160284745A1
公开(公告)日：2016-09-29
申请号：US15022877
申请日：2014-08-22
申请人： SILICONFILE TECHNOLOGIES, INC.
发明人： Jae-Young PARK , Ho-Soo KIM
IPC分类号： H01L27/146
CPC分类号： H01L27/1462 , H01L27/14627 , H01L27/14636 , H01L27/14645
摘要： The present invention relates to an image sensor chip of which the efficiency such as sensitivity/quantum efficiency (QE) and the like can be improved by forming an antireflection film on a layer from which most reflection occurs in the image sensor chip, and image degradation can be additionally improved by preventing a ghost phenomenon and a flare phenomenon.
摘要翻译：本发明涉及通过在图像传感器芯片中发生大多数反射的层上形成抗反射膜而提高其灵敏度/量子效率（QE）等效率的图像传感器芯片，以及图像劣化可以通过防止重影现象和闪光现象来另外改进。

3. 发明申请

US20160163595A1 METHOD FOR MANUFACTURING THROUGH-HOLE SILICON VIA 有权
标题翻译：用于制造通孔硅的方法
公开(公告)号：US20160163595A1
公开(公告)日：2016-06-09
申请号：US14888674
申请日：2014-04-30
申请人： SILICONFILE TECHNOLOGIES INC.
发明人： Heui Gyun AHN , Sang Wook AHN , Yong Woon LEE , Huy Chan JUNG , Do Young LEE
IPC分类号： H01L21/768 , H01L21/683 , H01L21/306
CPC分类号： H01L21/76898 , H01L21/30604 , H01L21/6835 , H01L21/7684 , H01L2221/68327 , H01L2221/68359
摘要： A method for manufacturing a through-hole silicon via (TSV) employs the conventional trench insulation process to readily manufacture a through-hole silicon via (TSV) with achievement of an effective electrical insulation between the through-hole silicon via (TSV) and the silicon.
摘要翻译：用于制造通孔硅通孔（TSV）的方法采用传统的沟槽绝缘工艺来容易地制造通孔硅通孔（TSV），从而实现通孔硅通孔（TSV）和通孔硅通孔（TSV）之间的有效电绝缘硅。

4. 发明授权

US09337228B2 Stack chip package image sensor 有权
标题翻译：堆叠芯片封装图像传感器
公开(公告)号：US09337228B2
公开(公告)日：2016-05-10
申请号：US14468843
申请日：2014-08-26
申请人： SiliconFile Technologies Inc.
发明人： Seung Hoon Sa , Young Ha Lee
IPC分类号： H01L27/148 , H01L27/146
CPC分类号： H01L27/14636 , H01L27/14609 , H01L27/14634 , H01L27/1464
摘要： An image sensor cell is divided into two chips, and a capacitor for noise reduction is formed in a bottom wafer in correspondence with a unit pixel of a top wafer in a stack chip package image sensor having a coupling structure of the two chips, so that noise characteristics of the image sensor are improved. A stack chip package image sensor includes: a first semiconductor chip that includes a photodiode, a transmission transistor, and a first conductive pad and outputs image charge, which is output from the photodiode, through the first conductive pad; and a second semiconductor chip that includes a drive transistor, a selection transistor, a reset transistor, and a second conductive pad and supplies a corresponding pixel with an output voltage corresponding to the image charge received from the first semiconductor chip through the second conductive pad. The second semiconductor chip includes a capacitor for noise reduction.
摘要翻译：图像传感器单元被分成两个芯片，并且在具有两个芯片的耦合结构的堆叠芯片封装图像传感器中的顶部晶片的单位像素的底部晶片中形成用于降低噪声的电容器，使得提高了图像传感器的噪声特性。堆叠芯片封装图像传感器包括：第一半导体芯片，其包括光电二极管，透射晶体管和第一导电焊盘，并且通过第一导电焊盘输出从光电二极管输出的图像电荷; 以及包括驱动晶体管，选择晶体管，复位晶体管和第二导电焊盘的第二半导体芯片，并且通过第二导电焊盘向相应像素提供与从第一半导体芯片接收的图像电荷相对应的输出电压。第二半导体芯片包括用于降噪的电容器。

5. 发明申请

US20150155323A1 CHIP-STACKED IMAGE SENSOR HAVING HETEROGENEOUS JUNCTION STRUCTURE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：具有异质结结构的芯片堆积图像传感器及其制造方法
公开(公告)号：US20150155323A1
公开(公告)日：2015-06-04
申请号：US14399735
申请日：2012-05-10
申请人： SiliconFile Technologies Inc.
发明人： Heui Gyun Ahn , Jun Ho Won
IPC分类号： H01L27/146
CPC分类号： H01L27/14636 , H01L27/14616 , H01L27/14632 , H01L27/1464 , H01L27/14687 , H01L27/1469 , H01L2224/80895 , H01L2224/80896
摘要： The present invention relates to a chip-stacked image sensor and to a method for manufacturing the same. More particularly, the present invention relates to a chip-stacked image sensor having a heterogeneous junction structure and to a method for manufacturing the same, in which a first semiconductor chip and a second semiconductor chip are manufactured using substrate materials suitable for the characteristics of sensors formed on each semiconductor substrate, and the semiconductor chips are stacked to form an image sensor. According to the chip-stacked image sensor having a heterogeneous junction structure and the method for manufacturing the same, the material for a first semiconductor substrate used in a first semiconductor chip and the material for a second semiconductor substrate used in a second semiconductor chip are different from each other, thus enabling characteristics of sensors formed on each semiconductor chip to be properly exhibited.
摘要翻译：芯片堆叠式图像传感器及其制造方法技术领域本发明涉及芯片堆叠式图像传感器及其制造方法。更具体地，本发明涉及具有异质结结构的芯片堆叠图像传感器及其制造方法，其中使用适合于传感器特性的基板材料制造第一半导体芯片和第二半导体芯片形成在每个半导体衬底上，并且半导体芯片被堆叠以形成图像传感器。根据具有异质结结构的芯片堆叠图像传感器及其制造方法，用于第一半导体芯片的第一半导体衬底的材料和用于第二半导体芯片中的第二半导体衬底的材料是不同的从而能够适当地显示形成在各半导体芯片上的传感器的特性。

6. 发明授权

US08993411B2 Method for forming pad in wafer with three-dimensional stacking structure 有权
标题翻译：在具有三维堆叠结构的晶片中形成焊盘的方法
公开(公告)号：US08993411B2
公开(公告)日：2015-03-31
申请号：US13775178
申请日：2013-02-23
申请人： Siliconfile Technologies Inc.
发明人： Heui-Gyun Ahn , Se-Jung Oh , In-Gyun Jeon , Jun-Ho Won
IPC分类号： H01L21/46 , H01L23/00 , H01L21/683 , H01L23/48 , H01L27/146
CPC分类号： H01L24/03 , H01L21/6835 , H01L23/481 , H01L24/05 , H01L27/1462 , H01L27/14636 , H01L27/1464 , H01L2221/68372 , H01L2224/05093 , H01L2924/01046 , H01L2924/01078
摘要： A method for forming a pad in a wafer with a three-dimensional stacking structure is disclosed. The method includes bonding a device wafer that includes an Si substrate and a handling wafer, thinning a back side of the Si substrate, depositing an anti-reflective layer on the thinned back side of the Si substrate, depositing a back side dielectric layer on the anti-reflective layer, defining a space for a pad in the back side dielectric layer and forming vias that pass through the back side dielectric layer and the anti-reflective layer and contact back sides of super contacts which are formed on the Si substrate, filling one or more metals in the vias and the defined space for the pad, and removing a remnant amount of the metal filled in the space for the pad through planarization by a CMP (chemical mechanical polishing) process.
摘要翻译：公开了一种用于在具有三维堆叠结构的晶片中形成焊盘的方法。该方法包括将包括Si衬底和处理晶片的器件晶片接合，使Si衬底的背面变薄，在Si衬底的减薄的背侧上沉积抗反射层，在其上沉积背面电介质层防反射层，在背面电介质层中形成用于焊盘的空间，并且形成穿过形成在Si衬底上的超级触点的背面电介质层和抗反射层和接触背面的通孔，填充通孔中的一种或多种金属和用于垫的限定空间，以及通过CMP（化学机械抛光）工艺通过平坦化除去填充在垫的空间中的剩余量的金属。

7. 发明申请

US20150053846A1 IMAGE SENSOR WITH 3D STACK STRUCTURE 有权
标题翻译：具有3D堆叠结构的图像传感器
公开(公告)号：US20150053846A1
公开(公告)日：2015-02-26
申请号：US14466258
申请日：2014-08-22
申请人： SILICONFILE TECHNOLOGIES INC.
发明人： Kyung Su BYUN
IPC分类号： H01L27/146 , H04N13/02 , H04N5/232
CPC分类号： H01L27/14629 , H01L27/14634 , H01L27/14647 , H01L27/1469
摘要： Disclosed is an image sensor with a 3D stack structure, in which pixels of a top plate are realized as image pixels and pixels of a bottom plate are realized as pixels for realizing a phase difference AF, so that the phase difference AF is realized without loss of resolution. In the image sensor with a 3D stack structure, a problem of the reduction of resolution, which is a disadvantage of an existing imaging surface phase difference AF device, is solved, so that a fast phase difference AF is realized while maintaining high resolution without a separate phase difference AF module.
摘要翻译：公开了一种具有3D堆叠结构的图像传感器，其中顶板的像素被实现为图像像素，并且底板的像素被实现为用于实现相位差AF的像素，使得相位差AF被实现而没有损失的决议。在具有3D堆叠结构的图像传感器中，解决了现有成像面相位差AF装置的缺点的分辨率降低的问题，从而实现快速相位差AF，同时保持高分辨率而没有单独的相位差AF模块。

8. 发明申请

US20140327061A1 SUBSTRATE STACKED IMAGE SENSOR HAVING A DUAL DETECTION FUNCTION 有权
标题翻译：具有双重检测功能的基板堆叠图像传感器
公开(公告)号：US20140327061A1
公开(公告)日：2014-11-06
申请号：US14359264
申请日：2012-11-08
申请人： SiliconFile Technologies Inc.
发明人： Do Young Lee
IPC分类号： H01L27/146
CPC分类号： H01L27/14647 , H01L27/14621 , H01L27/14627 , H01L27/14634 , H01L27/1464 , H01L27/14641
摘要： The present invention relates to a substrate stacked image sensor having a dual detection function, in which when first to fourth photodiodes are formed in a first substrate, a fifth photodiode is formed in a second substrate, and the substrates are stacked and combined with each other, the first to fourth photodiodes and the fifth photodiode are combined with each other to obtain a complete photodiode as an element of one pixel, and signals individually detected in each photodiode are selectively read or added to be read according to necessity. To this end, the first to fourth photodiodes are formed in the first substrate, the fifth photodiode is formed in the second substrate, the first to fourth photodiodes and the fifth photodiode make electrical contact with each other, and pixel array sizes of the first substrate and the second substrate are allowed to be different from each other, so that sensor resolution of the first substrate and sensor resolution of the second substrate are different from each other.
摘要翻译：本发明涉及具有双重检测功能的基板层叠图像传感器，其中当在第一基板中形成第一至第四光电二极管时，在第二基板中形成第五光电二极管，并且将基板彼此堆叠并组合，第一至第四光电二极管和第五光电二极管彼此组合以获得作为一个像素的元件的完整光电二极管，并且根据需要选择性地读取或添加在每个光电二极管中单独检测的信号以进行读取。为此，第一至第四光电二极管形成在第一衬底中，第五光电二极管形成在第二衬底中，第一至第四光电二极管和第五光电二极管彼此电接触，第一衬底的像素阵列尺寸并且第二基板被允许彼此不同，使得第一基板的传感器分辨率和第二基板的传感器分辨率彼此不同。

9. 发明申请

US20140293099A1 PIXEL ARRAY HAVING WIDE DYNAMIC RANGE AND GOOD COLOR REPRODUCTION AND RESOLUTION AND IMAGE SENSOR USING THE PIXEL ARRAY 有权
标题翻译：像素阵列具有广泛的动态范围和良好的色彩再现和分辨率和使用像素阵列的图像传感器
公开(公告)号：US20140293099A1
公开(公告)日：2014-10-02
申请号：US14306965
申请日：2014-06-17
申请人： SILICONFILE TECHNOLOGIES INC.
发明人： Do-Young LEE
IPC分类号： H01L27/146
CPC分类号： H01L27/14603 , H04N9/045 , H04N2209/045 , H04N2209/047
摘要： Provided is a pixel array having a wide dynamic range, good color reproduction, and good resolution and an image sensor using the pixel array. The pixel array includes a plurality of first type photodiodes, a plurality of second type photodiodes, and a plurality of image signal conversion circuits. A plurality of the second type photodiodes are disposed between the first type photodiodes which are two-dimensionally arrayed. A plurality of the image signal conversion circuits are disposed between the first type photodiodes and the second type photodiodes to process image signals detected by the first type photodiodes and the second type photodiodes. An area of the first type photodiodes is wider than an area of the second type photodiodes.
摘要翻译：提供了具有宽的动态范围，良好的色彩再现和良好的分辨率的像素阵列以及使用像素阵列的图像传感器。像素阵列包括多个第一类型光电二极管，多个第二类型光电二极管和多个图像信号转换电路。多个第二类型光电二极管设置在二维排列的第一类型光电二极管之间。多个图像信号转换电路设置在第一类型光电二极管和第二类型光电二极管之间，以处理由第一类型光电二极管和第二类型光电二极管检测的图像信号。第一类型光电二极管的区域比第二类型光电二极管的区域宽。

10. 发明授权

US09875529B2 Device for removing noise on image using cross-kernel type median filter and method therefor 有权
公开(公告)号：US09875529B2
公开(公告)日：2018-01-23
申请号：US15056472
申请日：2016-02-29
申请人： SILICONFILE TECHNOLOGIES INC.
发明人： Bo Ra Lee , Du Su Shin
IPC分类号： G06T5/20 , G06T5/00
CPC分类号： G06T5/002 , G06T5/20 , G06T2207/20032
摘要： A device for removing a noise on an image using a cross-kernel type median filter includes a target pixel determination unit configured to determine whether a target pixel is a noise or not; a peripheral pixel determination unit configured to determine degrees of the noise on a peripheral pixel information of a peripheral pixel of the target pixel; and a noise removing unit configured to remove the noise of the target pixel and corrects the image by applying a cross-kernel type median filter based on the peripheral pixel information.

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