会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Signaling systems, preamplifiers, memory devices and methods
    • 信号系统,前置放大器,存储器件和方法
    • US09184711B2
    • 2015-11-10
    • US13612482
    • 2012-09-12
    • Seong-Hoon Lee
    • Seong-Hoon Lee
    • H03K19/0175H03F3/24H03K19/003H04L25/02
    • H03F3/245H03K19/00315H04L25/0272
    • Signaling systems, preamplifiers, memory devices and methods are disclosed, such as a signaling system that includes a transmitter configured to receive a first digital signal. The transmitter provides a transmitted signal corresponding to the digital signal to a signal path. A receiver system coupled to the signal line includes a preamplifier coupled to receive the transmitted signal from the signal path. The preamplifier includes a common-gate amplifying transistor that is configured to provide an amplified signal. The receiver system also includes a receiver coupled to receive the amplified signal from the preamplifier. The receiver is configured to provide a second digital signal corresponding to the amplified signal received by the receiver. Such a signaling system may be used in a memory device or in any other electronic circuit.
    • 公开了信号系统,前置放大器,存储器件和方法,例如包括被配置为接收第一数字信号的发射器的信令系统。 发射机将对应于数字信号的发射信号提供给信号路径。 耦合到信号线的接收机系统包括前置放大器,其被耦合以从信号路径接收发送的信号。 前置放大器包括配置成提供放大信号的共栅放大晶体管。 接收机系统还包括接收器,用于从前置放大器接收放大的信号。 接收器被配置为提供对应于由接收器接收的放大信号的第二数字信号。 这样的信令系统可以用在存储器装置或任何其它电子电路中。
    • 4. 发明申请
    • DATA SERIALIZERS, OUTPUT BUFFERS, MEMORY DEVICES AND METHODS OF SERIALIZING
    • 数据串行器,输出缓冲器,存储器件和串行方法
    • US20120243361A1
    • 2012-09-27
    • US13491311
    • 2012-06-07
    • Seong-Hoon Lee
    • Seong-Hoon Lee
    • G11C7/00H03M9/00
    • G11C7/1051G11C7/1048G11C7/1057G11C7/1072G11C11/4093G11C2207/107H03M9/00
    • Data serializers, output buffers, memory devices and methods for serializing are provided, including a data serializer that may convert digits of parallel data to a stream of corresponding digits of serial data digits. One such data serializer may include a logic system receiving the parallel data digits and clock signals having phases that are equally phased apart from each other. Such a data serializer may use the clock signals to generate data sample signals having a value corresponding to the value of a respective one of the parallel data digits and a timing corresponding to a respective one of the clock signals. The data sample signals may be applied to a switching circuit that includes a plurality of switches, such as respective transistors, coupled to each other in parallel between an output node and a first voltage.
    • 提供了数据串行器,输出缓冲器,存储器件和用于串行化的方法,包括可将并行数据的数字转换为串行数据数字的对应数字流的数据串行器。 一个这样的数据串行器可以包括接收并行数据位的逻辑系统和具有彼此相位分开的相位的时钟信号。 这样的数据串行器可以使用时钟信号来产生具有对应于并行数据位中的相应一个的值的值的数据采样信号和对应于相应的一个时钟信号的定时。 数据采样信号可以被施加到包括在输出节点和第一电压之间并联耦合的多个开关(诸如相应的晶体管)的开关电路。
    • 7. 发明申请
    • SIGNALING SYSTEMS, PREAMPLIFIERS, MEMORY DEVICES AND METHODS
    • 信号系统,前置放大器,存储器件和方法
    • US20110254627A1
    • 2011-10-20
    • US12760922
    • 2010-04-15
    • Seong-Hoon Lee
    • Seong-Hoon Lee
    • H03F3/04H03F1/00
    • H03F3/245H03K19/00315H04L25/0272
    • Signaling systems, preamplifiers, memory devices and methods are disclosed, such as a signaling system that includes a transmitter configured to receive a first digital signal. The transmitter provides a transmitted signal corresponding to the digital signal to a signal path. A receiver system coupled to the signal line includes a preamplifier coupled to receive the transmitted signal from the signal path. The preamplifier includes a common-gate amplifying transistor that is configured to provide an amplified signal. The receiver system also includes a receiver coupled to receive the amplified signal from the preamplifier. The receiver is configured to provide a second digital signal corresponding to the amplified signal received by the receiver. Such a signaling system may be used in a memory device or in any other electronic circuit.
    • 公开了信号系统,前置放大器,存储器件和方法,例如包括被配置为接收第一数字信号的发射器的信令系统。 发射机将对应于数字信号的发射信号提供给信号路径。 耦合到信号线的接收机系统包括前置放大器,其被耦合以从信号路径接收发送的信号。 前置放大器包括配置成提供放大信号的共栅放大晶体管。 接收机系统还包括接收器,用于从前置放大器接收放大的信号。 接收器被配置为提供对应于由接收器接收的放大信号的第二数字信号。 这样的信令系统可以用在存储器装置或任何其它电子电路中。
    • 10. 发明申请
    • DATA SERIALIZERS, OUTPUT BUFFERS, MEMORY DEVICES AND METHODS OF SERIALIZING
    • 数据串行器,输出缓冲器,存储器件和串行方法
    • US20110007591A1
    • 2011-01-13
    • US12500207
    • 2009-07-09
    • Seong-Hoon Lee
    • Seong-Hoon Lee
    • G11C7/00H03M9/00G11C8/18
    • G11C7/1051G11C7/1048G11C7/1057G11C7/1072G11C11/4093G11C2207/107H03M9/00
    • Data serializers, output buffers, memory devices and methods for serializing are provided, including a data serializer that may convert digits of parallel data to a stream of corresponding digits of serial data digits. One such data serializer may include a logic system receiving the parallel data digits and clock signals having phases that are equally phased apart from each other. Such a data serializer may use the clock signals to generate data sample signals having a value corresponding to the value of a respective one of the parallel data digits and a timing corresponding to a respective one of the clock signals. The data sample signals may be applied to a switching circuit that includes a plurality of switches, such as respective transistors, coupled to each other in parallel between an output node and a first voltage. A bias element may bias the output node to a second voltage. Each of the switches may be controlled by a respective one of the sample signals.
    • 提供了数据串行器,输出缓冲器,存储器件和用于串行化的方法,包括可将并行数据的数字转换为串行数据数字的对应数字流的数据串行器。 一个这样的数据串行器可以包括接收并行数据位的逻辑系统和具有彼此相位分开的相位的时钟信号。 这样的数据串行器可以使用时钟信号来生成具有对应于并行数据位中的相应一个的值的值的数据采样信号和对应于相应的一个时钟信号的定时。 数据采样信号可以被施加到包括在输出节点和第一电压之间并联耦合的多个开关(诸如相应的晶体管)的开关电路。 偏置元件可将输出节点偏置到第二电压。 每个开关可以由相应的一个采样信号来控制。