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1. 发明授权

US08223568B2 Semiconductor memory device adopting improved local input/output line precharging scheme 有权
标题翻译：采用改进的本地输入/输出线预充电方案的半导体存储器件
公开(公告)号：US08223568B2
公开(公告)日：2012-07-17
申请号：US12588535
申请日：2009-10-19
申请人： Seong-Young Seo
发明人： Seong-Young Seo
IPC分类号： G11C7/12
CPC分类号： G11C11/4096 , G11C5/025 , G11C7/1048 , G11C7/1051 , G11C7/1069 , G11C11/4097 , G11C2207/002
摘要： A semiconductor memory device capable of preventing or minimizing bit line disturbance and performing a low-voltage high-speed operation includes a read data path circuit including a bit line sense amplifier, a local input/output line sense amplifier, a column selecting unit to operationally connect bit lines connected to the bit line sense amplifier to local input/output lines connected to the local input/output line sense amplifier in response to a column selection signal, and a local input/output line precharging unit to precharge the pair of local input/output lines by a first precharging unit, equalizing the pair of local input/output lines by an equalizing unit, and to precharge the local input/output lines by a second precharging unit following an elapsed time after the bit line sense amplifier is activated, while the column selection is deactivated.
摘要翻译：能够防止或最小化位线干扰并执行低电压高速操作的半导体存储器件包括：读数据路径电路，包括位线读出放大器，本地输入/输出线读出放大器，列选择单元将连接到位线读出放大器的位线响应于列选择信号连接到本地输入/输出线路读出放大器的本地输入/输出线，以及本地输入/输出线预充电单元，用于对一对本地输入 /输出线，通过均衡单元对一对本地输入/输出线进行均衡，并且在位线读出放大器被激活之后的经过时间之后由第二预充电单元预充电本地输入/输出线，而列选择被禁用。

2. 发明申请

US20100157702A1 Semiconductor memory device adopting improved local input/output line precharging scheme 有权
标题翻译：采用改进的本地输入/输出线预充电方案的半导体存储器件
公开(公告)号：US20100157702A1
公开(公告)日：2010-06-24
申请号：US12588535
申请日：2009-10-19
申请人： Seong-Young Seo
发明人： Seong-Young Seo
IPC分类号： G11C7/00
CPC分类号： G11C11/4096 , G11C5/025 , G11C7/1048 , G11C7/1051 , G11C7/1069 , G11C11/4097 , G11C2207/002
摘要： A semiconductor memory device capable of preventing or minimizing bit line disturbance and performing a low-voltage high-speed operation includes a read data path circuit including a bit line sense amplifier, a local input/output line sense amplifier, a column selecting unit to operationally connect bit lines connected to the bit line sense amplifier to local input/output lines connected to the local input/output line sense amplifier in response to a column selection signal, and a local input/output line precharging unit to precharge the pair of local input/output lines by a first precharging unit, equalizing the pair of local input/output lines by an equalizing unit, and to precharge the local input/output lines by a second precharging unit following an elapsed time after the bit line sense amplifier is activated, while the column selection is deactivated.
摘要翻译：能够防止或最小化位线干扰并执行低电压高速操作的半导体存储器件包括：读数据路径电路，包括位线读出放大器，本地输入/输出线读出放大器，列选择单元将连接到位线读出放大器的位线响应于列选择信号连接到本地输入/输出线路读出放大器的本地输入/输出线，以及本地输入/输出线预充电单元，用于对一对本地输入 /输出线，通过均衡单元对一对本地输入/输出线进行均衡，并且在位线读出放大器被激活之后的经过时间之后由第二预充电单元预充电本地输入/输出线，而列选择被禁用。

3. 发明授权

US08478366B2 Mobile terminal 有权
标题翻译：移动终端
公开(公告)号：US08478366B2
公开(公告)日：2013-07-02
申请号：US12581703
申请日：2009-10-19
申请人： Duck Moon Shin , Seong Young Seo , Jeong Hyuk Yoon
发明人： Duck Moon Shin , Seong Young Seo , Jeong Hyuk Yoon
IPC分类号： H04M1/00 , G03B21/14 , G03B21/00
CPC分类号： H04M1/0272 , H04M1/0241 , H04M2250/52
摘要： A mobile terminal is disclosed. Specifically, in a mobile terminal having an image photographing or projecting function, the present invention is able to change a photographing or projecting angle of the mobile terminal into a horizontal or vertical direction. And, the present invention is able to change a display direction of an image displayed on a display unit of the mobile terminal in correspondence with the changed photographing or projecting angle to correspond to the changed photographing or projecting angle.
摘要翻译：公开了一种移动终端。具体地，在具有图像拍摄或投影功能的移动终端中，本发明能够将移动终端的拍摄或投影角度改变为水平或垂直方向。并且，本发明能够根据改变的拍摄或投影角度来改变显示在移动终端的显示单元上的图像的显示方向，以对应于改变的拍摄或投影角度。

4. 发明授权

US07684279B2 Semiconductor memory device including distributed data input/output lines 有权
标题翻译：半导体存储器件包括分布式数据输入/输出线
公开(公告)号：US07684279B2
公开(公告)日：2010-03-23
申请号：US11819529
申请日：2007-06-28
申请人： Seong-young Seo
发明人： Seong-young Seo
IPC分类号： G11C8/00
CPC分类号： G11C5/063 , G11C7/1048
摘要： A semiconductor memory device having a hierarchical input/output (I/O) line structure may include a plurality of core blocks, with each core block including a plurality of memory banks sharing an input/output sense amplifier. Data input/output lines may be arranged on each of the plurality of core blocks.
摘要翻译：具有分层输入/输出（I / O）线结构的半导体存储器件可以包括多个核心块，每个核心块包括共享输入/输出读出放大器的多个存储体。数据输入/输出线可以布置在多个核心块中的每一个上。

5. 发明授权

US07464309B2 Method and apparatus for testing semiconductor memory device and related testing methods 有权
标题翻译：用于半导体存储器件测试的方法和装置及相关测试方法
公开(公告)号：US07464309B2
公开(公告)日：2008-12-09
申请号：US11006788
申请日：2004-12-08
申请人： Seong-Young Seo
发明人： Seong-Young Seo
IPC分类号： G11C29/00 , G11C7/00
CPC分类号： G11C29/12 , G11C2029/1204 , G11C2029/2602
摘要： A test method and apparatus for a semiconductor memory device is characterized by the sequentially programmed use of two test different modes. A first test mode tests at least signal line integrity for the semiconductor memory device by testing a merged set of bits line. The second test mode further tests at least signal line integrity after first separating the merged bits lines. Logical combination of test data derived from the first and second test modes are used to generate error detection signals. At least one bit line associated with a parity bit is preferable merged and separated in the foregoing approach.
摘要翻译：用于半导体存储器件的测试方法和装置的特征在于依次编程使用两种测试不同的模式。第一测试模式通过测试合并的位线组来测试至少半导体存储器件的信号线完整性。在第一次分离合并的位线之后，第二个测试模式至少进一步测试信号线的完整性。使用从第一和第二测试模式导出的测试数据的逻辑组合来产生错误检测信号。与奇偶校验位相关联的至少一个位线优选地在前述方法中合并和分离。

6. 发明授权

US07443446B2 Apparatus for controlling rotation angle of a camera module for a mobile communication device 有权
标题翻译：用于控制用于移动通信设备的相机模块的旋转角度的装置
公开(公告)号：US07443446B2
公开(公告)日：2008-10-28
申请号：US10856634
申请日：2004-05-27
申请人： Seong-Young Seo
发明人： Seong-Young Seo
IPC分类号： H04N5/225 , H04M1/00
CPC分类号： H04M1/0264 , H04M1/0214 , H04N5/2253 , H04N2007/145
摘要： An apparatus for controlling a rotation angle of a camera module of a mobile communication device includes: a camera module, a driving force generating means having a rotation shaft, a push member rotatably coupled to the rotation shaft, a camera rotating plate fixed to the camera module, a pivot member for connecting the push member to the camera rotating plate and serving as a pivot for the camera rotating plate, the driving force generating means driving the push member via the rotation shaft for selectively pushing the camera rotating plate to control a rotation angle of the camera module, a boss formed at the center of the camera rotating plate and having a coupling cavity at its central portion, and a projection connected to the rotation shaft of the driving force generating means so as to be inserted in the coupling cavity of the boss.
摘要翻译：一种用于控制移动通信装置的相机模块的旋转角度的装置，包括：相机模块，具有旋转轴的驱动力产生装置，可旋转地联接到旋转轴的推动构件，固定到相机的相机旋转板模块，用于将推动构件连接到相机旋转板并用作相机旋转板的枢轴的枢转构件，驱动力产生装置经由旋转轴驱动推动构件，用于选择性地推动相机旋转板以控制旋转相机模块的角度，形成在相机旋转板的中心处并且在其中心部分处具有联接腔的凸台和连接到驱动力产生装置的旋转轴的突起，以便插入联接腔的老板。

7. 发明申请

US20050102595A1 Method and apparatus for testing semiconductor memory device and related testing methods 有权
标题翻译：用于半导体存储器件测试的方法和装置及相关测试方法
公开(公告)号：US20050102595A1
公开(公告)日：2005-05-12
申请号：US11006788
申请日：2004-12-08
申请人： Seong-Young Seo
发明人： Seong-Young Seo
IPC分类号： G11C29/00 , G11C29/12 , G06F11/00 , G01R31/28
CPC分类号： G11C29/12 , G11C2029/1204 , G11C2029/2602
摘要： A test method and apparatus for a semiconductor memory device is characterized by the sequentially programmed use of two test different modes. A first test mode tests at least signal line integrity for the semiconductor memory device by testing a merged set of bits line. The second test mode further tests at least signal line integrity after first separating the merged bits lines. Logical combination of test data derived from the first and second test modes are used to generate error detection signals. At least one bit line associated with a parity bit is preferable merged and separated in the foregoing approach.
摘要翻译：用于半导体存储器件的测试方法和装置的特征在于依次编程使用两种测试不同的模式。第一测试模式通过测试合并的位线组来测试至少半导体存储器件的信号线完整性。在第一次分离合并的位线之后，第二个测试模式至少进一步测试信号线的完整性。使用从第一和第二测试模式导出的测试数据的逻辑组合来产生错误检测信号。与奇偶校验位相关联的至少一个位线优选地在前述方法中合并和分离。

8. 发明申请

US20100099458A1 MOBILE TERMINAL 有权
标题翻译：移动终端
公开(公告)号：US20100099458A1
公开(公告)日：2010-04-22
申请号：US12581703
申请日：2009-10-19
申请人： Duck Moon SHIN , Seong Young Seo , Jeong Hyuk Yoon
发明人： Duck Moon SHIN , Seong Young Seo , Jeong Hyuk Yoon
IPC分类号： H04M1/00 , H04N5/64
CPC分类号： H04M1/0272 , H04M1/0241 , H04M2250/52
摘要： A mobile terminal is disclosed. Specifically, in a mobile terminal having an image photographing or projecting function, the present invention is able to change a photographing or projecting angle of the mobile terminal into a horizontal or vertical direction. And, the present invention is able to change a display direction of an image displayed on a display unit of the mobile terminal in correspondence with the changed photographing or projecting angle to correspond to the changed photographing or projecting angle.
摘要翻译：公开了一种移动终端。具体地，在具有图像拍摄或投影功能的移动终端中，本发明能够将移动终端的拍摄或投影角度改变为水平或垂直方向。并且，本发明能够根据改变的拍摄或投影角度来改变显示在移动终端的显示单元上的图像的显示方向，以对应于改变的拍摄或投影角度。

9. 发明申请

US20080175073A1 Sense amplifiers and semiconductor memory devices for reducing power consumption and methods for operating the same 有权
标题翻译：感测放大器和用于降低功耗的半导体存储器件及其操作方法
公开(公告)号：US20080175073A1
公开(公告)日：2008-07-24
申请号：US11882738
申请日：2007-08-03
申请人： Seong Young Seo
发明人： Seong Young Seo
IPC分类号： G11C7/06 , H03F3/45
CPC分类号： G11C7/062 , G11C7/065
摘要： In a sense amplifier, a current amplifier outputs a first and a second voltage signal in response to a first control signal. The first and second voltage signals are output based on a detected current difference between a pair of input/output lines. A voltage amplifier generates a third and a fourth voltage signal based on a detected voltage difference between the first and second voltage signals. The third and a fourth voltage signals are generated in response to a second control signal. A first latch circuit latches the third and fourth voltage signals, and outputs a first output signal in response to the second control signal. A second latch circuit latches the first and second voltage signals and outputs a second output signal in response to a third control signal. An output circuit performs a logic operation on the first output signal and the second output signal, and outputs a result of the logic operation as a resultant signal.
摘要翻译：在感测放大器中，电流放大器响应于第一控制信号输出第一和第二电压信号。基于一对输入/输出线之间的检测到的电流差来输出第一和第二电压信号。电压放大器基于检测到的第一和第二电压信号之间的电压差产生第三和第四电压信号。响应于第二控制信号产生第三和第四电压信号。第一锁存电路锁存第三和第四电压信号，并且响应于第二控制信号输出第一输出信号。第二锁存电路锁存第一和第二电压信号，并响应于第三控制信号而输出第二输出信号。输出电路对第一输出信号和第二输出信号执行逻辑运算，并输出逻辑运算结果作为结果信号。

10. 发明申请

US20050041451A1 Multimode data buffer and method for controlling propagation delay time 有权
标题翻译：多模数据缓冲器和传播延迟时间控制方法
公开(公告)号：US20050041451A1
公开(公告)日：2005-02-24
申请号：US10940927
申请日：2004-09-15
申请人： Seong-young Seo , Jung-bae Lee , Byong-mo Moon
发明人： Seong-young Seo , Jung-bae Lee , Byong-mo Moon
IPC分类号： G11C11/409 , G11C7/10 , G11C11/407 , G11C19/08
CPC分类号： G11C7/109 , G11C7/1045 , G11C7/1078 , G11C7/1084
摘要： A data buffer, such as a data strobe input buffer or a data input buffer, which may operate in multiple modes, such as a single mode (SM) and a dual mode (DM) and where the mode is selected by providing a signal, such as an external signal such as an address signal or an external command signal. A data buffer which can be used for a SM/DM dual-use and can improve a data setup/hold margin. A semiconductor memory device including one or more of the data buffers described above. A method for controlling propagation delay times which can improve a data setup/hold margin in a SM/DM dual-use data buffer.
摘要翻译：诸如数据选通输入缓冲器或数据输入缓冲器的数据缓冲器，其可以以多种模式操作，例如单模（SM）和双模（DM），并且其中通过提供信号选择模式，例如诸如地址信号或外部命令信号的外部信号。一种可用于SM / DM两用的数据缓冲器，可以提高数据设置/保持余量。一种包括上述数据缓冲器中的一个或多个的半导体存储器件。一种用于控制传播延迟时间的方法，其可以改善SM / DM两用数据缓冲器中的数据建立/保持余量。

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