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1. 发明授权

US08786815B2 Driving circuit and display panel having the same 有权
标题翻译：驱动电路和显示面板相同
公开(公告)号：US08786815B2
公开(公告)日：2014-07-22
申请号：US13330627
申请日：2011-12-19
申请人： Chih-Hung Lin , Wu-Liu Tsai , Chuan-Sheng Wei , Che-Chia Chang , Sheng-Chao Liu , Yu-Cheng Chen , Yi-Hui Li , Maw-Song Chen
发明人： Chih-Hung Lin , Wu-Liu Tsai , Chuan-Sheng Wei , Che-Chia Chang , Sheng-Chao Liu , Yu-Cheng Chen , Yi-Hui Li , Maw-Song Chen
IPC分类号： G02F1/133 , G02F1/1368
CPC分类号： G02F1/133707 , G02F1/136213 , G02F2201/40
摘要： A display panel having a display region and a non-display region is provided. The display panel includes a plurality of pixel structures in the display region, and each pixel structure includes a scan line, a data line, a first active device, a pixel electrode, a first insulating layer, a capacitor electrode, and a second insulating layer. The first active device includes a first gate, a first channel, a first source, and a first drain. The second insulating layer covers the first insulating layer and the capacitor electrode and is located between the capacitor electrode and the first drain. At least one driving circuit is disposed in the non-display region and includes at least one second active device. Hence, a relatively thin insulating layer can be disposed between the capacitor electrode and the drain to reduce the area of the capacitor region and to achieve a desired aperture ratio.
摘要翻译：提供具有显示区域和非显示区域的显示面板。显示面板包括显示区域中的多个像素结构，并且每个像素结构包括扫描线，数据线，第一有源器件，像素电极，第一绝缘层，电容器电极和第二绝缘层。第一有源器件包括第一栅极，第一沟道，第一源极和第一漏极。第二绝缘层覆盖第一绝缘层和电容器电极，并且位于电容器电极和第一漏极之间。至少一个驱动电路设置在非显示区域中并且包括至少一个第二有源器件。因此，可以在电容器电极和漏极之间设置相对薄的绝缘层，以减小电容器区域的面积并实现所需的孔径比。

2. 发明授权

US08248353B2 Method and device for reducing voltage stress at bootstrap point in electronic circuits 有权
标题翻译：用于降低电子电路自举点电压应力的方法和装置
公开(公告)号：US08248353B2
公开(公告)日：2012-08-21
申请号：US11894752
申请日：2007-08-20
申请人： Sheng-Chao Liu , Chen-Ming Chen , Ming-Tien Lin
发明人： Sheng-Chao Liu , Chen-Ming Chen , Ming-Tien Lin
IPC分类号： G09G3/36
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/0286 , G09G2330/04
摘要： A discharging device is used to reduce the voltage level at a bootstrap point in an electronic circuit such as a shift register circuit. In such a circuit, a first transistor in a conducting state receives an input pulse and conveys it to the gate terminal of a second transistor, causing the second transistor to be in a conducting state. This gate terminal is known as a bootstrap point. After receiving the input pulse, an output pulse is produced at one drain/source terminal of the second transistor. During the time period of the output pulse, the first transistor is in a non-conducting state and the voltage level at the bootstrap point is high, imposing a stress upon the first transistor. A discharging circuit consisting of at least one transistor is coupled to the bootstrap point in order to reduce the voltage level at the output pulse period.
摘要翻译：放电装置用于降低诸如移位寄存器电路的电子电路中的自举点处的电压电平。在这种电路中，导通状态的第一晶体管接收输入脉冲并将其传送到第二晶体管的栅极端子，使第二晶体管处于导通状态。该门终端被称为引导点。在接收到输入脉冲之后，在第二晶体管的一个漏极/源极端产生输出脉冲。在输出脉冲的时间周期期间，第一晶体管处于非导通状态，并且自举点处的电压电平高，对第一晶体管施加应力。由至少一个晶体管组成的放电电路耦合到自举点，以便降低输出脉冲周期的电压电平。

3. 发明申请

US20120092240A1 DRIVING CIRCUIT AND DISPLAY PANEL HAVING THE SAME 有权
标题翻译：驱动电路和显示面板
公开(公告)号：US20120092240A1
公开(公告)日：2012-04-19
申请号：US13330627
申请日：2011-12-19
申请人： Chih-Hung Lin , Wu-Liu Tsai , Chuan-Sheng Wei , Che-Chia Chang , Sheng-Chao Liu , Yu-Cheng Chen , Yi-Hui Li , Maw-Song Chen
发明人： Chih-Hung Lin , Wu-Liu Tsai , Chuan-Sheng Wei , Che-Chia Chang , Sheng-Chao Liu , Yu-Cheng Chen , Yi-Hui Li , Maw-Song Chen
IPC分类号： G09G3/36 , H03B1/00
CPC分类号： G02F1/133707 , G02F1/136213 , G02F2201/40
摘要： An active device, a pixel structure, and a display panel are provided. The pixel structure includes a scan line, a data line, an active device, a first insulating layer, a pixel electrode, a capacitor electrode, and a second insulating layer. The active device includes a gate, a channel, a source, and a drain. The gate is electrically connected to the scan line. The source is electrically connected to the data line. The first insulating layer is disposed between the gate and the channel. The pixel electrode is electrically connected to the drain. The capacitor electrode is located on the first insulating layer. The second insulating layer is located between the capacitor electrode and the drain.
摘要翻译：提供有源器件，像素结构和显示面板。像素结构包括扫描线，数据线，有源器件，第一绝缘层，像素电极，电容器电极和第二绝缘层。有源器件包括栅极，沟道，源极和漏极。栅极电连接到扫描线。源电连接到数据线。第一绝缘层设置在栅极和沟道之间。像素电极电连接到漏极。电容电极位于第一绝缘层上。第二绝缘层位于电容器电极和漏极之间。

4. 发明授权

US08154061B2 Bottom gate thin film transistor and active array substrate 有权
标题翻译：底栅薄膜晶体管和有源阵列衬底
公开(公告)号：US08154061B2
公开(公告)日：2012-04-10
申请号：US12500609
申请日：2009-07-10
申请人： Chuan-Sheng Wei , Guang-Ren Shen , Chang-Yu Huang , Pei-Ming Chen , Sheng-Chao Liu , Chun-Hsiun Chen , Wei-Ming Huang
发明人： Chuan-Sheng Wei , Guang-Ren Shen , Chang-Yu Huang , Pei-Ming Chen , Sheng-Chao Liu , Chun-Hsiun Chen , Wei-Ming Huang
IPC分类号： H01L31/062
CPC分类号： H01L29/42384 , H01L29/41733 , H01L29/66765
摘要： A bottom gate thin film transistor and an active array substrate are provided. The bottom gate thin film transistor includes a gate, a gate insulation layer, a semiconductor layer, a plurality of sources and a plurality of drains. The gate insulation layer is disposed on the gate. The semiconductor layer is disposed on the gate insulation layer and located above the gate. An area ratio of the semiconductor layer and the gate is about 0.001 to 0.9. The sources are electrically connected with each other, and the drains are electrically connected with each other.
摘要翻译：提供底栅薄膜晶体管和有源阵列基板。底栅薄膜晶体管包括栅极，栅极绝缘层，半导体层，多个源极和多个漏极。栅极绝缘层设置在栅极上。半导体层设置在栅极绝缘层上并位于栅极上方。半导体层和栅极的面积比约为0.001〜0.9。源极彼此电连接，并且漏极彼此电连接。

5. 发明申请

US20110279491A1 DRIVING METHOD OF BISTABLE DISPLAY DEVICE 有权
标题翻译：双向显示装置的驱动方法
公开(公告)号：US20110279491A1
公开(公告)日：2011-11-17
申请号：US13070597
申请日：2011-03-24
申请人： Sheng-Chao LIU , Yao-Jen Hsieh , Ching-Huan Lin
发明人： Sheng-Chao LIU , Yao-Jen Hsieh , Ching-Huan Lin
IPC分类号： G09G5/10
CPC分类号： G09G3/344 , G09G2300/0842 , G09G2310/061 , G09G2320/0252
摘要： An exemplary driving method is adapted for a bistable display device including a pixel array. The pixel array includes a plurality of first pixels and a plurality of second pixels arranged in a predetermined manner. The driving method includes the following steps of: during a first time period, providing the first pixels with a first pixel voltage for black insertion and providing the second pixels with a second pixel voltage different from the first pixel voltage; during a second time period following the first time period, providing the first pixels with the second pixel voltage for white insertion and maintaining the second pixels provided with the second pixel voltage for white insertion; and during a third time period following the second time period, initiating the first pixels to display a gray scale image and providing the second pixels with the first pixel voltage for black insertion.
摘要翻译：示例性驱动方法适用于包括像素阵列的双稳态显示装置。像素阵列包括以预定方式布置的多个第一像素和多个第二像素。该驱动方法包括以下步骤：在第一时间段期间，为第一像素提供用于黑插入的第一像素电压，并为第二像素提供不同于第一像素电压的第二像素电压; 在第一时间段之后的第二时间段期间，为第一像素提供用于白插入的第二像素电压，并保持提供有第二像素电压的第二像素进行白插入; 并且在第二时间段之后的第三时间段期间，启动第一像素以显示灰度图像，并为第二像素提供用于黑色插入的第一像素电压。

6. 发明申请

US20100295764A1 DISPLAY DEVICE 有权
标题翻译：显示设备
公开(公告)号：US20100295764A1
公开(公告)日：2010-11-25
申请号：US12551538
申请日：2009-08-31
申请人： Tsang-Hong Wang , Yun-Chung Lin , Sheng-Chao Liu , Chung-Lung Li
发明人： Tsang-Hong Wang , Yun-Chung Lin , Sheng-Chao Liu , Chung-Lung Li
IPC分类号： G09G3/36
CPC分类号： G02F1/136286 , G02F1/136277
摘要： A display device includes a substrate, gate lines, data lines, data signal links, and contact vias. The substrate includes a display region, and a peripheral region surrounding the display region. The gate lines, data lines, data signal links, and contact vias are disposed within the display region of the substrate. The gate lines cross the data lines. Each of the data signal links is disposed between adjacent gate lines. Each of the contact vias is disposed between each of the data signal links and a corresponding data line, such that each of the data signal links is electrically connected with the corresponding data line.
摘要翻译：显示装置包括基板，栅极线，数据线，数据信号链路和接触孔。基板包括显示区域和围绕显示区域的外围区域。栅极线，数据线，数据信号链路和接触通孔设置在衬底的显示区域内。栅极线穿过数据线。每个数据信号链路设置在相邻的栅极线之间。每个接触孔设置在每个数据信号链路和相应的数据线之间，使得每个数据信号链路与相应的数据线电连接。

7. 发明申请

US20060284254A1 Pixel structures and methods for fabricating the same 审中-公开
标题翻译：像素结构及其制造方法
公开(公告)号：US20060284254A1
公开(公告)日：2006-12-21
申请号：US11246467
申请日：2005-10-07
申请人： Sheng-Chao Liu , Jian-Shen Yu , Chun-Sheng Li
发明人： Sheng-Chao Liu , Jian-Shen Yu , Chun-Sheng Li
IPC分类号： H01L27/12
CPC分类号： H01L27/1255 , H01L29/78645
摘要： Pixel structures and methods for fabricating the same are provided. The pixel structure comprises a thin film transistor formed on a substrate. The thin film transistor comprises a gate electrode and an active layer. The active layer comprises a source region and a drain region doped with a first dopant. A capacitor is formed on the substrate. The capacitor comprises a lower electrode and an upper electrode. The lower electrode is doped with a second dopant electrically connecting the source region. The first dopant and the second dopant are of different types.
摘要翻译：提供了像素结构及其制造方法。像素结构包括形成在衬底上的薄膜晶体管。薄膜晶体管包括栅电极和有源层。有源层包括掺杂有第一掺杂剂的源区和漏区。在基板上形成电容器。电容器包括下电极和上电极。下电极掺杂有电连接源区的第二掺杂剂。第一掺杂剂和第二掺杂剂是不同类型的。

8. 发明申请

US20060017685A1 Single clock driven shift register and driving method for same 有权
标题翻译：单时钟驱动移位寄存器和驱动方法相同
公开(公告)号：US20060017685A1
公开(公告)日：2006-01-26
申请号：US11144939
申请日：2005-06-06
申请人： Jung-Chun Tseng , Sheng-Chao Liu , Jian-Shen Yu , Yih-Sheng Yu
发明人： Jung-Chun Tseng , Sheng-Chao Liu , Jian-Shen Yu , Yih-Sheng Yu
IPC分类号： G09G3/36
CPC分类号： G11C19/00 , G09G3/3674 , G09G3/3685 , G11C19/28
摘要： A single clock driven shift register comprising multiple stages is provided. The (M)th stage comprises a latch unit, a logic unit, and a non-overlap buffer. The latch unit latches an input signal from the (M−1)th stage according to a clock signal. The logic unit connecting to an output terminal of the latch unit deals with an output signal of the latch unit and the clock signal with an NAND logic calculation. The non-overlap buffer connecting to the output terminal of the logic unit comprises at least three inverters connected in a serial, and an output signal of the first inverter coupled to the output terminal of the logic unit is input to an latch unit of the (M+1)th stage. Meanwhile, an output signal of the non-overlap buffer of the (M−1)th stage is input to the non-overlap buffer or the logic unit to delay the output signal of the non-overlap buffer.
摘要翻译：提供包括多级的单个时钟驱动移位寄存器。第（M）级包括锁存单元，逻辑单元和非重叠缓冲器。锁存单元根据时钟信号锁存来自第（M-1）级的输入信号。连接到锁存单元的输出端的逻辑单元用NAND逻辑计算处理锁存单元的输出信号和时钟信号。连接到逻辑单元的输出端子的非重叠缓冲器包括串联连接的至少三个反相器，并且耦合到逻辑单元的输出端的第一反相器的输出信号被输入到 M + 1）级。同时，将第（M-1）级的非重叠缓冲器的输出信号输入到非重叠缓冲器或逻辑单元，以延迟非重叠缓冲器的输出信号。

9. 发明授权

US08848001B2 Driving method of bistable display device 有权
标题翻译：双稳态显示装置的驱动方法
公开(公告)号：US08848001B2
公开(公告)日：2014-09-30
申请号：US13070597
申请日：2011-03-24
申请人： Sheng-Chao Liu , Yao-Jen Hsieh , Ching-Huan Lin
发明人： Sheng-Chao Liu , Yao-Jen Hsieh , Ching-Huan Lin
IPC分类号： G09G5/10 , G09G3/34
CPC分类号： G09G3/344 , G09G2300/0842 , G09G2310/061 , G09G2320/0252
摘要： An exemplary driving method is adapted for a bistable display device including a pixel array. The pixel array includes a plurality of first pixels and a plurality of second pixels arranged in a predetermined manner. The driving method includes the following steps of: during a first time period, providing the first pixels with a first pixel voltage for black insertion and providing the second pixels with a second pixel voltage different from the first pixel voltage; during a second time period following the first time period, providing the first pixels with the second pixel voltage for white insertion and maintaining the second pixels provided with the second pixel voltage for white insertion; and during a third time period following the second time period, initiating the first pixels to display a gray scale image and providing the second pixels with the first pixel voltage for black insertion.
摘要翻译：示例性驱动方法适用于包括像素阵列的双稳态显示装置。像素阵列包括以预定方式布置的多个第一像素和多个第二像素。该驱动方法包括以下步骤：在第一时间段期间，为第一像素提供用于黑插入的第一像素电压，并为第二像素提供不同于第一像素电压的第二像素电压; 在第一时间段之后的第二时间段期间，为第一像素提供用于白插入的第二像素电压，并保持提供有第二像素电压的第二像素进行白插入; 并且在第二时间段之后的第三时间段期间，启动第一像素以显示灰度图像，并为第二像素提供用于黑色插入的第一像素电压。

10. 发明授权

US08294651B2 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US08294651B2
公开(公告)日：2012-10-23
申请号：US12508573
申请日：2009-07-24
申请人： Ching-Huan Lin , Hsiang-Lin Lin , Shih-Chia Hsu , Sheng-Chao Liu , Kuang-Hsiang Liu
发明人： Ching-Huan Lin , Hsiang-Lin Lin , Shih-Chia Hsu , Sheng-Chao Liu , Kuang-Hsiang Liu
IPC分类号： G09G3/36
CPC分类号： G02F1/136286 , G09G3/3655 , G09G2300/0456 , G09G2320/0673
摘要： A liquid crystal display (LCD) is provided. The LCD includes a display panel and a voltage supply device (VSD). The display panel includes a plurality of scan lines, a plurality of data lines disposed substantially perpendicularly with the scan lines, and a plurality of pixels. The pixels are respectively electrically connected with the corresponding data line and the corresponding scan line, and are arranged in an array. Each of the pixels includes a common line and a compensation line, wherein the common line is located in the transparent area to receive a common voltage, and the compensation line is located in the reflection area to receive a stable voltage. The VSD is coupled to the compensation line of each of the pixels for continuously and correspondingly providing the stable voltage to the compensation line of each of the pixels.
摘要翻译：提供液晶显示器（LCD）。 LCD包括显示面板和电压供应装置（VSD）。显示面板包括多条扫描线，与扫描线大致垂直设置的多条数据线以及多个像素。像素分别与相应的数据线和对应的扫描线电连接，并且被排列成阵列。每个像素包括公共线和补偿线，其中公共线位于透明区域中以接收公共电压，并且补偿线位于反射区域中以接收稳定的电压。 VSD耦合到每个像素的补偿线，用于连续地并相应地将稳定的电压提供给每个像素的补偿线。

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