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1. 发明授权

US08405536B2 Communication system for frequency shift keying signal 有权
标题翻译：通讯系统用于频移键控信号
公开(公告)号：US08405536B2
公开(公告)日：2013-03-26
申请号：US13329751
申请日：2011-12-19
申请人： Ting-Yuan Cheng , Jin-Lien Lin , Shih-Hsien Yang
发明人： Ting-Yuan Cheng , Jin-Lien Lin , Shih-Hsien Yang
IPC分类号： H03M1/12
CPC分类号： H04L27/122
摘要： A communication system includes a time-to-digital converter, a digital low-pass filter, and a digital signal processor. The time-to-digital converter receives an in-phase signal of a frequency-shift keying signal and to generate a digital signal according to the in-phase signal. The digital low-pass filter receives the digital signal and to generate a filtered signal including N continuous words according to the digital signal. The digital signal processor divides up the N continuous words into N/2 word sets in order, wherein each of the N/2 word sets includes a first word and a second word, and if a difference between the first word and the second word meets a predetermined condition, the digital signal processor generates an output data and an output clock according to all the first words and the second words that have difference which meets the predetermined condition.
摘要翻译：通信系统包括时间 - 数字转换器，数字低通滤波器和数字信号处理器。时间 - 数字转换器接收频移键控信号的同相信号，并根据同相信号产生数字信号。数字低通滤波器接收数字信号并根据数字信号产生包括N个连续字的滤波信号。数字信号处理器按顺序将N个连续字分成N / 2个字组，其中N / 2个字组中的每一个包括第一个字和第二个字，并且如果第一个字和第二个字之间的差值满足在预定条件下，数字信号处理器根据满足预定条件的所有第一个字和第二个字产生一个输出数据和一个输出时钟。

2. 发明申请

US20120320200A1 VIDEO FRAME SYNCHRONIZATION FOR A FEDERATION OF PROJECTORS USING CAMERA FEEDBACK 有权
标题翻译：使用摄像机反馈进行投影机联网的视频帧同步
公开(公告)号：US20120320200A1
公开(公告)日：2012-12-20
申请号：US13528675
申请日：2012-06-20
申请人： ADITI MAJUMDER , FADI KURDAHI , KIARASH AMIRI , MAGDA EL ZARKI , SHIH-HSIEN YANG
发明人： ADITI MAJUMDER , FADI KURDAHI , KIARASH AMIRI , MAGDA EL ZARKI , SHIH-HSIEN YANG
IPC分类号： H04N9/475 , H04N17/04 , H04N5/66 , H04N7/18
CPC分类号： G06F3/017 , H04N9/3147
摘要： A method of audio and video synchronization may include capturing an image by each of a plurality of cameras. The images and audio may be compared with each other for synchronization.
摘要翻译：音频和视频同步的方法可以包括通过多个照相机中的每一个拍摄图像。可以将图像和音频彼此进行比较以进行同步。

3. 发明申请

US20100146221A1 Method For Protecting Memory Data 审中-公开
标题翻译：保护内存数据的方法
公开(公告)号：US20100146221A1
公开(公告)日：2010-06-10
申请号：US12329544
申请日：2008-12-06
申请人： Bei-Chuan Chen , Li-Hsiang Chan , Shih-Hsien Yang
发明人： Bei-Chuan Chen , Li-Hsiang Chan , Shih-Hsien Yang
IPC分类号： G06F12/14
CPC分类号： G06F12/1416
摘要： A method for protecting memory data is provided, by extracting bad block addresses stored in the bad block information obtained during the memory scanning testing as memory label, and using an algorithm to compute an identification based on the memory label so that the memory will check the identification and whether the blocks pointed by memory label being bad blocks when an external device request data reading so as to prevent the unauthorized data from being read and achieve the object of protecting memory data.
摘要翻译：提供一种用于保护存储器数据的方法，通过提取存储在存储器扫描测试期间获得的坏块信息中的坏块地址作为存储器标签，并且使用算法基于存储器标签来计算标识，使得存储器将检查当外部设备请求数据读取以便防止未经授权的数据被读取并且实现保护存储器数据的对象时，识别和由存储器标签指向的块是否是坏块。

4. 发明申请

US20070283095A1 Method to access storage device through universal serial bus 审中-公开
标题翻译：通过通用串行总线访问存储设备的方法
公开(公告)号：US20070283095A1
公开(公告)日：2007-12-06
申请号：US11447571
申请日：2006-06-06
申请人： Chi-Tung Chang , Shih-Hsien Yang , Ching-Wen Wang
发明人： Chi-Tung Chang , Shih-Hsien Yang , Ching-Wen Wang
IPC分类号： G06F12/00
CPC分类号： G06F3/0656 , G06F3/0613 , G06F3/0679
摘要： A method to access storage device through universal serial bus (USB) is disclosed in the present invention. The storage device includes a flash controller and a flash memory. The method includes: (1)connecting the storage device to a USB interface of an electronic device such as a computer; (2)transferring a plurality of access (reading/writing) instructions to a flash controller from the electronic device;(3)deciding which data needed to be temporarily saved in a flash random access memory and the priority order of the access instructions according to a mapping table of a flash file system by the flash controller; (4)writing the data temporarily saved in the flash random access memory into the flash memory according to the priority order by the flash controller. The method can enhance the operation efficiency of the storage device.
摘要翻译：在本发明中公开了一种通过通用串行总线（USB）访问存储设备的方法。存储设备包括闪存控制器和闪存。该方法包括：（1）将存储设备连接到诸如计算机的电子设备的USB接口; （2）从电子设备向闪存控制器传送多个访问（读/写）指令;（3）根据闪存控制器的闪存随机存取存储器中的哪些数据和访问指令的优先级顺序闪存控制器的闪存文件系统的映射表; （4）根据闪存控制器的优先级顺序将临时保存在闪存随机存取存储器中的数据写入闪速存储器。该方法可以提高存储设备的运行效率。

5. 发明授权

US06847557B2 Method of erasing non-volatile memory data 有权
标题翻译：擦除非易失性存储器数据的方法
公开(公告)号：US06847557B2
公开(公告)日：2005-01-25
申请号：US10248499
申请日：2003-01-24
申请人： Shih-Hsien Yang
发明人： Shih-Hsien Yang
IPC分类号： G11C16/04 , G11C16/14 , H01L21/8239
CPC分类号： G11C16/14
摘要： A method of erasing non-volatile memory data. The erasing method includes applying a first voltage to a substrate, applying a second voltage to a control gate and setting both source terminal and drain terminal to a floating state during a first time interval so that F-N tunneling can be utilized to carry out an erasing operation. In a second time interval, the control gate voltage is changed from the first voltage applied to a third voltage. In a third time interval, the substrate voltage is changed from the second voltage to 0 volt to prevent over-erasure of the non-volatile memory. The second voltage and the first voltage are in reverse bias. Similarly, the third voltage and the first voltage are also in reverse bias.
摘要翻译：一种擦除非易失性存储器数据的方法。擦除方法包括向基板施加第一电压，向控制栅极施加第二电压，并且在第一时间间隔期间将源极端子和漏极端子设置为浮置状态，使得可以利用FN隧道来执行擦除操作。在第二时间间隔中，控制栅极电压从施加到第三电压的第一电压变化。在第三时间间隔中，衬底电压从第二电压变为0伏，以防止非易失性存储器的过度擦除。第二电压和第一电压处于反向偏置。类似地，第三电压和第一电压也是反向偏压。

6. 发明授权

US06776622B2 Conductive contact structure and process for producing the same 有权
标题翻译：导电接触结构及其制造方法
公开(公告)号：US06776622B2
公开(公告)日：2004-08-17
申请号：US10205449
申请日：2002-07-26
申请人： Shih-Hsien Yang , Yueh-Cheng Chuang , Bor-Ru Sheu
发明人： Shih-Hsien Yang , Yueh-Cheng Chuang , Bor-Ru Sheu
IPC分类号： H05K100
CPC分类号： H01L21/76877 , H01L21/76895 , H01L23/53238 , H01L24/03 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/04941 , H01L2924/14 , H01L2924/19041
摘要： A conductive contact structure to electrically connect to a source/drain region in a semiconductor substrate and a process of making the same. An inlay opening including a pad opening and a bottom opening is formed in the dielectric layer on the semiconductor substrate. The pad opening is larger than and located upon the bottom opening that exposes the source/drain region. The bottom opening and pad opening are sequentially filled with a polysilicon layer and a tungsten layer to form a bottom plug and a metal pad layer, respectively.
摘要翻译：电连接到半导体衬底中的源极/漏极区域的导电接触结构及其制造方法。在半导体衬底上的电介质层中形成包括衬垫开口和底部开口的镶嵌开口。焊盘开口大于并位于露出源极/漏极区域的底部开口上。底部开口和衬垫开口依次填充有多晶硅层和钨层，分别形成底部塞子和金属垫层。

7. 发明授权

US08826195B2 Layout modification method and system 有权
标题翻译：布局修改方法和系统
公开(公告)号：US08826195B2
公开(公告)日：2014-09-02
申请号：US13530164
申请日：2012-06-22
申请人： Meng-Xiang Lee , Li-Chung Hsu , Shih-Hsien Yang , Ho Che Yu , King-Ho Tam , Chung-Hsing Wang
发明人： Meng-Xiang Lee , Li-Chung Hsu , Shih-Hsien Yang , Ho Che Yu , King-Ho Tam , Chung-Hsing Wang
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5031 , G06F2217/02 , G06F2217/78 , G06F2217/84
摘要： A method comprises providing a non-transitory, machine-readable storage medium storing a partial netlist of at least a portion of a previously taped-out integrated circuit (IC) layout, representing a set of photomasks for fabricating an IC having the IC layout such that the IC meets a first specification value. A computer identifies a proper subset of a plurality of first devices in the IC layout, such that replacement of the proper subset of the first devices by second devices in a revised IC layout satisfies a second specification value different from the first specification value. At least one layout mask is generated and stored in at least one non-transitory machine readable storage medium, accessible by a tool for forming at least one additional photomask, such that the set of photomasks and the at least one additional photomask are usable to fabricate an IC according to the revised IC layout.
摘要翻译：一种方法包括提供一种非暂时的机器可读存储介质，其存储至少部分先前采集的集成电路（IC）布局的部分网表，其表示用于制造具有IC布局的IC的一组光掩模，该IC满足第一规格值。计算机识别IC布局中的多个第一设备的正确子集，使得经修订的IC布局中的第二设备对第一设备的正确子集的替换满足与第一规范值不同的第二规范值。至少一个布局掩模被生成并存储在至少一个非暂时机器可读存储介质中，可由用于形成至少一个附加光掩模的工具访问，使得该组光掩模和至少一个附加光掩模可用于制造一个IC根据修订的IC布局。

8. 发明申请

US20060114451A1 Method and apparatus for measuring brightness 失效
标题翻译：测量亮度的方法和装置
公开(公告)号：US20060114451A1
公开(公告)日：2006-06-01
申请号：US11130090
申请日：2005-05-17
申请人： Chung-Wei Wang , Shih-Hsien Yang
发明人： Chung-Wei Wang , Shih-Hsien Yang
IPC分类号： G01J1/42
CPC分类号： G01J1/42 , G01J1/32 , G01J2001/4247
摘要： An apparatus for measuring brightness transmitted by a light-emitting display unit of a laser telescope and observed by the user's eyes comprises a focusing unit (11), a sensor unit (12), a processing unit (13) and a display unit (14). A method of measuring brightness includes the steps of: providing a constant color temperature to simulate the external light; providing a tool platform and locating the apparatus for measuring brightness and the laser telescope under test thereon; further providing a light-impermeable cover to cover the laser telescope and the apparatus for avoiding the external light interfering with the measurement of brightness; then turning on the laser telescope and enabling it to range; picking up the light of a reticle and a measured value transmitted from the light-emitting display unit by means of the apparatus for measuring brightness; and at last, displaying the measured value on the display unit of said apparatus for measuring brightness.
摘要翻译：用于测量由激光望远镜的发光显示单元传输并由用户观察到的亮度的设备包括聚焦单元（11），传感器单元（12），处理单元（13）和显示单元（14））。测量亮度的方法包括以下步骤：提供恒定的色温以模拟外部光; 提供工具平台和定位用于测量亮度的设备和被测试的激光望远镜; 进一步提供不透光的盖以覆盖激光望远镜和设备，用于避免外部光线干扰亮度的测量; 然后打开激光望远镜，使其能够射程; 通过用于测量亮度的装置拾取掩模版的光和从发光显示单元发送的测量值; 并且最后在所述用于测量亮度的装置的显示单元上显示测量值。

9. 发明授权

US06845347B1 Method for modeling an integrated circuit including a DRAM cell 有权
标题翻译：包括DRAM单元的集成电路建模方法
公开(公告)号：US06845347B1
公开(公告)日：2005-01-18
申请号：US09621698
申请日：2000-07-21
申请人： Shih Hsien Yang , Shyh-Chyi Wong
发明人： Shih Hsien Yang , Shyh-Chyi Wong
IPC分类号： G06F7/60 , G06F17/10 , G06F17/50 , G11C11/00
CPC分类号： G06F17/5036
摘要： Method and apparatus determine the performance of an integrated circuit that includes at least one of a plurality of deep-well trench dynamic random-access memory (DRAM) cells. The method includes executing a circuit simulator for designing an integrated circuit that contains at least one of a plurality of DRAM cells. Further, the method includes calculating a set of output parameters with the circuit simulator for each of the plurality of DRAM cells utilizing, for example, a deep-well trench DRAM cell model for each of the plurality of DRAM cells.
摘要翻译：方法和装置确定包括多个深阱沟槽动态随机存取存储器（DRAM）单元中的至少一个的集成电路的性能。该方法包括执行用于设计包含多个DRAM单元中的至少一个的集成电路的电路模拟器。此外，该方法包括利用例如用于多个DRAM单元中的每个DRAM单元的深井沟槽DRAM单元模型，利用电路模拟器为多个DRAM单元中的每一个单元计算一组输出参数。

10. 发明授权

US06377067B1 Testing method for buried strap and deep trench leakage current 失效
标题翻译：掩埋带和深沟漏电流测试方法
公开(公告)号：US06377067B1
公开(公告)日：2002-04-23
申请号：US09495753
申请日：2000-02-01
申请人： Shih-Hsien Yang , Chuan-Jane Chao
发明人： Shih-Hsien Yang , Chuan-Jane Chao
IPC分类号： G01R3126
CPC分类号： G01R31/2621
摘要： A method for measuring both buried strap and deep trench leakage currents in DRAM cell capacitors. By keeping the voltages on both plates of the capacitor equal, the buried strap leakage current (IBS) may be isolated and measured. A range of voltages is applied to a terminal of an associated transistor to obtain a corresponding range of buried strap leakage currents. An unequal voltage is next applied across the capacitor, and a total leakage current is measured. By applying a known potential to a substrate of the transistor during this total leakage current measurement, the associated IBS may be determined. Next, the IBS is subtracted from the measured total leakage current to obtain the deep trench leakage current (IDT).
摘要翻译：一种用于测量DRAM单元电容器中的埋藏带和深沟漏电流的方法。通过保持电容器的两个电压相等，可以隔离和测量掩埋带漏电流（IBS）。将一定范围的电压施加到相关联的晶体管的端子，以获得掩埋带泄漏电流的对应范围。接着在电容器两端施加不等电压，并测量总泄漏电流。通过在该总泄漏电流测量期间将已知电位施加到晶体管的衬底，可以确定相关联的IBS。接下来，从测量的总泄漏电流中减去IBS以获得深沟漏电流（IDT）。

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