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    • 1. 发明授权
    • Method and device for searching fixed length data
    • 用于搜索固定长度数据的方法和设备
    • US07469243B2
    • 2008-12-23
    • US10707943
    • 2004-01-27
    • Masaya MoriShinpei WatanabeYoshihisa TakatsuToshio Sunaga
    • Masaya MoriShinpei WatanabeYoshihisa TakatsuToshio Sunaga
    • G06F7/00G06F12/00G06F15/16
    • G06F17/30949G06F7/02Y10S707/99933
    • Embodiments of the present invention provide method and device for searching fixed length data. The device includes a hash operation means for operating and outputting a hash value of inputted fixed length data, a data table memory consisting of N numbers of memory banks, where N is an integer that is more than and equal to 2, the data table memory for storing a data table holding a large number of fixed length data, a pointer table memory for storing a memory pointer table holding a memory address at which each fixed length datum is stored with the hash value as an index, and a comparison means for simultaneously comparing a plurality of fixed length data stored at the same memory address in the N numbers of memory banks with a single fixed length datum inputted to the hash operation means, the comparison means for outputting results of the comparison.
    • 本发明的实施例提供了用于搜索固定长度数据的方法和装置。 该装置包括用于操作和输出输入的固定长度数据的散列值的散列操作装置,由N个存储体组成的数据表存储器,其中N是大于等于2的整数,数据表存储器 用于存储保持大量固定长度数据的数据表;指针表存储器,用于存储存储指针表,该存储器指针表保存以散列值作为索引存储每个固定长度数据的存储器地址;以及比较装置,用于同时 将存储在N个存储体组中的相同存储器地址的多个固定长度数据与输入到散列运算装置的单个固定长度数据进行比较,该比较装置用于输出比较结果。
    • 2. 发明申请
    • Search apparatus and search management method for fixed-length data
    • 固定长度数据的搜索设备和搜索管理方法
    • US20070194957A1
    • 2007-08-23
    • US10599589
    • 2004-03-31
    • Shinpei Watanabe
    • Shinpei Watanabe
    • H03M7/00
    • G06F17/30675H04L45/745Y10S707/99933Y10S707/99942
    • Fixed-length data (560) contained in a database (560) are segmented into a number of pieces of data that are searchable at a time and searching is performed at high speed. As means for it, a pointer table (500), a secondary pointer table, a local table, and a fixed-length-data table are provided, and when more segmentation is required, a table having a numeric-value comparing function is further provided. As means for performing efficient configuration/management of the tables and for performing management that does not interfere with a search operation, an empty-house table (700), an empty-room table (720), a room-management table (740), and a structure-management table (760) may be provided.
    • 包含在数据库(560)中的固定长度数据(560)被分割成一次可搜索的多条数据,并且以高速进行搜索。 作为其手段,提供指针表(500),次指针表,本地表和固定长度数据表,并且当需要更多分割时,具有数值比较功能的表进一步 提供。 作为用于执行表的有效配置/管理以及用于执行不干扰搜索操作的管理的手段,空房表(700),空房间表(720),房间管理表(740) ,并且可以提供结构管理表(760)。
    • 5. 发明授权
    • Search memory, memory search controller, and memory search method
    • 搜索内存,内存搜索控制器和内存搜索方法
    • US06898661B2
    • 2005-05-24
    • US10248781
    • 2003-02-18
    • Masaya MoriToshio SunagaShinpei Watanabe
    • Masaya MoriToshio SunagaShinpei Watanabe
    • G06F12/00G11C15/00G06F12/02
    • G11C15/00Y10S707/99933
    • A distributor and a search controller are added to the memory. A search is performed with an algorithm such as quick search by repeating reading of memory cells, comparing of the reading result, and narrowing down of entries to be compared based on the comparison result. Performing this sequential processing in the memory provides valid data in a bus time plus about half of a cycle time required in repeating reading a conventional memory. Then, the latter half of the cycle time can be used for comparison, as well as generation of the next memory cell address, so that the search can be finished in a bus time multiplied by the number of repetitions of reading the memory cells plus one bus time. As a result, a CAM function can be achieved that allows for more than tens of thousands of entry data items, the number of which is equal to the size of DRAM divided by the number of banks, rather than hundreds or thousands of entry data items as conventional CAM.
    • 分配器和搜索控制器被添加到存储器中。 基于比较结果,通过重复读取存储器单元,比较读取结果和缩小要比较的条目来进行快速搜索等算法的搜索。 在存储器中执行这种顺序处理在总线时间内提供有效的数据加上重复读取常规存储器所需的周期时间的大约一半。 然后,循环时间的后半部分可以用于比较,以及下一个存储单元地址的生成,使得可以在总线时间乘以读取存储器单元的重复次数加上一个 公共汽车时间。 结果,可以实现CAM功能,其允许数以万计的入口数据项,其数目等于DRAM的大小除以银行的数量,而不是数百或数千个条目数据项 如传统CAM。
    • 7. 发明授权
    • Device for controlling data transfer between chips via a bus
    • 用于通过总线控制芯片之间的数据传输的装置
    • US5553252A
    • 1996-09-03
    • US284873
    • 1994-08-02
    • Kazunori TakayanagiShinpei Watanabe
    • Kazunori TakayanagiShinpei Watanabe
    • G06F13/36G06F13/38G06T11/00G09G5/39G06K19/06
    • G09G5/39G09G2352/00G09G2360/127
    • A draw control chip and video chips V1-V4 are provided. They are connected by a 64-bit data bus, a 4-bit program signal line, and a 1-bit ready signal line. The video chip V1 comprises a decoder DEC1, a program buffer address register PBAR, a sequencer SEQ, a program buffer PB, a decoder DEC2, an address control unit, a selector SEL, and various registers. The video chip V1 and the video buffer APA1 are connected by the data bus. This system is used to transfer data from the control chip to the various video chips in a single operation. The 64-bit data bus can be divided into smaller sections allowing smaller segments of data to be simultaneously processed by the video chips. Additionally, the video chips are capable of providing data directly to one another without accessing the control chip.
    • 提供了绘图控制芯片和视频芯片V1-V4。 它们通过64位数据总线,4位程序信号线和1位就绪信号线连接。 视频芯片V1包括解码器DEC1,程序缓冲器地址寄存器PBAR,定序器SEQ,程序缓冲器PB,解码器DEC2,地址控制单元,选择器SEL和各种寄存器。 视频芯片V1和视频缓冲器APA1通过数据总线连接。 该系统用于在单个操作中将数据从控制芯片传送到各种视频芯片。 64位数据总线可以分为更小的部分,允许由视频芯片同时处理较小的数据段。 此外,视频芯片能够在不访问控制芯片的情况下直接提供数据。