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    • 1. 发明申请
    • Ion implantation for increasing etch rate differential between adjacent materials
    • 用于增加相邻材料之间的蚀刻速率差的离子注入
    • US20070202707A1
    • 2007-08-30
    • US11710271
    • 2007-02-23
    • Sophia Wen
    • Sophia Wen
    • H01L21/302
    • H01L21/32134H01L21/30604
    • Ion implantation is used to modify the chemical properties of portions of a material, such that the modified portions respond differently to a chemical etching operation than do the unmodified portions of the material. In a further aspect of the present invention, ion implants into a wafer are performed at different energies so as to form three-dimensional patterns of chemically modified material within the body of a wafer. In a still further aspect of the present invention, three-dimensional patterns of etched tunnels within a wafer are formed, and in some embodiments provide for reduced parasitic capacitance and/or reduced leakage currents for electronic circuits.
    • 离子注入用于改变材料部分的化学性质,使得改性部分与化学蚀刻操作的反应不同于材料的未改性部分。 在本发明的另一方面中,以不同的能量进行到晶片中的离子注入,以便在晶片体内形成化学改性材料的三维图案。 在本发明的另一方面,形成晶片内的蚀刻通道的三维图案,并且在一些实施例中为电子电路提供减小的寄生电容和/或减小的漏电流。
    • 2. 发明授权
    • Ion implantation for increasing etch rate differential between adjacent materials
    • 用于增加相邻材料之间的蚀刻速率差的离子注入
    • US07790621B2
    • 2010-09-07
    • US11710271
    • 2007-02-23
    • Sophia Wen
    • Sophia Wen
    • H01L21/302H01L21/461
    • H01L21/32134H01L21/30604
    • Ion implantation is used to modify the chemical properties of portions of a material, such that the modified portions respond differently to a chemical etching operation than do the unmodified portions of the material. In a further aspect of the present invention, ion implants into a wafer are performed at different energies so as to form three-dimensional patterns of chemically modified material within the body of a wafer. In a still further aspect of the present invention, three-dimensional patterns of etched tunnels within a wafer are formed, and in some embodiments provide for reduced parasitic capacitance and/or reduced leakage currents for electronic circuits.
    • 离子注入用于改变材料部分的化学性质,使得改性部分与化学蚀刻操作的反应不同于材料的未改性部分。 在本发明的另一方面中,以不同的能量进行到晶片中的离子注入,以便在晶片体内形成化学改性材料的三维图案。 在本发明的另一方面,形成晶片内的蚀刻通道的三维图案,并且在一些实施例中为电子电路提供减小的寄生电容和/或减小的漏电流。
    • 3. 发明申请
    • Chemical process operations on wafers having through-holes and a pressure differential between the major surfaces thereof
    • 在具有通孔的晶片上的化学处理操作和其主表面之间的压差
    • US20070256710A1
    • 2007-11-08
    • US11827886
    • 2007-07-12
    • Sophia WenAnthony Humpage
    • Sophia WenAnthony Humpage
    • B08B9/00
    • H01L21/67086
    • Post-etch cleaning of through-holes, or deep vias, in a wafer includes introduction of a cleaning agent to a first major surface of the wafer establishing a pressure differential across the wafer, and removing the cleaning agent from both sides of the wafer. An apparatus provides for receiving and holding a wafer within a chamber; establishing a reservoir adjacent each of a first and second major surface of the wafer; each reservoir being an enclosed space defined by the inner surface of a portion of the chamber, and a major surface of the wafer. In some embodiments a gasket, such as an O-ring, is provided to form the seal between the chamber and the wafer. Alternatively, a seal between chamber and wafer is obtained by contacting the chamber directly to an outer annular portion of the wafer and applying pressure. Post-etch cleaning of through-holes includes providing a first sealed reservoir adjacent a first major surface of a wafer, providing a second sealed reservoir adjacent a second major surface of the wafer, injecting a first cleaning agent into the first sealed reservoir, establishing a pressure differential between the first and second reservoirs, and removing the first cleaning agent from the first and second reservoirs.
    • 在晶片中的通孔或深通孔的蚀刻后清洁包括将清洁剂引入到晶片的第一主表面,从而在晶片上形成压差,并从晶片的两侧移除清洁剂。 一种设备用于在一个室内接收和保持晶片; 建立与所述晶片的第一和第二主表面相邻的储存器; 每个储存器是由室的一部分的内表面和晶片的主表面限定的封闭空间。 在一些实施例中,提供垫圈,例如O形环,以在腔室和晶片之间形成密封。 或者,腔室和晶片之间的密封通过将腔室直接接触到晶片的外部环形部分并施加压力而获得。 通孔的蚀刻后清洗包括提供与晶片的第一主表面相邻的第一密封容器,提供与晶片的第二主表面相邻的第二密封容器,将第一清洁剂注入到第一密封容器中,建立 在第一和第二储存器之间的压力差,以及从第一和第二储存器移除第一清洁剂。
    • 6. 发明授权
    • Semiconductor wafer cleaning system
    • 半导体晶圆清洗系统
    • US09368378B2
    • 2016-06-14
    • US14145882
    • 2013-12-31
    • Sophia Wen
    • Sophia Wen
    • H01L21/67
    • H01L21/6719H01L21/67051H01L21/67057H01L21/6708H01L21/67086H01L21/67126H01L21/67253
    • A semiconductor wafer cleaning apparatus comprising a first supporting unit, a movable unit having a first chamber, a second supporting unit having a second chamber, and a third supporting unit is provided. A micro processing chamber in which the semiconductor wafer is being processed is formed when the first chamber is brought in contact with the second chamber. Each of the supporting units is supported by a corresponding supporting plate, and each supporting plate is positioned and strengthened by a plurality of supporting bars on its peripheral. Such design will prevent the deformation of the supporting plates, reduce the particles generated by the friction of parts resulted from the opening or closure of the micro processing chamber, and allow the easy alignment of these units.
    • 一种半导体晶片清洁装置,包括第一支撑单元,具有第一室的可移动单元,具有第二室的第二支撑单元和第三支撑单元。 当第一室与第二室接触时,形成处理半导体晶片的微处理室。 每个支撑单元由相应的支撑板支撑,并且每个支撑板由其周边上的多个支撑杆定位和加强。 这种设计将防止支撑板的变形,减少由微处理室的打开或闭合导致的部件摩擦产生的颗粒,并允许这些单元的容易对准。
    • 7. 发明申请
    • Semiconductor Processing Device
    • 半导体处理器件
    • US20140034238A1
    • 2014-02-06
    • US14111859
    • 2012-04-14
    • Sophia Wen
    • Sophia Wen
    • H01L21/67
    • H01L21/67023H01L21/67063H01L21/6719H01L21/67748
    • Embodiments of a semiconductor processing apparatus are disclosed. The semiconductor processing apparatus includes a micro chamber for tightly accommodating and processing a semiconductor wafer. The micro chamber includes an upper chamber portion defining an upper working surface and a lower chamber portion defining a lower working surface. The upper chamber portion and the lower chamber portion are relatively movable between an open position for loading and removing the semiconductor wafer and a closed position for tightly accommodating the semiconductor wafer. The semiconductor processing apparatus adopts a modified column device, a lower chamber portion and a balance correction device to achieve easy operation and maintenance, better prevention of chemical processing fluid leakage, and corrosion-resistant design.
    • 公开了半导体处理装置的实施例。 半导体处理装置包括用于紧密地容纳和处理半导体晶片的微室。 微室包括限定上工作表面的上室部分和限定下工作表面的下室部分。 上室部分和下室部分在用于装载和移除半导体晶片的打开位置和用于紧密地容纳半导体晶片的关闭位置之间可相对移动。 半导体处理装置采用改性柱装置,下室部分和平衡校正装置,以实现易于操作和维护,更好地防止化学处理流体泄漏和耐腐蚀设计。
    • 8. 发明授权
    • Method and apparatus for dynamic thin-layer chemical processing of semiconductor wafers
    • 用于半导体晶片的动态薄层化学处理的方法和装置
    • US07938906B2
    • 2011-05-10
    • US10865013
    • 2004-06-10
    • Sophia Wen
    • Sophia Wen
    • C23C16/00H01L21/00
    • H01L21/67253H01L21/67051H01L21/67057H01L21/6708H01L21/67086
    • A semiconductor wafer processing and analysis apparatus (20) includes a processing micro chamber (22) for closely receiving a semiconductor wafer (27) therein. The chamber may be opened for loading and removing the semiconductor wafers and then closed for processing of the wafer wherein chemical reagents and other fluids are introduced into the chamber. Small clearances are provided between the upper surface, the lower surfaces, and the perimeter edge of the wafer and the corresponding portions of the processing chamber. A high-speed collection system is provided for collecting and removing the spent reagents and fluids from the chamber for either on-line or off-line analysis or for waste treatment.
    • 半导体晶片处理和分析装置(20)包括用于在其中紧密接收半导体晶片(27)的处理微室(22)。 该室可以打开以装载和移除半导体晶片,然后关闭以处理晶片,其中将化学试剂和其它流体引入室中。 在晶片的上表面,下表面和周边边缘以及处理室的对应部分之间提供小的间隙。 提供了一种高速收集系统,用于从室内收集和除去废试剂和流体,用于在线或离线分析或用于废物处理。
    • 10. 发明申请
    • Adjustable Semiconductor Processing Device And Control Method Thereof
    • 可调半导体处理装置及其控制方法
    • US20150079802A1
    • 2015-03-19
    • US14363286
    • 2011-12-30
    • Sophia Wen
    • Sophia Wen
    • H01L21/67H01L21/02H01L21/306
    • H01L21/6719H01L21/02052H01L21/30604H01L21/67023H01L21/6708
    • Disclosed is an adjustable semiconductor processing apparatus and a control method thereof. The apparatus comprises a micro chamber with an upper chamber portion defining an upper working surface and a lower chamber portion defining a lower working surface that are relatively moveable towards each other between an open position and a closed position. When the chamber is in the closed position, a cavity formed by the upper working surface and the lower working surface defines a gap between the upper working surface, the lower working surface and a semiconductor wafer received in the cavity for flow of a processing fluid. A drive device enables the upper working surface of the upper chamber portion or/and the lower working surface of the lower chamber portion to tilt or deform to control flow of chemical agents within the micro chamber.
    • 公开了一种可调节半导体处理装置及其控制方法。 该装置包括微室,其具有限定上工作表面的上室部分和限定下打开表面的下室部分,所述下工作表面在打开位置和关闭位置之间可相对于彼此相对移动。 当腔室处于关闭位置时,由上工作表面和下工作表面形成的空腔在上工作表面,下工作表面和容纳在腔中的半导体晶片之间限定了处理流体流动的间隙。 驱动装置使得上室部分的上工作表面或/和下室部分的下工作表面能够倾斜或变形,以控制微室内的化学试剂的流动。