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    • 7. 发明申请
    • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    • 半导体器件及其制造方法
    • US20120280325A1
    • 2012-11-08
    • US13457985
    • 2012-04-27
    • Chang Seob KIMTae Kyung KIM
    • Chang Seob KIMTae Kyung KIM
    • H01L27/088H01L21/336
    • H01L27/1157H01L21/76229H01L21/764H01L21/76802H01L21/7682H01L21/76829H01L29/40114
    • A semiconductor device includes first gate lines arranged at a first interval over a substrate and each configured to have a silicide layer as a highest layer, second gate lines arranged at a second interval greater than the first interval over the substrate and each configured to have the silicide layer as the highest layer, a first insulating layer formed between the first gate lines over the substrate and includes a gap; a second insulating layer formed on the sidewalls of the second gate lines, an etch-stop layer adjacent the second insulating layer, a third insulating layer located over and between the first gate lines and over and between the second gate lines, a capping layer over the third insulating layer, and a contact plug adjacent to the capping layer and the third insulating layer and coupled to a junction, the junction adjacent the substrate between the second gate lines.
    • 半导体器件包括在衬底上以第一间隔排列的第一栅极线,并且每个被配置为具有硅化物层作为最高层,第二栅极线以大于衬底上的第一间隔的第二间隔布置,并且每个被配置为具有 硅化物层作为最高层,在衬底上的第一栅极线之间形成的包括间隙的第一绝缘层; 形成在所述第二栅极线的侧壁上的第二绝缘层,与所述第二绝缘层相邻的蚀刻停止层,位于所述第一栅极线之间并且位于所述第一栅极线之间且位于所述第二栅极线之间和之间的第三绝缘层, 所述第三绝缘层和与所述覆盖层和所述第三绝缘层相邻并且接合到所述第二栅极线之间的与所述衬底相邻的所述结的接触插塞。
    • 9. 发明授权
    • Apparatus and method for controlling inverter
    • 控制逆变器的装置及方法
    • US07881080B2
    • 2011-02-01
    • US12088542
    • 2006-12-28
    • Sung-Min ParkTae-Kyung Kim
    • Sung-Min ParkTae-Kyung Kim
    • H02M1/12H02M1/14
    • H02P23/03H02P2205/01
    • An apparatus and method for controlling an inverter capable of enhancing reliability of current measurement by ensuring an optimal time for which effective voltage vectors are applied to detect a three-phase current according to a phase current and sizes of the effective voltage vectors, the apparatus comprising a space voltage modulator that generates and outputs effective voltage vectors based upon a voltage command value, and a low modulation determiner that determines whether the effective voltage vectors are located within a low modulation region, and outputs a low modulation switching control signal or a normal modulation switching control signal according to the determination.
    • 一种用于控制逆变器的装置和方法,其能够通过确保施加有效电压矢量的最佳时间来根据有效电压矢量的相电流和大小检测三相电流来提高电流测量的可靠性,该装置包括 空间电压调制器,其基于电压指令值产生并输出有效电压矢量;以及低调制确定器,其确定有效电压矢量是否位于低调制区域内,并输出低调制切换控制信号或正常调制 切换控制信号根据确定。
    • 10. 发明申请
    • Method of Forming Patterns of Semiconductor Device
    • 半导体器件形成方法
    • US20100323520A1
    • 2010-12-23
    • US12650462
    • 2009-12-30
    • Tae Kyung Kim
    • Tae Kyung Kim
    • H01L21/3205
    • H01L21/76838H01L21/76816
    • A method of forming patterns of a semiconductor device comprises forming a number of first insulating patterns that define sidewalls by patterning a first insulating layer formed over a semiconductor substrate, forming second insulating patterns, each second insulating pattern comprising a horizontal portion having two ends and being parallel to the semiconductor substrate and spaced protruding portions protruding from both ends of the horizontal portion parallel to the sidewalls of the first insulating patterns, forming third insulating patterns each filling a space between the protruding portions, removing the protruding portions to form trenches, and forming conductive patterns within the respective trenches.
    • 一种形成半导体器件的图形的方法包括:通过对形成在半导体衬底上形成的第一绝缘层进行构图来形成限定侧壁的多个第一绝缘图案,形成第二绝缘图案,每个第二绝缘图案包括具有两端的水平部分, 平行于半导体衬底,并且与水平部分的两端突出的间隔开的突出部分平行于第一绝缘图案的侧壁,形成第三绝缘图案,每个填充突出部分之间的空间,去除突出部分以形成沟槽,并形成 各个沟槽内的导电图案。