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1. 发明申请

US20080107134A1 Multiple access apparatus and method using power line 有权
标题翻译：使用电力线的多路访问装置和方法
公开(公告)号：US20080107134A1
公开(公告)日：2008-05-08
申请号：US11594021
申请日：2006-11-07
申请人： Hideaki Okazaki , Takuji Kawamoto
发明人： Hideaki Okazaki , Takuji Kawamoto
IPC分类号： H04J13/00
CPC分类号： H04B1/707 , H04B3/542 , H04B2203/5408 , H04B2203/5416 , H04B2203/5425 , H04B2203/5445 , H04B2203/5495
摘要： Provided is a telecommunication apparatus and a telecommunication method accomplishing a one-to-many, many-to-one, and many-to-many simultaneous accesses in a power line telecommunication of a code division multiple access (CDMA) by using an AC power line (including the ground).A comprisal includes an external power line model 1, a power distribution board 2 and an indoor power line model 3 which is connected to a power line by way of a capacitor for shutting off a sine wave of a power signal of a low frequency; a terminal station 5 and a base station 4 perform a power line telecommunication by way of a plug outlet; and the terminal station 5 controls and manages electric appliances installed in the indoor power line model 3. The terminal station 5 and base station 4 which are connected to the power line are connected to the Internet by way of a line; the base station 4 comprises a media converter 7 and a data link controller 8 which are connected to an external data bus, and also a power line telecommunication controller 9 for controlling a transmission and reception of an information signal and a synchronous signal; the terminal station 5 comprises a power line telecommunication controller 9 for controlling a transmission and reception of an information signal and a synchronous signal, thereby accomplishing an apparatus and method for carrying out a power line telecommunication.
摘要翻译：提供了一种电信设备和电信方法，其通过使用AC电源来实现码分多址（CDMA）的电力线电信中的一对多，多对一和多对多同时访问线（包括地面）。包括外部电力线模型1，配电板2和室内电力线模型3，其通过用于关闭低频功率信号的正弦波的电容器连接到电力线; 终端站5和基站4通过插头插座进行电力线通信; 终端站5控制和管理安装在室内电力线模型3中的电器。连接到电力线的终端站5和基站4通过线路连接到因特网; 基站4包括连接到外部数据总线的媒体转换器7和数据链路控制器8，以及用于控制信息信号和同步信号的发送和接收的电力线电信控制器9; 终端站5包括用于控制信息信号和同步信号的发送和接收的电力线通信控制器9，从而实现用于执行电力线通信的装置和方法。

2. 发明申请

US20110067034A1 INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM 有权
标题翻译：信息处理设备，信息处理方法和信息处理程序
公开(公告)号：US20110067034A1
公开(公告)日：2011-03-17
申请号：US12991980
申请日：2009-05-13
申请人： Takuji Kawamoto
发明人： Takuji Kawamoto
IPC分类号： G06F9/46
CPC分类号： G06F9/461
摘要： An information processing device for causing a processor to execute a plurality of threads by switching between them. Each thread performs a process in correspondence with an obtainment of an event. The information processing device, when causing a second thread to transit from a non-execution state to an execution state to replace a first thread, detects whether or not, in the first thread having transited to the non-execution state, a next start position of a process belongs to an already processed part, detects whether or not a start position of a process in the second thread in the execution state belongs to the processed part; and determines whether or not to set a context for execution of the second thread into the processor in accordance with detection results of the first and second detection units, and performs processing in accordance with the determination.
摘要翻译：一种信息处理装置，用于使处理器通过在它们之间切换来执行多个线程。每个线程执行与事件获取相对应的处理。信息处理装置在使第二线程从非执行状态转移到执行状态以替换第一线程时，检测在第一线程已经转移到非执行状态的下一个起始位置的处理属于已经处理的部分，检测执行状态下的第二线程中的进程的开始位置是否属于处理部分; 并且根据第一和第二检测单元的检测结果确定是否将用于执行第二线程的上下文设置到处理器中，并且根据该确定来执行处理。

3. 发明授权

US07865169B2 Multiple access apparatus and method using power line 有权
标题翻译：使用电力线的多路访问装置和方法
公开(公告)号：US07865169B2
公开(公告)日：2011-01-04
申请号：US11594021
申请日：2006-11-07
申请人： Hideaki Okazaki , Takuji Kawamoto
发明人： Hideaki Okazaki , Takuji Kawamoto
IPC分类号： H04L12/28
CPC分类号： H04B1/707 , H04B3/542 , H04B2203/5408 , H04B2203/5416 , H04B2203/5425 , H04B2203/5445 , H04B2203/5495
摘要： Provided is a telecommunication apparatus and a telecommunication method accomplishing a one-to-many, many-to-one, and many-to-many simultaneous accesses in a power line telecommunication of a code division multiple access (CDMA) by using an AC power line (including the ground).
摘要翻译：提供了一种电信设备和电信方法，其通过使用AC电源来实现码分多址（CDMA）的电力线电信中的一对多，多对一和多对多同时访问线（包括地面）。

4. 发明授权

US07624387B2 Compiler, program product, compilation device, communication terminal device, and compilation method 有权
标题翻译：编译器，程序产品，编译设备，通信终端设备和编译方法
公开(公告)号：US07624387B2
公开(公告)日：2009-11-24
申请号：US10819166
申请日：2004-04-07
申请人： Takehiro Yoshida , Takuji Kawamoto
发明人： Takehiro Yoshida , Takuji Kawamoto
IPC分类号： G06F9/45
CPC分类号： G06F8/4441 , G06F8/433
摘要： A complier, program product, compilation device, communication terminal device and compilation method that enables parts of a source program having a large number of executions, or parts having a high possibility of a large number of executions, to be extracted with good precision and compiled preferentially. A loop having a multi-nested structure or a single-nested structure is searched for in a main program, and another program that is being called from within this loop is detected. Additionally, a loop having a multi-nested structure or a single-nested structure is searched for in the callee program, and the total number of nests in the loops detected so far is calculated as the loop depth. In other words, the degree of multiplicity in all of the loops forming a multi-nested structure over programs having a calling relationship is calculated as the loop depth. The loop having the greatest loop depth is included in the parts to be compiled preferentially, and only the parts determined as parts to be compiled are compiled.
摘要翻译：编译器，程序产品，编译设备，通信终端设备和编译方法，其能够以高精度提取具有大量执行的源程序的部分或具有大量执行的可能性的部分，并且编译优先。在主程序中搜索具有多嵌套结构或单嵌套结构的循环，并且检测从该循环内被调用的另一程序。此外，在被调用程序中搜索具有多嵌套结构或单嵌套结构的循环，并且计算到目前为止检测到的循环中的巢的总数作为循环深度。换句话说，在具有调用关系的程序上形成多嵌套结构的所有循环中的多重度被计算为循环深度。具有最大循环深度的循环优先包含在要编译的部分中，并且仅编译被确定为要编译的部分的部分。

5. 发明授权

US07571436B2 Device for increasing the execution speed of a linked program 失效
标题翻译：用于增加链接程序执行速度的设备
公开(公告)号：US07571436B2
公开(公告)日：2009-08-04
申请号：US10814183
申请日：2004-04-01
申请人： Takehiro Yoshida , Takuji Kawamoto , Masaki Kawai
发明人： Takehiro Yoshida , Takuji Kawamoto , Masaki Kawai
IPC分类号： G06F9/44
CPC分类号： G06F9/44521
摘要： The speed of execution of linked programs is improved to the extent possible within the limit of the capacity of memory storing linked programs. As initial settings, all class libraries are set for linking. By this means, all class libraries are linked. Then, a judgment is made as to whether there is overflow of memory storing linked programs. If there is overflow, the maximum value of the number of applications using currently linked class libraries is set in variable N. Then, settings are modified such that class libraries used by N or more applications are not linked, and linking is again performed. If memory overflow does not occur, processing ends.
摘要翻译：链接程序的执行速度在存储链接程序的存储容量的限度内尽可能地提高。作为初始设置，所有类库都设置为链接。通过这种方式，所有类库都链接起来。然后，判断存储链接节目的存储器是否溢出。如果存在溢出，则使用当前链接的类库的应用程序数量的最大值设置为变量N.然后，修改设置，使得N个或更多应用程序使用的类库未链接，并再次执行链接。如果不发生内存溢出，则处理结束。

6. 发明授权

US08392932B2 Information processing device for causing a processor to context switch between threads including storing contexts based on next thread start position 有权
标题翻译：用于使处理器在线程之间进行上下文切换的信息处理设备，包括基于下一个线程开始位置存储上下文
公开(公告)号：US08392932B2
公开(公告)日：2013-03-05
申请号：US12991980
申请日：2009-05-13
申请人： Takuji Kawamoto
发明人： Takuji Kawamoto
IPC分类号： G06F9/46 , G06F7/38 , G06F9/00 , G06F9/44
CPC分类号： G06F9/461
摘要： An information processing device for causing a processor to execute a plurality of threads by switching between them. Each thread performs a process in correspondence with an obtainment of an event. The information processing device, when causing a second thread to transit from a non-execution state to an execution state to replace a first thread, detects whether or not, in the first thread having transited to the non-execution state, a next start position of a process belongs to an already processed part, detects whether or not a start position of a process in the second thread in the execution state belongs to the processed part; and determines whether or not to set a context for execution of the second thread into the processor in accordance with detection results of the first and second detection units, and performs processing in accordance with the determination.
摘要翻译：一种信息处理装置，用于使处理器通过在它们之间切换来执行多个线程。每个线程执行与事件获取相对应的处理。信息处理装置在使第二线程从非执行状态转移到执行状态以替换第一线程时，检测在第一线程已经转移到非执行状态的下一个起始位置的处理属于已经处理的部分，检测执行状态下的第二线程中的进程的开始位置是否属于处理部分; 并且根据第一和第二检测单元的检测结果确定是否将用于执行第二线程的上下文设置到处理器中，并且根据该确定来执行处理。

7. 发明申请

US20070277177A1 Information processing device, information processing method, and computer-readable information recording medium recorded with information processing program 审中-公开
标题翻译：信息处理装置，信息处理方法以及记录有信息处理程序的计算机可读信息记录介质
公开(公告)号：US20070277177A1
公开(公告)日：2007-11-29
申请号：US11806002
申请日：2007-05-29
申请人： Takuji Kawamoto
发明人： Takuji Kawamoto
IPC分类号： G06F9/46
CPC分类号： G06F9/3851
摘要： An object of the invention is to control the priorities of threads so that the respective threads optimize the information amount stored in a storage in an autonomous distributed manner, and to optimize the processing load of the entirety of a processing system without control overhead. The storage stores information therein. The CPU executes a thread including a writing operation of writing information into the storage, and a reading operation of reading the information from the storage. The CPU controls a priority of the thread based on an information amount stored in the storage in at least one of conditions when the writing operation has been executed, and when the reading operation has been executed.
摘要翻译：本发明的一个目的是控制线程的优先级，使得各个线程以自主分布的方式优化存储在存储器中的信息量，并且优化整个处理系统的处理负载而无需控制开销。存储器存储其中的信息。 CPU执行包括将信息写入存储器的写入操作的线程以及从存储器读取信息的读取操作。当执行写入操作的条件中的至少一个以及执行读取操作时，CPU基于存储在存储器中的信息量来控制线程的优先级。

8. 发明授权

US07203798B2 Data memory cache unit and data memory cache system 有权
标题翻译：数据存储器缓存单元和数据存储器缓存系统
公开(公告)号：US07203798B2
公开(公告)日：2007-04-10
申请号：US10802930
申请日：2004-03-18
申请人： Takuji Kawamoto
发明人： Takuji Kawamoto
IPC分类号： G06F12/00
CPC分类号： G06F12/0875
摘要： A data memory cache unit is provided which is capable of heightening the speed of memory access. The cache unit 117 executes reading and writing of data in a 16-byte width line unit in a main memory unit 131, executes reading and writing of data in an MPU 113 in the unit of a four-byte width small area included in each line. When the MPU 113 executes a push instruction, if a cache miss takes place on a line which includes a small area that holds data which should be read out to the MPU 113 (NO at S1), then the cache unit 117 opens the line (S301). If a small area into which the data sent from the MPU 113 should be written is adjacent to a line boundary on the side where an address is larger or on the side where write-in is earlier executed (YES at S56), then the cache unit 117 does not execute a refill, and if this small area is not adjacent to the line boundary (NO at S56), then it executes a refill (S21).
摘要翻译：提供了能够提高存储器访问速度的数据存储器高速缓存单元。高速缓存单元117执行主存储单元131中的16字节宽度线单元中的数据的读取和写入，以每行包括的四字节宽度的小区域为单位执行MPU 113中的数据的读取和写入。当MPU 113执行推送指令时，如果包括保存应向MPU 113读出的数据的小区域（S1为“否”）的行发生高速缓存未命中，则高速缓存单元117打开该行（S301）。如果要写入从MPU 113发送的数据的小区域与地址较大侧或者较早执行写入侧的线边界相邻（在S56为“是”），则高速缓存单元117不执行再填充，并且如果该小区域不与线边界相邻（在S56为否），则执行补充（S21）。

9. 发明授权

US07024657B2 Program generation apparatus for program execution system, replaces variable name in each class file by assigned offset number so that same offset numbers are assigned to non-dependent variables with same variable name 失效
标题翻译：用于程序执行系统的程序生成装置，通过分配的偏移号替换每个类文件中的变量名，以便将相同的偏移号分配给具有相同变量名的非依赖变量
公开(公告)号：US07024657B2
公开(公告)日：2006-04-04
申请号：US09789021
申请日：2001-02-20
申请人： Masaki Kawai , Takuji Kawamoto
发明人： Masaki Kawai , Takuji Kawamoto
IPC分类号： G06F9/44
CPC分类号： G06F8/54 , G06F9/4492
摘要： A program generation apparatus for generating light-weight class files for each terminal apparatus by linking class files. The program generation apparatus includes: a storage unit for prestoring the class files for each terminal apparatus, where each class defines (a) dependent variables unique to each terminal apparatus and (b) non-dependent variables common to all the terminal apparatuses, each variable is identified by a variable name, and each class file includes a variable name for each variable; an assignment unit for assigning an offset number to each variable defined in the class files so that the same offset numbers are assigned to non-dependent variables having the same variable names; and a generation unit for generating the light-weight class files for each terminal apparatus by replacing each variable name in each class file with an offset number assigned by the assignment unit.
摘要翻译：一种程序生成装置，用于通过链接类文件来生成每个终端装置的轻量级文件。程序生成装置包括：存储单元，用于预先存储每个终端设备的类文件，其中每个类别定义（a）每个终端设备唯一的相关变量，以及（b）所有终端设备公用的非依赖变量，每个变量由变量名称标识，每个类文件包含每个变量的变量名; 分配单元，用于将偏移号分配给在类文件中定义的每个变量，使得相同的偏移号被分配给具有相同变量名的非相关变量; 以及生成单元，用于通过用分配单元分配的偏移号替换每个类文件中的每个变量名称来生成每个终端设备的轻量级文件。

10. 发明授权

US06839726B2 Apparatus, method, and program for implementing garbage collection suitable for real-time processing 有权
标题翻译：用于实施垃圾收集的装置，方法和程序，适用于实时处理
公开(公告)号：US06839726B2
公开(公告)日：2005-01-04
申请号：US10317672
申请日：2002-12-12
申请人： Takuji Kawamoto
发明人： Takuji Kawamoto
IPC分类号： G06F12/00 , G06F9/44 , G06F9/46 , G06F12/02 , G06R17/30
CPC分类号： G06F12/0269 , G06F12/0276 , Y10S707/99957
摘要： A garbage collector 100 is composed of a generation heap creator 20, an inter-generation object relocator 80, and a generation heap deallocator 40. The generation heap creator 20 creates a generation heap at a start of execution of a method. The inter-generation object relocator 80 relocates, upon detecting a reference from an object in an older generation heap to another object in a younger generation heap, the referenced object in the younger generation heap to the older generation heap. The generation heap deallocator 40 deallocates, at a completion of a method, a generation heap corresponding to the method.
摘要翻译：垃圾回收器100由生成堆创建器20，代际对象重定位器80和生成堆释放器40组成。生成堆创建器20在开始执行方法时创建生成堆。代际对象重定位器80在检测到来自较旧代堆中的对象的引用到年轻代堆中的另一个对象时重新定位，将较年轻一代的引用对象堆重新定位到较旧的代堆。生成堆释放器40在方法完成时释放对应于该方法的生成堆。

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