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1. 发明申请

US20180374728A1 FLUID MONITORING SYSTEM AND METHOD FOR SEMICONDUCTOR FABRICATION TOOLS 审中-公开
公开(公告)号：US20180374728A1
公开(公告)日：2018-12-27
申请号：US16059962
申请日：2018-08-09
申请人： WaferTech, LLC
发明人： Chris LARY
IPC分类号： H01L21/67 , C23C16/00 , G01M1/00
CPC分类号： H01L21/67253 , C23C16/00 , G01M1/00
摘要： A system and method provide for monitoring and controlling fluid flow in semiconductor manufacturing apparatuses. The method and system include a vortex flow meter coupled to a digital readout that displays the measured flow rate and trip point. The flow meter display includes input devices used to adjust the trip point. The system and method provide for sending signals via a custom relay to the semiconductor manufacturing apparatus which is adapted to terminate a processing operation or change the fluid flow if the trip point is tripped. The system and method also provide for sending an electrical signal to a computer by way of a data acquisition unit and a converter. The converter converts the signal to a communication protocol consistent with the computer network and provides fluid flow information and trip point data as a function of time to the computer which then displays such data graphically.

2. 发明申请

US20170069501A1 SPLIT GATE EMBEDDED FLASH MEMORY AND METHOD FOR FORMING THE SAME 有权
标题翻译：分离栅嵌入式闪存及其形成方法
公开(公告)号：US20170069501A1
公开(公告)日：2017-03-09
申请号：US15259996
申请日：2016-09-08
申请人： WaferTech, LLC
发明人： Pang Leen ONG , Ganesh YERUBANDI , Arjun GUPTA
IPC分类号： H01L21/28 , H01L21/265 , H01L27/115
CPC分类号： H01L21/26513 , H01L21/28273 , H01L27/11521 , H01L29/42328 , H01L29/66825
摘要： Provided is a split-gate embedded flash memory cell and method for forming the same. The flash memory cell includes split-gate transistors in which the control gate is aligned with respect to the floating gate without the use of a photolithographic patterning operation to pattern the material from which the control gates are formed. An anisotropic blanket etching operation is used to form the floating gates of the split-gate floating gate transistors alongside sidewalls of a sacrificial layer. Local oxidation of silicon (LOCOS) methods are not needed to form the inter-gate dielectric and therefore high integrity is maintained for the floating transistor gates. The floating transistor gates are formed of charge storage material such as silicon nitride, Si3N4 in some embodiments
摘要翻译：提供了一种分裂门嵌入式闪存单元及其形成方法。闪存单元包括分离栅极晶体管，其中控制栅极相对于浮动栅极对准，而不使用光刻图案化操作来对形成控制栅极的材料进行图案化。各向异性覆盖层蚀刻操作用于在牺牲层的侧壁旁边形成分离栅极浮栅晶体管的浮置栅极。不需要局部氧化硅（LOCOS）方法来形成栅极间电介质，因此保持浮置晶体管栅极的高完整性。在一些实施例中，浮置晶体管栅极由诸如氮化硅，Si 3 N 4的电荷存储材料形成

3. 发明授权

US09378954B2 Plasma pre-treatment for improved uniformity in semiconductor manufacturing 有权
标题翻译：等离子体预处理，以提高半导体制造的均匀性
公开(公告)号：US09378954B2
公开(公告)日：2016-06-28
申请号：US14206671
申请日：2014-03-12
申请人： WaferTech, LLC
发明人： Cuker Huang , Yihguei Wey
IPC分类号： H01L21/308 , H01L21/027 , H01L21/033 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L21/28 , H01L21/66
CPC分类号： H01L21/0273 , H01L21/0338 , H01L21/28123 , H01L21/3065 , H01L21/3088 , H01L21/31138 , H01L21/32137 , H01L21/32139 , H01L22/12
摘要： Methods for forming a semiconductor devices are provided. A plasma pre-treatment operation is performed on a photoresist pattern formed over a material disposed over a substrate, and reduces critical dimensions (CDs) of features of the photoresist pattern to a greater extent at a central portion of the substrate than at outer portions of the substrate, thereby forming a treated pattern with a gradient of CDs. The material is then etched using the treated pattern as a photomask. An overetch operation that tends to reduce CDs of the etched features of the material to a greater extent at outer portions of the substrate than at the central portion of the substrate, is employed. The plasma pre-treatment operation is designed in conjunction with the overetch characteristics and, in combination, the operations produce etched features having CDs with a high degree of uniformity across the substrate.
摘要翻译：提供了形成半导体器件的方法。在形成在衬底上的材料上形成的光致抗蚀剂图案上执行等离子体预处理操作，并且在衬底的中心部分比在衬底的中心部分更大程度地减小光致抗蚀剂图案的特征的临界尺寸（CD）从而形成具有CD梯度的处理图案。然后使用经处理的图案作为光掩模蚀刻材料。使用倾向于在衬底的外部部分比在衬底的中心部分更大程度地减少材料的蚀刻特征的CD的过蚀刻操作。等离子体预处理操作被设计为与过滤特性一起，并且组合地，操作产生具有在衬底上具有高均匀度的CD的蚀刻特征。

4. 发明申请

US20160147219A1 METHOD AND PRIORITY SYSTEM FOR INVENTORY MANAGEMENT IN SEMICONDUCTOR MANUFACTURING 有权
标题翻译：半导体制造库存管理的方法与优先系统
公开(公告)号：US20160147219A1
公开(公告)日：2016-05-26
申请号：US14555345
申请日：2014-11-26
申请人： WaferTech, LLC
发明人： Masreth SIDDIQUI , Philip YU , Maria GONCHOROFF , Robert HOOD , Andy BROGAN , Philip HUNTER
IPC分类号： G05B19/418
CPC分类号： G05B19/41865 , G05B19/00 , G05B2219/45031 , H01L21/67276 , Y02P90/20 , Y02P90/86
摘要： An inventory tracking system and method for use in semiconductor manufacturing provide for generating a priority score that determines the order in which lots of substrates should be run. The priority score is generated using an algorithm that takes into account external lot priority considerations, inventory factors in the manufacturing facility, and processing tool capability factors. The processing tool capability factors include factors related to tool status and tool restrictions and the inventory factors include factors related to line balance, WIP (work-in-progress) forecasts and various downstream considerations. The priority score is generated dynamically and displayed at each processing operation for each lot that is queued for processing at the indicated operation. Various algorithms are used and different weights are assigned to many factors in calculating numerical values for several factors that combine to produce the priority score. The generated priority score can be tool-specific or module-specific.
摘要翻译：用于半导体制造的库存跟踪系统和方法提供产生确定许多基板应该运行的顺序的优先级分。使用考虑到外部批次优先考虑，制造设施中的库存因素以及处理工具能力因素的算法产生优先级分数。加工工具能力因素包括与工具状态和刀具限制有关的因素，库存因素包括与生产线平衡，WIP（在制品）预测和各种下游考虑相关的因素。动态地生成优先级得分，并且在针对所指示的操作排队等待处理的每个批次的每个处理操作期间显示优先级得分。使用各种算法，并将不同的权重分配给许多因素，用于计算组合产生优先级得分的若干因素的数值。生成的优先级得分可以是工具特定的或模块特定的。

5. 发明授权

US09064788B1 Statistical method for monitoring manufacturing equipment and processing operations 有权
标题翻译：监测制造设备和加工作业的统计方法
公开(公告)号：US09064788B1
公开(公告)日：2015-06-23
申请号：US14183915
申请日：2014-02-19
申请人： WaferTech, LLC
发明人： Liwen Lu , Shih-Tzung Chang
IPC分类号： H01L21/00 , G01R31/26 , H01L21/302 , H01L21/461 , H01L21/66 , H01L21/3205
CPC分类号： H01L22/26 , G05B19/4065 , G05B19/41875 , G05B23/0237 , H01L21/32051 , H01L22/12 , H01L22/20 , Y02P90/22
摘要： A statistical process control method for monitoring and controlling semiconductor manufacturing processing operations is provided. For a chosen processing operation, multiple measurement sites are used to generate data of a measurable characteristic that is impacted by and associated with the processing operation. The data from the sites is compared over time and one or more outlier sites are identified. The outlier sites are the sites at which the data values are most divergent from the rest of the data. Algorithms are used to mathematically compare the outlier sites to the other sites to produce a comparative index. The comparative index is monitored graphically or otherwise to identify changes in the processing operation, and corrective actions are taken.
摘要翻译：提供了一种用于监视和控制半导体制造处理操作的统计过程控制方法。对于所选择的处理操作，使用多个测量站点来产生受处理操作影响并与之相关联的可测量特性的数据。随时间比较来自站点的数据，并识别一个或多个离群点。异常值站点是数据值与其余数据最不相同的站点。算法用于将离群点与其他站点进行数学比较，以生成比较索引。以图形或其他方式监测比较指标，以识别处理操作的变化，并采取纠正措施。

6. 发明申请

US20150084112A1 SPLIT GATE FLASH CELL SEMICONDUCTOR DEVICE 审中-公开
标题翻译：分离栅极闪存单元半导体器件
公开(公告)号：US20150084112A1
公开(公告)日：2015-03-26
申请号：US14561597
申请日：2014-12-05
申请人： WaferTech,LLC
发明人： Yimin WANG
IPC分类号： H01L29/423 , H01L27/115
CPC分类号： H01L29/7883 , H01L21/28273 , H01L27/088 , H01L27/11517 , H01L27/11519 , H01L27/11521 , H01L29/42324
摘要： A split gate flash cell device with floating gate transistors is provided. Each floating gate transistor is formed by providing a floating gate transistor substructure including an oxide disposed over a polysilicon gate disposed over a gate oxide disposed on a portion of a common source. Nitride spacers are formed along sidewalls of the floating gate transistor substructure and cover portions of the gate oxide that terminate at the sidewalls. An isotropic oxide etch is performed with the nitride spacers intact. The isotropic etch laterally recedes opposed edges of the oxide inwardly such that a width of the oxide is less than a width of the polysilicon gate. An inter-gate dielectric is formed over the floating gate transistor substructure and control gates are formed over the inter-gate dielectric to form the floating gate transistors.
摘要翻译：提供了具有浮动栅极晶体管的分离栅极闪存单元器件。每个浮栅晶体管通过提供浮置晶体管子结构形成，该浮动栅极晶体管子结构包括设置在设置在公共源的一部分上的栅极氧化物上的多晶硅栅极上的氧化物。氮化物间隔物沿着浮栅晶体管子结构的侧壁和终止在侧壁处的栅极氧化物的覆盖部分形成。用氮化物间隔物完整地进行各向同性氧化物蚀刻。各向同性蚀刻横向后退氧化物的相对边缘，使得氧化物的宽度小于多晶硅栅极的宽度。在浮栅晶体管子结构之上形成栅极间电介质，并且在栅极间电介质上形成控制栅极以形成浮栅晶体管。

7. 发明申请

US20150082580A1 TURBINE POWERED CLEANING APPARATUS 审中-公开
标题翻译：涡轮动力清洗装置
公开(公告)号：US20150082580A1
公开(公告)日：2015-03-26
申请号：US14508324
申请日：2014-10-07
申请人： WaferTech, LLC
发明人： Guy JACOBSON
IPC分类号： B08B1/04 , A46B15/00 , A46B13/00
CPC分类号： B08B1/04 , A46B13/001 , A46B13/003 , A46B13/02 , A46B15/0053 , A46B2200/3013
摘要： A rotary turbine cleaning device for cleaning semiconductor fabrication equipment works in conjunction with a clean room vacuum or other vacuum or other air pump. The fluid flow created by the vacuum action causes the rotors of the turbine assembly to rotate, thereby rotating the cleaning head. Attached to the cleaning head are bristles or other cleaning media which may dislodge particles from surfaces. The dislodged particles are drawn into the tube through an opening at the end of the tube and the vacuum action. In some embodiments, a lumen delivers a cleaning fluid to the cleaning head.
摘要翻译：用于清洁半导体制造设备的旋转涡轮机清洁装置与洁净室真空或其他真空或其它空气泵一起工作。由真空作用产生的流体流动导致涡轮组件的转子旋转，从而旋转清洁头。附着在清洁头上的是刷毛或其他可能从表面上移除颗粒的清洁介质。移出的颗粒通过管端部的开口和真空作用被吸入管中。在一些实施例中，内腔将清洁流体输送到清洁头。

8. 发明申请

US20140233319A1 SEMICONDUCTOR DEVICE WITH ONE-TIME PROGRAMMABLE MEMORY CELL INCLUDING ANTI-FUSE WITH METAL/POLYCIDE GATE 审中-公开
标题翻译：具有一次性可编程存储器单元的半导体器件，包括金属/聚合物栅格的防熔丝
公开(公告)号：US20140233319A1
公开(公告)日：2014-08-21
申请号：US14265742
申请日：2014-04-30
申请人： WaferTech, LLC
发明人： Re-Long CHIU , Shu-Lan YING , Wen-Szu CHUNG
IPC分类号： H01L27/112 , G11C16/10
CPC分类号： H01L27/11206 , G11C16/0425 , G11C16/0433 , G11C16/10 , G11C17/16 , G11C2216/26 , H01L29/788
摘要： A one-time programmable (OTP) memory cell includes a dual date transistor and, in some embodiments, two transistors. The dual gate transistor is formed using the same processing operations used to form floating gate transistors in other areas of the semiconductor device. The dual gate transistor includes an upper gate isolated from a floating gate by a floating gate oxide, the combination of which produces an anti-fuse. The nonvolatile memory device may include a plurality of such OTP memory cells and one or more OTP memory cells are selected and programmed by applying a voltage sufficient to blow the anti-fuse by causing the floating gate oxide layer to break down and the upper gate to become shorted to the floating gate.
摘要翻译：一次性可编程（OTP）存储单元包括双重日期晶体管，并且在一些实施例中包括两个晶体管。双栅极晶体管使用与在半导体器件的其它区域中形成浮置栅极晶体管的相同的处理操作来形成。双栅极晶体管包括通过浮置栅极氧化物与浮置栅极隔离的上部栅极，其组合产生反熔丝。非易失性存储器件可以包括多个这样的OTP存储器单元，并且通过施加足以通过使浮置栅极氧化物层分解而使反熔丝发生熔断的电压并且将上部栅极分配到变成了浮动门。

9. 发明授权

US10438826B2 Fluid monitoring system and method for semiconductor fabrication tools 有权
公开(公告)号：US10438826B2
公开(公告)日：2019-10-08
申请号：US16059962
申请日：2018-08-09
申请人： WaferTech, LLC
发明人： Chris Lary
IPC分类号： H01L21/67 , C23C16/00 , G01M1/00
摘要： A system and method provide for monitoring and controlling fluid flow in semiconductor manufacturing apparatuses. The method and system include a vortex flow meter coupled to a digital readout that displays the measured flow rate and trip point. The flow meter display includes input devices used to adjust the trip point. The system and method provide for sending signals via a custom relay to the semiconductor manufacturing apparatus which is adapted to terminate a processing operation or change the fluid flow if the trip point is tripped. The system and method also provide for sending an electrical signal to a computer by way of a data acquisition unit and a converter. The converter converts the signal to a communication protocol consistent with the computer network and provides fluid flow information and trip point data as a function of time to the computer which then displays such data graphically.

10. 发明授权

US09480938B2 Method for using acoustic waves for purging filters in semiconductor manufacturing equipment 有权
标题翻译：在半导体制造设备中使用声波来净化滤波器的方法
公开(公告)号：US09480938B2
公开(公告)日：2016-11-01
申请号：US14559526
申请日：2014-12-03
申请人： WaferTech, LLC
发明人： Guy Jacobson
IPC分类号： B01D29/62 , B01D29/72 , G03F7/16 , H01L21/67
CPC分类号： B01D29/62 , B01D29/72 , G03F7/16 , H01L21/6715
摘要： An apparatus and method for qualifying a filter used to filter fluid used in a coating operation associated with photolithography or other semiconductor manufacturing processes, provides a semiconductor manufacturing tool that includes a filter and an acoustic wave generator. The filter may be housed inside a filter housing and the acoustic wave generator may produce ultrasonic, megasonic or other acoustic energy. The acoustic wave generator contacts or is in close proximity with the filter housing and provides acoustic wave energy to the filter through the housing. The acoustic wave energy causes any bubbles in the filter to become disengaged.
摘要翻译：用于对用于与光刻或其他半导体制造工艺相关的涂布操作中使用的流体进行过滤的过滤器的装置和方法提供了包括滤波器和声波发生器的半导体制造工具。滤波器可以容纳在滤波器壳体内，并且声波发生器可以产生超声波，兆声波或其它声能。声波发生器与过滤器壳体接触或接近，并通过壳体向过滤器提供声波能量。声波能量导致过滤器中的任何气泡脱离。

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