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1. 发明申请

US20100264955A1 METAL PROGRAMMABLE LOGIC AND MULTIPLE FUNCTION PIN INTERFACE 有权
标题翻译：金属可编程逻辑和多功能引脚接口
公开(公告)号：US20100264955A1
公开(公告)日：2010-10-21
申请号：US12829290
申请日：2010-07-01
申请人： Yongjiang Wang
发明人： Yongjiang Wang
IPC分类号： H03K19/00
CPC分类号： H01L23/525 , H01L2924/0002 , H01L2924/00
摘要： Some of the embodiments of the present invention provide an integrated circuit device including a first metal interconnect, an end of which is coupled to a core of the integrated circuit device, a second metal interconnect, an end of which is coupled to a first input/output (I/O) pin, and a third metal interconnect configured to be coupled to the first metal interconnect and to the second metal interconnect. Other embodiments are also described and claimed.
摘要翻译：本发明的一些实施例提供一种集成电路器件，其包括第一金属互连件，第一金属互连件的一端连接到集成电路器件的核心，第二金属互连件，其第一端连接到第一输入/ 输出（I / O）引脚和被配置为耦合到第一金属互连和第二金属互连的第三金属互连。还描述和要求保护其他实施例。

2. 发明授权

US08954622B1 Embedded programmable logic for logic stacking on application processor 有权
标题翻译：嵌入式可编程逻辑，用于应用处理器上的逻辑堆叠
公开(公告)号：US08954622B1
公开(公告)日：2015-02-10
申请号：US13351763
申请日：2012-01-17
申请人： Yongjiang Wang
发明人： Yongjiang Wang
IPC分类号： G06F3/00 , G06F13/12 , G06F13/38
CPC分类号： G06F13/385 , Y02D10/14 , Y02D10/151
摘要： A system includes a programmable interface module located on an integrated circuit (IC), the programmable interface module configured to be programmed to operate in a plurality of modes, and communicate with at least one device external to the IC based on a selected one of the plurality of modes. Each of the plurality of modes corresponds to at least one of a type of peripheral feature, a type of communication interface, and a protocol type. An interface configuration module is configured to receive an indication of the selected one of the plurality of modes and program the programmable interface module to operate in the selected one of the plurality of modes in response to the indication.
摘要翻译：系统包括位于集成电路（IC）上的可编程接口模块，所述可编程接口模块被配置为被编程为以多种模式操作，并且基于所选择的一个中的所选择的一个与所述IC外部的至少一个设备进行通信多种模式。多个模式中的每一个对应于外围特征，通信接口的类型和协议类型中的至少一种。接口配置模块被配置为接收所述多个模式中所选择的一个模式的指示，并且响应于所述指示来编程所述可编程接口模块以所选择的多个模式中的一个模式进行操作。

3. 发明授权

US08862954B1 Integrated circuit scan testing with stop-clock and auto-step features 有权
标题翻译：具有停止时钟和自动步进功能的集成电路扫描测试
公开(公告)号：US08862954B1
公开(公告)日：2014-10-14
申请号：US13039359
申请日：2011-03-03
申请人： Yongjiang Wang
发明人： Yongjiang Wang
IPC分类号： G01R31/28
CPC分类号： G01R31/31922 , G01R31/3177 , G01R31/318525 , G01R31/318533 , G01R31/318552 , G06F11/24
摘要： Apparatus having corresponding methods and computer-readable media comprise a function module to operate according to a clock signal; a clock control module to provide a clock gate signal; and a clock gate module to provide the clock signal to the function module only until the clock control module provides the clock gate signal; wherein the function module includes a plurality of storage elements, wherein the storage elements form a scan chain in response to a mode signal; and wherein the scan chain is configured to shift data stored therein out of the scan chain.
摘要翻译：具有相应方法和计算机可读介质的装置包括根据时钟信号进行操作的功能模块; 时钟控制模块，用于提供时钟门信号; 以及时钟门模块，用于仅在时钟控制模块提供时钟门信号之前向功能模块提供时钟信号; 其中所述功能模块包括多个存储元件，其中所述存储元件响应于模式信号形成扫描链; 并且其中所述扫描链被配置为将存储在其中的数据移出所述扫描链。

4. 发明授权

US08299618B2 Metal programmable logic and multiple function pin interface 有权
标题翻译：金属可编程逻辑和多功能引脚接口
公开(公告)号：US08299618B2
公开(公告)日：2012-10-30
申请号：US12829290
申请日：2010-07-01
申请人： Yongjiang Wang
发明人： Yongjiang Wang
IPC分类号： H03K19/00
CPC分类号： H01L23/525 , H01L2924/0002 , H01L2924/00
摘要： Some of the embodiments of the present invention provide an integrated circuit device including a first metal interconnect, an end of which is coupled to a core of the integrated circuit device, a second metal interconnect, an end of which is coupled to a first input/output (I/O) pin, and a third metal interconnect configured to be coupled to the first metal interconnect and to the second metal interconnect. Other embodiments are also described and claimed.
摘要翻译：本发明的一些实施例提供一种集成电路器件，其包括第一金属互连件，第一金属互连件的一端连接到集成电路器件的核心，第二金属互连件，其第一端连接到第一输入/ 输出（I / O）引脚和被配置为耦合到第一金属互连和第二金属互连的第三金属互连。还描述和要求保护其他实施例。

5. 发明授权

US08810289B1 Digital power on reset 有权
标题翻译：数字电源复位
公开(公告)号：US08810289B1
公开(公告)日：2014-08-19
申请号：US13490731
申请日：2012-06-07
申请人： Yongjiang Wang
发明人： Yongjiang Wang
IPC分类号： H03L7/00
CPC分类号： H03K17/223 , G06F1/24
摘要： Apparatuses, circuits, methods, and other embodiments associated with digital power on reset are described. In one embodiment, an apparatus includes a digital electronic component configured to produce a clock signal. A first counter is configured to output a first count signal based on the clock signal and a second counter is configured to output a second count signal based on the clock signal. A power on reset logic is configured to provide a power on reset signal based on the first count signal and the second count signal, where the power on reset logic is configured to disable the digital electronic component after providing the power on reset signal to prevent the digital electronic component from drawing power.
摘要翻译：描述与数字上电复位相关联的装置，电路，方法和其它实施例。在一个实施例中，一种装置包括被配置为产生时钟信号的数字电子部件。第一计数器被配置为基于时钟信号输出第一计数信号，并且第二计数器被配置为基于时钟信号输出第二计数信号。上电复位逻辑被配置为基于第一计数信号和第二计数信号提供上电复位信号，其中上电复位逻辑被配置为在提供上电复位信号之后禁用数字电子部件，以防止数字电子元件从绘图力。

6. 发明授权

US08627155B1 Integrated circuit testing with clock manipulation and auto-step features 失效
标题翻译：集成电路测试，具有时钟操作和自动步进功能
公开(公告)号：US08627155B1
公开(公告)日：2014-01-07
申请号：US13039352
申请日：2011-03-03
申请人： Yongjiang Wang
发明人： Yongjiang Wang
IPC分类号： G06F11/00
CPC分类号： G01R31/31922 , G01R31/3177 , G01R31/318525 , G01R31/318533 , G01R31/318552 , G06F11/24
摘要： Apparatus having corresponding methods and non-transitory computer-readable media comprise: a function module to operate according to a clock signal; a clock manipulation module to manipulate an edge of the clock signal responsive to occurrence of a predetermined condition; and a report module to indicate a clock cycle number of the edge of the clock signal responsive to occurrence of an error in the function module.
摘要翻译：具有相应方法和非暂时计算机可读介质的装置包括：功能模块，用于根据时钟信号进行操作; 时钟操作模块，用于响应于预定条件的发生来操纵所述时钟信号的边缘; 以及报告模块，用于响应于功能模块中的错误的发生来指示时钟信号的边沿的时钟周期数。

7. 发明授权

US08198925B1 Digital power on reset 有权
标题翻译：数字电源复位
公开(公告)号：US08198925B1
公开(公告)日：2012-06-12
申请号：US12627452
申请日：2009-11-30
申请人： Yongjiang Wang
发明人： Yongjiang Wang
IPC分类号： H03L7/00
CPC分类号： H03K17/223 , G06F1/24
摘要： Apparatuses, circuits, methods, and other embodiments associated with digital power on reset are described. In one embodiment, an apparatus is implemented with a digital electronic component that produces a clock signal. The apparatus also includes a first counter that outputs a first count signal based on the clock signal and a second counter that outputs a second count signal based on the clock signal. The apparatus also includes a power on reset logic that selectively provides a power on reset signal based on the first count signal and the second count signal. The power on reset logic can also selectively disable the apparatus upon providing the power on reset signal.
摘要翻译：描述与数字上电复位相关联的装置，电路，方法和其它实施例。在一个实施例中，使用产生时钟信号的数字电子部件来实现装置。该装置还包括基于时钟信号输出第一计数信号的第一计数器和基于时钟信号输出第二计数信号的第二计数器。该装置还包括上电复位逻辑，其基于第一计数信号和第二计数信号选择性地提供上电复位信号。上电复位逻辑还可以在提供上电复位信号时选择性地禁用该设备。

8. 发明授权

US07750474B1 Metal programmable logic and multiple function pin interface 有权
标题翻译：金属可编程逻辑和多功能引脚接口
公开(公告)号：US07750474B1
公开(公告)日：2010-07-06
申请号：US12258087
申请日：2008-10-24
申请人： Yongjiang Wang
发明人： Yongjiang Wang
IPC分类号： H01L23/48
CPC分类号： H01L23/525 , H01L2924/0002 , H01L2924/00
摘要： Some of the embodiments of the present invention provide an integrated circuit device including a first metal interconnect, an end of which is coupled to a core of the integrated circuit device, a second metal interconnect, an end of which is coupled to a first input/output (I/O) pin, and a third metal interconnect configured to be coupled to the first metal interconnect and to the second metal interconnect. Other embodiments are also described and claimed.
摘要翻译：本发明的一些实施例提供一种集成电路器件，其包括第一金属互连件，第一金属互连件的一端连接到集成电路器件的核心，第二金属互连件，其第一端连接到第一输入/ 输出（I / O）引脚和被配置为耦合到第一金属互连和第二金属互连的第三金属互连。还描述和要求保护其他实施例。

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