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1. 发明授权

US09035402B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US09035402B2
公开(公告)日：2015-05-19
申请号：US13963710
申请日：2013-08-09
申请人： Yoshiaki Asao , Hideaki Harakawa
发明人： Yoshiaki Asao , Hideaki Harakawa
IPC分类号： H01L43/08 , H01L27/22 , G11C11/16
CPC分类号： H01L27/228 , G11C11/161 , G11C11/165 , G11C11/1675 , H01L43/08
摘要： According to one embodiment, a semiconductor memory device comprises a cell transistor includes a first gate electrode buried in a semiconductor substrate and a first diffusion layer and a second diffusion layer formed to sandwich the first gate electrode, a first lower electrode formed on the first diffusion layer, a magnetoresistive element formed on the first lower electrode to store data according to a change in a magnetization state and connected to a bit line located above, a second lower electrode formed on the second diffusion layer, and a first contact formed on the second lower electrode and connected to a source line located above. A contact area between the second lower electrode and the second diffusion layer is larger than a contact area between the first contact and the second lower electrode.
摘要翻译：根据一个实施例，一种半导体存储器件包括：单元晶体管，包括埋在半导体衬底中的第一栅电极和形成为夹着第一栅电极的第一扩散层和第二扩散层;形成在第一扩散层上的第一下电极层，形成在所述第一下电极上以根据磁化状态的变化存储数据并连接到位于上方的位线的磁阻元件，形成在所述第二扩散层上的第二下电极，以及形成在所述第二扩散层上的第一触点下电极并连接到位于上方的源极线。第二下部电极和第二扩散层之间的接触面积大于第一接触部和第二下部电极的接触面积。

2. 发明授权

US08724377B2 Memory device and method for manufacturing the same 有权
标题翻译：存储器件及其制造方法
公开(公告)号：US08724377B2
公开(公告)日：2014-05-13
申请号：US13423700
申请日：2012-03-19
申请人： Takaya Yamanaka , Susumu Shuto , Yoshiaki Asao
发明人： Takaya Yamanaka , Susumu Shuto , Yoshiaki Asao
IPC分类号： G11C11/00
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/5607 , H01L27/228 , H01L43/12
摘要： According to one embodiment, a memory device includes: a first signal line; a second signal line; a transistor; a first memory region; and a second memory region. The transistor controls a conduction of each of a current flowing between the first and the second signal lines and an opposite current. The first memory region has a first magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and the magnetization direction becomes antiparallel when a current in another direction. The second memory region has a second magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and becomes antiparallel when a current flows in another first direction.
摘要翻译：根据一个实施例，存储器件包括：第一信号线; 第二信号线; 晶体管第一存储区; 和第二存储器区域。晶体管控制在第一和第二信号线之间流动的电流和相反电流的导通。第一存储区具有第一磁隧道结元件。当电流沿一个方向流动时，其磁化方向变得平行，并且当另一个方向上的电流时，磁化方向变得反平行。第二存储器区域具有第二磁性隧道结元件。当电流沿一个方向流动时，其磁化方向变得平行，并且当电流在另一个第一方向上流动时，其磁化方向变得反平行。

3. 发明申请

US20130058161A1 MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：存储器件及其制造方法
公开(公告)号：US20130058161A1
公开(公告)日：2013-03-07
申请号：US13423700
申请日：2012-03-19
申请人： Takaya YAMANAKA , Susumu SHUTO , Yoshiaki ASAO
发明人： Takaya YAMANAKA , Susumu SHUTO , Yoshiaki ASAO
IPC分类号： G11C11/15 , H01L21/8246
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/5607 , H01L27/228 , H01L43/12
摘要： According to one embodiment, a memory device includes: a first signal line; a second signal line; a transistor; a first memory region; and a second memory region. The transistor controls a conduction of each of a current flowing between the first and the second signal lines and an opposite current. The first memory region has a first magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and the magnetization direction becomes antiparallel when a current in another direction. The second memory region has a second magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and becomes antiparallel when a current flows in another first direction.
摘要翻译：根据一个实施例，存储器件包括：第一信号线; 第二信号线; 晶体管第一存储区; 和第二存储器区域。晶体管控制在第一和第二信号线之间流动的电流和相反电流的导通。第一存储区具有第一磁隧道结元件。当电流沿一个方向流动时，其磁化方向变得平行，并且当另一个方向上的电流时，磁化方向变得反平行。第二存储器区域具有第二磁性隧道结元件。当电流沿一个方向流动时，其磁化方向变得平行，并且当电流在另一个第一方向上流动时，其磁化方向变得反平行。

4. 发明申请

US20120281461A1 SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：半导体存储设备
公开(公告)号：US20120281461A1
公开(公告)日：2012-11-08
申请号：US13419258
申请日：2012-03-13
申请人： Yoshiaki Asao
发明人： Yoshiaki Asao
IPC分类号： G11C11/16
CPC分类号： G11C5/063 , G11C11/161 , G11C11/1659
摘要： A memory includes MTJ elements. Active areas are separated to correspond to cell transistors, respectively, and extend in a first direction substantially orthogonal to an extending direction of gates of the cell transistors. The active areas are arranged in the first direction and constitute a plurality of active area columns. Two active area columns adjacent in a second direction are arranged to be half-pitch staggered in the first direction. As viewed from above surfaces of the active areas, each MTJ element is arranged to overlap with one end of each of the active areas. The first and second wirings extend while being folded back in a direction inclined with respect to the first and second directions in order to overlap with the MTJ elements alternately in the adjacent active area columns.
摘要翻译：内存包括MTJ元素。有源区域分别对应于单元晶体管，并且在与单元晶体管的栅极的延伸方向基本正交的第一方向上延伸。有源区域沿第一方向布置并且构成多个有效区域列。在第二方向相邻的两个有效区列被布置为在第一方向上半间距交错。从有源区域的上表面观察，每个MTJ元件被布置成与每个有源区域的一端重叠。第一和第二布线在相对于第一和第二方向倾斜的方向被折回的同时延伸，以便在相邻的有效区域列中交替地与MTJ元件重叠。

5. 发明授权

US08164147B2 Magnetic random access memory 有权
标题翻译：磁性随机存取存储器
公开(公告)号：US08164147B2
公开(公告)日：2012-04-24
申请号：US12022473
申请日：2008-01-30
申请人： Yoshiaki Asao
发明人： Yoshiaki Asao
IPC分类号： H01L29/82
CPC分类号： H01L27/228
摘要： A magnetic random access memory includes a first bit line and a second bit line, a source line formed for a group having the first bit line and the second bit line, adjacent to the first bit line, and running in a first direction in which the first bit line and the second bit line run, a first magnetoresistive effect element connected to the first bit line, a second magnetoresistive effect element connected to the second bit line, a first transistor connected in series with the first magnetoresistive effect element, and a second transistor connected in series with the second magnetoresistive effect element. A first cell having the first magnetoresistive effect element and the first transistor and a second cell having the second magnetoresistive effect element and the second transistor are connected together to the source line.
摘要翻译：磁性随机存取存储器包括第一位线和第二位线，对于具有与第一位线相邻的第一位线和第二位线的组形成的源极线，并且沿第一方向运行，其中，第一位线和第二位线运行，连接到第一位线的第一磁阻效应元件，连接到第二位线的第二磁阻效应元件，与第一磁阻效应元件串联连接的第一晶体管，晶体管与第二磁阻效应元件串联连接。具有第一磁阻效应元件和第一晶体管的第一单元和具有第二磁阻效应元件和第二晶体管的第二单元连接在源极线上。

6. 发明授权

US08009456B2 Resistance change type memory 有权
标题翻译：电阻变化型存储器
公开(公告)号：US08009456B2
公开(公告)日：2011-08-30
申请号：US12350477
申请日：2009-01-08
申请人： Naoharu Shimomura , Yoshiaki Asao
发明人： Naoharu Shimomura , Yoshiaki Asao
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C11/1657 , G11C11/1659 , G11C11/1675 , G11C13/0004 , G11C13/0007 , G11C13/0011 , G11C13/0023 , G11C13/0028 , G11C13/003 , G11C2013/0078 , G11C2213/32 , G11C2213/34 , G11C2213/72 , G11C2213/74
摘要： A resistance change type memory includes first, second and third drive lines, a resistance change element having one end connected to the third drive line, a first diode having an anode connected to the first drive line and a cathode connected to other end of the first resistance change element, a second diode having an anode connected to other end of the first resistance change element and a cathode connected to the second drive line, and a driver/sinker which supplies a write current to the resistance change element. A write control circuit is arranged such that when first data is written, the write current is caused to flow in a direction from the first drive line to the third drive line, and when second data is written, the write current is caused to flow in a direction from the third drive line to the second drive line.
摘要翻译：电阻变化型存储器包括第一，第二和第三驱动线，电阻改变元件，其一端连接到第三驱动线，第一二极管，具有连接到第一驱动线的阳极和连接到第一驱动线的另一端的阴极电阻变化元件，具有连接到第一电阻变化元件的另一端的阳极和连接到第二驱动线的阴极的第二二极管，以及向电阻变化元件提供写入电流的驱动器/沉降片。写控制电路被布置成使得当第一数据被写入时，使写入电流在从第一驱动线到第三驱动线的方向上流动，并且当写入第二数据时，使写入电流流入从第三驱动线到第二驱动线的方向。

7. 发明申请

US20110068401A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110068401A1
公开(公告)日：2011-03-24
申请号：US12881415
申请日：2010-09-14
申请人： Takashi Izumida , Nobutoshi Aoki , Masaki Kondo , Yoshiaki Asao , Satoshi Inaba
发明人： Takashi Izumida , Nobutoshi Aoki , Masaki Kondo , Yoshiaki Asao , Satoshi Inaba
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： H01L29/785 , H01L21/823431 , H01L29/66795
摘要： A semiconductor device of an embodiment includes a substrate and a plurality of fins formed on the substrate. The plurality of fins is arranged so that a first distance and a second distance narrower than the first distance are repeated. In addition, the plurality of fins include a semiconductor region in which an impurity concentration of lower portions of side surfaces facing each other in sides forming the first distance is higher than an impurity concentration of lower portions of side surfaces facing each other in sides forming the second distance.
摘要翻译：实施例的半导体器件包括基板和形成在基板上的多个翅片。多个翅片被布置成使得比第一距离窄的第一距离和第二距离被重复。另外，多个散热片包括半导体区域，其中在形成第一距离的侧面中彼此面对的侧面的下部的杂质浓度高于形成第一距离的侧面彼此相对的侧表面的下部的杂质浓度第二距离。

8. 发明申请

US20100238718A1 SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20100238718A1
公开(公告)日：2010-09-23
申请号：US12727076
申请日：2010-03-18
申请人： Yoshiaki ASAO
发明人： Yoshiaki ASAO
IPC分类号： G11C11/00 , H01L29/78
CPC分类号： H01L27/228 , G11C11/161 , G11C11/1659 , G11C11/1675 , H01L43/08
摘要： A semiconductor memory device includes a semiconductor substrate including an active area, a first select transistor in the active area, a first interconnection layer above the semiconductor substrate configured to run in a first direction, a first magnetoresistive element above the first interconnection layer including a fixed layer having a fixed magnetization direction, a nonmagnetic layer on the fixed layer, and a recording layer on the nonmagnetic layer having a variable magnetization direction, the fixed layer being electrically connected to the first interconnection layer, the recording layer being electrically connected to a first diffusion region of the first select transistor, and a second interconnection layer configured to run in the first direction and electrically connected to a second diffusion region of the first select transistor.
摘要翻译：一种半导体存储器件，包括：半导体衬底，包括有源区，有源区中的第一选择晶体管，配置成在第一方向上延伸的半导体衬底上的第一互连层，第一互连层上方的第一磁阻元件，具有固定磁化方向的层，固定层上的非磁性层和具有可变磁化方向的非磁性层上的记录层，固定层电连接到第一互连层，记录层电连接到第一所述第一选择晶体管的扩散区域以及配置为在所述第一方向上延伸并且电连接到所述第一选择晶体管的第二扩散区域的第二互连层。

9. 发明申请

US20100197044A1 METHOD OF MANUFACTURING A MAGNETIC RANDOM ACCESS MEMORY, METHOD OF MANUFACTURING AN EMBEDDED MEMORY, AND TEMPLATE 有权
标题翻译：制造磁性随机存取存储器的方法，制造嵌入式存储器的方法和模板
公开(公告)号：US20100197044A1
公开(公告)日：2010-08-05
申请号：US12699721
申请日：2010-02-03
申请人： Takeshi KAJIYAMA , Yoshiaki ASAO , Minoru AMANO , Shigeki TAKAHASHI , Masayoshi IWAYAMA , Kuniaki SUGIURA
发明人： Takeshi KAJIYAMA , Yoshiaki ASAO , Minoru AMANO , Shigeki TAKAHASHI , Masayoshi IWAYAMA , Kuniaki SUGIURA
IPC分类号： H01L21/28 , B28B17/00
CPC分类号： H01L43/12 , G11C11/161 , H01L27/228
摘要： A magnetic material of a magnetoresistive element is formed on a lower electrode. An upper electrode is formed on the magnetic material. A resist for nano-imprint lithography is formed on the upper electrode. A first pattern or a second pattern is formed in the resist by setting a first template or a second template into contact with the resist and curing the resist. The first template has the first pattern that corresponds to the magnetoresistive element and the lower electrode. The second template has the second pattern that corresponds to the magnetoresistive element and the upper electrode. The magnetic material and the lower electrode are patterned at the same time by using the resist having the first pattern, or the magnetic material and the upper electrode are patterned at the same time by using the resist having the second pattern.
摘要翻译：磁阻元件的磁性材料形成在下电极上。在磁性材料上形成上部电极。在上电极上形成用于纳米压印光刻的抗蚀剂。通过将第一模板或第二模板与抗蚀剂接触并固化抗蚀剂，在抗蚀剂中形成第一图案或第二图案。第一模板具有对应于磁阻元件和下电极的第一图案。第二模板具有对应于磁阻元件和上电极的第二图案。通过使用具有第一图案的抗蚀剂，同时对磁性材料和下电极进行图案化，或者通过使用具有第二图案的抗蚀剂同时对磁性材料和上部电极进行图案化。

10. 发明申请

US20100193850A1 SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20100193850A1
公开(公告)日：2010-08-05
申请号：US12697912
申请日：2010-02-01
申请人： Yoshiaki ASAO , Takeshi KAJIYAMA , Minoru AMANO , Yoshikuni TATEYAMA , Atsushi SHIGETA
发明人： Yoshiaki ASAO , Takeshi KAJIYAMA , Minoru AMANO , Yoshikuni TATEYAMA , Atsushi SHIGETA
IPC分类号： H01L29/82
CPC分类号： H01L27/228 , H01L27/105
摘要： First and second transistors are formed on a substrate. An interlayer insulating film is formed on the first transistor. A first contact is formed in the interlayer film on a source or a drain of the first transistor. A second contact is formed in the interlayer film on the other of the source or the drain. A first interconnect is formed on the first contact. A magnetoresistive element is formed on the second contact. The magnetoresistive element is arranged in a layer having a height equal to that of the first interconnect from a substrate surface. A third contact is formed in the interlayer film on a source or a drain of the second transistor. A second interconnect is formed on the third contact. The second interconnect is arranged in a layer having a height equal to those of the first interconnect and the magnetoresistive element from the substrate surface.
摘要翻译：第一和第二晶体管形成在衬底上。在第一晶体管上形成层间绝缘膜。在第一晶体管的源极或漏极上的层间膜中形成第一接触。在源极或漏极中的另一个的层间膜中形成第二接触。在第一接触件上形成第一互连。在第二触点上形成磁阻元件。磁阻元件从衬底表面布置成具有与第一互连的高度相同的高度的层。在第二晶体管的源极或漏极上的层间膜中形成第三接触。在第三触点上形成第二互连。第二互连布置在具有与来自衬底表面的第一互连和磁阻元件的高度相同的高度的层中。

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