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1. 发明申请

US20160204340A1 MAGNETIC MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：磁记忆体装置及其制造方法
公开(公告)号：US20160204340A1
公开(公告)日：2016-07-14
申请号：US14808282
申请日：2015-07-24
申请人： Yoshinori KUMURA
发明人： Yoshinori KUMURA
IPC分类号： H01L43/02 , H01L43/10 , H01L43/12 , H01L43/08
CPC分类号： H01L43/02 , H01L43/08 , H01L43/10 , H01L43/12
摘要： According to one embodiment, a method of manufacturing a magnetic memory device, includes forming a lower structure, the lower structure includes a bottom electrode, an interlayer insulating film surrounding the bottom electrode, and a predetermined element containing portion which is in contact with the bottom electrode and which contains a predetermined element other than an element contained in at least a surface area of the bottom electrode and an element contained in at least a surface area of the interlayer insulating film, forming a stack film including a magnetic layer, on the lower structure, forming a hard mask on the stack film, and etching the stack film to expose the predetermined element containing portion.
摘要翻译：根据一个实施例，一种制造磁存储器件的方法包括形成下部结构，下部结构包括底部电极，围绕底部电极的层间绝缘膜和与底部电极接触的预定元件容纳部分电极，并且其包含除了底部电极的至少表面区域中包含的元素之外的预定元素和包含在层间绝缘膜的至少表面积中的元素，在下部形成包括磁性层的叠层膜结构，在叠层膜上形成硬掩模，并蚀刻叠层膜以暴露预定元件容纳部分。

2. 发明申请

US20100072525A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20100072525A1
公开(公告)日：2010-03-25
申请号：US12553923
申请日：2009-09-03
申请人： Yoshiro Shimojo , Tohru Ozaki , Yoshinori Kumura
发明人： Yoshiro Shimojo , Tohru Ozaki , Yoshinori Kumura
IPC分类号： H01L27/108 , H01L21/02
CPC分类号： H01L27/11512 , H01L27/11507 , H01L28/55
摘要： According to a method for manufacturing a semiconductor memory device of the present invention, a capacitor lower electrode film is left on the wiring layer located above a dummy transistor. In this manner, when processing of the capacitors is performed by removing a capacitor upper electrode film and a ferroelectric film, removal of the wiring layer can be prevented, and the connection between the diffusion layer of a select transistor and a bit line can be secured.
摘要翻译：根据本发明的半导体存储器件的制造方法，在位于虚拟晶体管上方的布线层上留下电容器下电极膜。以这种方式，当通过去除电容器上电极膜和铁电体膜来执行电容器的处理时，可以防止布线层的去除，并且可以确保选择晶体管的扩散层和位线之间的连接。

3. 发明申请

US20100052022A1 NONVOLATILE MEMORY AND MANUFACTURING METHOD THEREOF 失效
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US20100052022A1
公开(公告)日：2010-03-04
申请号：US12549163
申请日：2009-08-27
申请人： Yoshinori Kumura
发明人： Yoshinori Kumura
IPC分类号： H01L27/115 , H01L21/00 , H01L21/336
CPC分类号： H01L27/11507 , H01L27/11509 , H01L28/55
摘要： According to an aspect of the present invention, there is provided a nonvolatile memory including: a cell transistor including: a gate electrode and first and second diffusion layers; a second insulating film covering the cell transistor; first and second plugs penetrating the second insulating film to reach the first and second diffusion layers, respectively; a ferroelectric capacitor having a ferroelectric film and first and second electrodes, the first electrode contacting with the first plug; a first conductive spacer contacting with the second plug and including the same material as the first electrode; a third insulating film covering side faces of the first electrode, the ferroelectric film and the first conductive spacer; and a first wiring that is continuously formed with the second electrode and connected to the first conductive spacer and that includes the same material as the second electrode.
摘要翻译：根据本发明的一个方面，提供了一种非易失性存储器，包括：单元晶体管，包括：栅电极和第一和第二扩散层; 覆盖单元晶体管的第二绝缘膜; 分别穿过第二绝缘膜的第一和第二插塞到达第一和第二扩散层; 具有铁电体膜的铁电电容器和第一和第二电极，所述第一电极与所述第一插塞接触; 与所述第二插头接触并且包括与所述第一电极相同的材料的第一导电间隔件; 覆盖第一电极，铁电体膜和第一导电间隔物的侧面的第三绝缘膜; 以及第一布线，其与第二电极连续地形成并且连接到第一导电间隔物并且包括与第二电极相同的材料。

4. 发明授权

US07214982B2 Semiconductor memory device and method of manufacturing the same 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07214982B2
公开(公告)日：2007-05-08
申请号：US10959223
申请日：2004-10-07
申请人： Yoshinori Kumura , Iwao Kunishima , Tohru Ozaki
发明人： Yoshinori Kumura , Iwao Kunishima , Tohru Ozaki
IPC分类号： H01L27/108
CPC分类号： H01L29/945 , H01L27/11502 , H01L27/11507 , H01L29/66181
摘要： A semiconductor device including a ferroelectric random access memory, which has a structure suitable for miniaturization and easy to manufacture, and having less restrictions on materials to be used, comprises a field effect transistor formed on a surface area of a semiconductor wafer, a trench ferroelectric capacitor formed in the semiconductor wafer in one source/drain of the field effect transistor, wherein one electrode thereof is connected to the source/drain, and a wiring formed in the semiconductor wafer and connected to the other electrode of the trench ferroelectric capacitor.
摘要翻译：包括具有适于小型化并易于制造并且对材料使用限制较少的结构的铁电随机存取存储器的半导体器件包括形成在半导体晶片的表面区域上的场效应晶体管，沟槽铁电体电容器形成在场效应晶体管的一个源极/漏极中的半导体晶片中，其中一个电极连接到源极/漏极，以及形成在半导体晶片中并连接到沟槽铁电电容器的另一个电极的布线。

5. 发明申请

US20070045687A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20070045687A1
公开(公告)日：2007-03-01
申请号：US11288204
申请日：2005-11-29
申请人： Yoshinori Kumura , Tohru Ozaki , Susumu Shuto , Yoshiro Shimojo , Iwao Kunishima
发明人： Yoshinori Kumura , Tohru Ozaki , Susumu Shuto , Yoshiro Shimojo , Iwao Kunishima
IPC分类号： H01L29/94 , H01L29/76 , H01L31/00
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/57 , H01L28/65
摘要： A semiconductor device comprising a ferroelectric capacitor having improved reliability is disclosed. According to one aspect of the present invention, it is provided a semiconductor device comprising a transistor formed on a semiconductor substrate, a ferroelectric capacitor formed above the transistor and comprising a lower electrode, a ferroelectric film and an upper electrode, a first hydrogen barrier film formed over the ferroelectric capacitor, an insulator formed over the first hydrogen barrier film, a contact plug disposed in the insulator and electrically connected with the upper electrode, a second hydrogen barrier film disposed between the contact plug and the insulator continuously, and a wiring connected with the contact plug.
摘要翻译：公开了一种包括具有改善的可靠性的铁电电容器的半导体器件。根据本发明的一个方面，提供了一种半导体器件，包括形成在半导体衬底上的晶体管，形成在晶体管上方的铁电电容器，包括下电极，铁电体膜和上电极，第一氢阻挡膜形成在所述铁电电容器上，形成在所述第一氢阻挡膜上的绝缘体，设置在所述绝缘体中并与所述上电极电连接的接触插塞，连续地配置在所述接触插塞和所述绝缘体之间的第二氢阻挡膜，与接触插头。

6. 发明申请

US20060102941A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20060102941A1
公开(公告)日：2006-05-18
申请号：US10986060
申请日：2004-11-12
申请人： Hiroshi Itokawa , Koji Yamakawa , Tohru Ozaki , Yoshinori Kumura , Takamichi Tsuchiya , Nicolas Nagel , Bum-Ki Moon , Andreas Hilliger
发明人： Hiroshi Itokawa , Koji Yamakawa , Tohru Ozaki , Yoshinori Kumura , Takamichi Tsuchiya , Nicolas Nagel , Bum-Ki Moon , Andreas Hilliger
IPC分类号： H01L29/94
CPC分类号： H01L28/55 , G11C11/22 , H01L27/11502 , H01L27/11507 , H01L28/65
摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor provided above the semiconductor substrate and including a bottom electrode, a top electrode, and a dielectric film provided between the bottom electrode and the top electrode, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film.
摘要翻译：公开了一种半导体器件，包括半导体衬底，设置在半导体衬底上方并包括底电极，顶电极和设置在底电极和顶电极之间的电介质膜的电容器，底电极包括含有铱，设置在电介质膜和第一导电膜之间并由贵金属膜形成的第二导电膜，设置在电介质膜和第二导电膜之间并由具有钙钛矿结构的金属氧化物膜形成的第三导电膜，以及设置在所述第一导电膜和所述第二导电膜之间并且包括金属膜和金属氧化物膜中的至少一种的防扩散膜，所述扩散防止膜防止包含在所述第一导电膜中的铱的扩散。

7. 发明授权

US06762065B2 Semiconductor device having ferroelectric capacitor and method for manufacturing the same 失效
标题翻译：具有铁电电容器的半导体器件及其制造方法
公开(公告)号：US06762065B2
公开(公告)日：2004-07-13
申请号：US10448359
申请日：2003-05-30
申请人： Hiroyuki Kanaya , Yasuyuki Taniguchi , Tohru Ozaki , Yoshinori Kumura
发明人： Hiroyuki Kanaya , Yasuyuki Taniguchi , Tohru Ozaki , Yoshinori Kumura
IPC分类号： H01L2100
CPC分类号： H01L27/11502 , H01L21/31116 , H01L21/32136 , H01L27/11507 , H01L28/56 , H01L28/75
摘要： A lower electrode is formed on an insulating film on a semiconductor substrate. A pair of ferroelectric films are formed on the lower electrode separately from each other. An upper electrode is formed on each of the pair of ferroelectric films. A portion of the lower electrode on which the ferroelectric film is formed is thicker than a portion thereof on which the ferroelectric film is not formed. Such a structure is obtained by sequentially depositing the lower electrode, the ferroelectric film, and the upper electrode on the insulating film, forming a mask on the upper-electrode, using this mask to etch the upper-electrode and the ferroelectric film to thereby pattern a pair of upper electrodes and a pair of ferroelectric electrodes, forming such a mask that continuously covers the pair of upper electrodes and the pair of ferroelectric films, and then etching the lower-electrode material film.
摘要翻译：在半导体衬底上的绝缘膜上形成下电极。一对铁电体膜分别形成在下电极上。在一对铁电体膜中的每一个上形成上电极。形成铁电体膜的下部电极的一部分比不形成强电介质膜的部分厚。通过使用该掩模在绝缘膜上依次沉积下电极，铁电体膜和上电极，在上电极上形成掩模，以蚀刻上电极和铁电体膜，从而形成图案一对上电极和一对铁电电极，形成连续地覆盖一对上电极和一对铁电体膜的掩模，然后蚀刻下电极材料膜。

8. 发明授权

US06680499B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06680499B2
公开(公告)日：2004-01-20
申请号：US09988138
申请日：2001-11-19
申请人： Yoshinori Kumura , Hiroyuki Kanaya , Iwao Kunishima
发明人： Yoshinori Kumura , Hiroyuki Kanaya , Iwao Kunishima
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55
摘要： Provided are a semiconductor memory device that permits increasing the degree of integration without decreasing the capacitance of the capacitor included in a memory cell, and a method of manufacturing the particular semiconductor memory device. Specifically, provided are a semiconductor memory device, comprising a semiconductor substrate, an interlayer insulating film formed on the semiconductor substrate, a first electrode formed on the interlayer insulating film, a first ferroelectric film formed on the first electrode, a second electrode formed on the first ferroelectric film, a second ferroelectric film formed on the second electrode, and a third electrode formed on the second ferroelectric film, and a method of manufacturing the particular semiconductor memory device.
摘要翻译：提供一种允许增加集成度而不减小包括在存储单元中的电容器的电容的半导体存储器件，以及制造特定半导体存储器件的方法。具体地，提供一种半导体存储器件，包括半导体衬底，形成在半导体衬底上的层间绝缘膜，形成在层间绝缘膜上的第一电极，形成在第一电极上的第一铁电膜，形成在第一电极上的第二电极第一铁电体膜，形成在第二电极上的第二铁电体膜和形成在第二铁电体膜上的第三电极，以及制造特定半导体存储器件的方法。

9. 发明授权

US06603161B2 Semiconductor device having ferroelectric capacitor and method for manufacturing the same 失效
标题翻译：具有铁电电容器的半导体装置及其制造方法
公开(公告)号：US06603161B2
公开(公告)日：2003-08-05
申请号：US09801920
申请日：2001-03-09
申请人： Hiroyuki Kanaya , Yasuyuki Taniguchi , Tohru Ozaki , Yoshinori Kumura
发明人： Hiroyuki Kanaya , Yasuyuki Taniguchi , Tohru Ozaki , Yoshinori Kumura
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , H01L21/31116 , H01L21/32136 , H01L27/11507 , H01L28/56 , H01L28/75
摘要： There is provided a semiconductor device having a ferroelectric capacitor formed on a semiconductor substrate covered with an insulator film, wherein the ferroelectric capacitor comprises: a bottom electrode formed on the insulator film; a ferroelectric film formed on the bottom electrode; and a top electrode formed on the ferroelectric film. The ferroelectric film has a stacked structure of either of two-layer-ferroelectric film or three-layer-ferroelectric film. The upper ferroelectric film is metallized and prevents hydrogen from diffusing in lower ferroelectric layer. Crystal grains of the stacked ferroelectric films are preferably different.
摘要翻译：提供一种半导体器件，其具有形成在被绝缘体膜覆盖的半导体衬底上的铁电电容器，其中所述强电介质电容器包括：形成在所述绝缘膜上的底部电极; 形成在底部电极上的铁电体膜; 以及形成在强电介质膜上的顶部电极。铁电体膜具有两层铁电体膜或三层铁电体膜的层叠结构。上部铁电膜被金属化，并防止氢在下部铁电层中扩散。堆叠的铁电体膜的晶粒优选不同。

10. 发明申请

US20160027843A1 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20160027843A1
公开(公告)日：2016-01-28
申请号：US14629023
申请日：2015-02-23
申请人： Yoshinori KUMURA
发明人： Yoshinori KUMURA
IPC分类号： H01L27/22 , H01L29/66 , H01L43/10 , H01L43/12 , H01L43/02 , H01L43/08
CPC分类号： H01L27/228 , H01L43/02 , H01L43/08 , H01L43/10 , H01L43/12
摘要： According to one embodiment, a semiconductor memory device includes a magnetic tunnel junction (MTJ) element, a contact layer and a first material layer. The contact layer is provided under the MTJ element and comprises a first material. The first material layer is provided around the contact layer and comprises the first material or an oxide of the first material.
摘要翻译：根据一个实施例，半导体存储器件包括磁性隧道结（MTJ）元件，接触层和第一材料层。接触层设置在MTJ元件下方并且包括第一材料。第一材料层设置在接触层周围并且包括第一材料或第一材料的氧化物。

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