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    • 1. 发明授权
    • Image decoding device, image decoding method, integrated circuit, and program for performing parallel decoding of coded image data
    • 图像解码装置,图像解码方法,集成电路和用于对编码图像数据进行并行解码的程序
    • US08737476B2
    • 2014-05-27
    • US12812134
    • 2009-10-20
    • Yoshiteru Hayashi
    • Yoshiteru Hayashi
    • H04N7/12
    • H04N19/573H04N19/423H04N19/436H04N19/44
    • An image decoding device capable of performing parallel decoding of coded image data with a small memory bandwidth while suppressing momentary increase in the amount of data transferred for the decoding. An image decoding device (100) includes: an external memory (110) which stores data of reference images; a stream parser unit (120) which decodes reference information indicating the number of reference images to be referred to on a block-by-block basis; an amount-of-transferred-data prediction unit (131) which calculates, on a block-by-block basis using the reference information, a predictive data amount of a reference image to be read out from the external memory (110); a block determination unit (132) which determines, using the predictive data amount, multiple blocks to be decoded in parallel, so as to reduce variation in amounts of data read out from the external memory (110); and macroblock decoding units (140 to 160) which decode the determined blocks in parallel.
    • 一种图像解码装置,其能够在抑制传送的解码数据的瞬间增加的同时,以小的存储带宽进行编码图像数据的并行解码。 图像解码装置(100)包括:外部存储器(110),其存储参考图像的数据; 流解析器单元(120),其逐块地对表示要参考的参考图像的数量的参考信息进行解码; 传送量数据预测单元,其在逐块的基础上使用参考信息计算要从外部存储器读出的参考图像的预测数据量; 块确定单元,其使用所述预测数据量来并行地确定要解码的多个块,以便减少从所述外部存储器读出的数据量的变化; 以及对所确定的块并行解码的宏块解码单元(140〜160)。
    • 2. 发明授权
    • Image decoding apparatus, image coding apparatus, image decoding circuit, and image decoding method
    • 图像解码装置,图像编码装置,图像解码电路以及图像解码方法
    • US08559736B2
    • 2013-10-15
    • US13321857
    • 2011-03-16
    • Hiroshi AmanoTakeshi TanakaTakashi HashimotoYoshiteru Hayashi
    • Hiroshi AmanoTakeshi TanakaTakashi HashimotoYoshiteru Hayashi
    • H04N7/50
    • H04N19/60H04N19/122H04N19/44H04N19/547
    • A decoding apparatus (100) according to the present invention includes: a decoding unit (101) which decodes identification information identifying an orthogonal transform basis for inverse orthogonal transform; an orthogonal transform basis accumulation unit (110) accumulating orthogonal transform bases for inverse orthogonal transform; an orthogonal transform basis storage unit (103) storing an orthogonal transform basis for inverse transform, from among the stored orthogonal transform bases; an inverse orthogonal transform unit (112) which performs inverse orthogonal transform using the identified orthogonal transform basis; and an orthogonal transform basis transfer control unit (102) which transfers the identified orthogonal transfer basis from the orthogonal transform basis accumulation unit (110) to the orthogonal transfer basis storage unit (103) only when the identified orthogonal transform basis is not yet stored therein. With this structure, it is possible to reduce the memory bandwidth for the memory storing the orthogonal transform basis and the memory access latency.
    • 根据本发明的解码装置(100)包括:解码单元(101),其对识别用于逆正交变换的正交变换基准的识别信息进行解码; 正交变换基积累单元(110),累积用于逆正交变换的正交变换基; 正交变换基准存储单元,从存储的正交变换基中存储用于逆变换的正交变换基础; 使用所识别的正交变换基础进行逆正交变换的逆正交变换单元(112) 以及正交变换基传送控制单元(102),其仅在所识别的正交变换基础尚未存储时,将所识别的正交传送基础从正交变换基础累积单元(110)传送到正交传送基础存储单元(103) 。 利用这种结构,可以减少存储正交变换基础和存储器访问延迟的存储器的存储器带宽。
    • 3. 发明申请
    • DECODING APPARATUS, DECODING METHOD, PROGRAM AND INTEGRATED CIRCUIT
    • 解码设备,解码方法,程序和集成电路
    • US20110235716A1
    • 2011-09-29
    • US13121041
    • 2010-10-07
    • Takeshi TanakaHiroshi AmanoYoshiteru HayashiTakashi HashimotoSatoshi Kajita
    • Takeshi TanakaHiroshi AmanoYoshiteru HayashiTakashi HashimotoSatoshi Kajita
    • H04N7/26
    • H04N19/433H04N19/44
    • A decoding apparatus (100) includes: a first memory unit (20) storing pixel data of a decoded reference image to be referred to in decoding; a second memory unit (30) having a storage capacity smaller than that of the first memory unit (20) and providing a data reading speed faster than that provided by the first memory unit (20); a search area transfer unit (40) transferring, from the first memory unit (20) to the second memory unit (30), pixel data in a search area that is a part of the reference image and required to calculate a motion vector for the block; a motion vector operating unit (50) calculating the motion vector by repeatedly (i) reading out, from the second memory unit (30), the pixel data and (ii) performing a predetermined operation on the pixel data; and a decoding unit (60) decoding the block using the calculated motion vector.
    • 解码装置(100)包括:第一存储单元,存储解码中要参考的解码参考图像的像素数据; 具有比第一存储单元(20)的存储容量小的存储容量的第二存储器单元(30),并且提供比由第一存储器单元(20)提供的数据读取速度更快的数据读取速度; 搜索区域传送单元,从第一存储单元(20)向第二存储单元(30)传送作为参考图像的一部分的搜索区域中的像素数据,并且需要计算用于 块; 运动矢量运算单元,通过重复地(i)从第二存储器单元(30)读出像素数据和(ii)对像素数据执行预定的操作来计算运动矢量; 以及解码单元(60),使用所计算的运动矢量对该块进行解码。
    • 4. 发明申请
    • IMAGE DECODING DEVICE, IMAGE DECODING METHOD, INTEGRATED CIRCUIT, AND PROGRAM
    • 图像解码设备,图像解码方法,集成电路和程序
    • US20100284468A1
    • 2010-11-11
    • US12812134
    • 2009-10-20
    • Yoshiteru Hayashi
    • Yoshiteru Hayashi
    • H04N7/32G06K9/36
    • H04N19/573H04N19/423H04N19/436H04N19/44
    • An image decoding device capable of performing parallel decoding of coded image data with a small memory bandwidth while suppressing momentary increase in the amount of data transferred for the decoding. An image decoding device (100) includes: an external memory (110) which stores data of reference images; a stream parser unit (120) which decodes reference information indicating the number of reference images to be referred to on a block-by-block basis; an amount-of-transferred-data prediction unit (131) which calculates, on a block-by-block basis using the reference information, a predictive data amount of a reference image to be read out from the external memory (110); a block determination unit (132) which determines, using the predictive data amount, multiple blocks to be decoded in parallel, so as to reduce variation in amounts of data read out from the external memory (110); and macroblock decoding units (140 to 160) which decode the determined blocks in parallel.
    • 一种图像解码装置,其能够在抑制传送的解码数据的瞬间增加的同时,以小的存储带宽进行编码图像数据的并行解码。 图像解码装置(100)包括:外部存储器(110),其存储参考图像的数据; 流解析器单元(120),其逐块地对表示要参考的参考图像的数量的参考信息进行解码; 传送量数据预测单元,其在逐块的基础上使用参考信息计算要从外部存储器读出的参考图像的预测数据量; 块确定单元,其使用所述预测数据量来并行地确定要解码的多个块,以便减少从所述外部存储器读出的数据量的变化; 以及对所确定的块并行解码的宏块解码单元(140〜160)。
    • 6. 发明申请
    • MOVING IMAGE DECODING APPARATUS, MOVING IMAGE CODING APPARATUS, MOVING IMAGE DECODING CIRCUIT, AND MOVING IMAGE DECODING METHOD
    • 移动图像解码设备,移动图像编码设备,移动图像解码电路和移动图像解码方法
    • US20120147959A1
    • 2012-06-14
    • US13255267
    • 2011-03-02
    • Hiroshi AmanoTakeshi TanakaTakashi HashimotoYoshiteru Hayashi
    • Hiroshi AmanoTakeshi TanakaTakashi HashimotoYoshiteru Hayashi
    • H04N7/32
    • H04N19/82H04N19/117H04N19/43H04N19/44H04N19/513H04N19/61
    • A moving image decoding apparatus which enables reduction in the memory bandwidth and the memory access latency for the motion compensation filter coefficients for use in inter-picture prediction involving motion compensation using variable coefficients includes: a decoding unit (101) which decodes, from a coded stream, a plurality of motion compensation filter coefficients; a memory (109) for holding the motion compensation filter coefficients included in the coded stream; a filter coefficient storage unit (103) for holding at least one of the motion compensation filter coefficients which is required for the motion compensation; a motion compensation unit (107) which performs motion compensation using the required motion compensation filter coefficient held in the filter coefficient storage unit; and a filter coefficient transfer control unit (102) which writes, in the memory, the motion compensation filter coefficients decoded by the decoding unit, and transfers the required motion compensation filter coefficient from the memory to the filter coefficient storage unit, only when the required coefficient is not yet stored therein.
    • 一种运动图像解码装置,其能够减少使用可变系数的运动补偿的帧间预测中使用的运动补偿滤波器系数的存储器带宽和存储器访问等待时间,包括:解码单元, 流,多个运动补偿滤波器系数; 用于保持包含在编码流中的运动补偿滤波器系数的存储器(109) 滤波器系数存储单元,用于保持运动补偿所需的运动补偿滤波器系数中的至少一个; 使用保持在滤波器系数存储单元中的所需运动补偿滤波器系数进行运动补偿的运动补偿单元(107) 以及滤波器系数传递控制单元(102),其在存储器中写入由解码单元解码的运动补偿滤波器系数,并且将所需的运动补偿滤波器系数从存储器传送到滤波器系数存储单元,只有当所需的 系数尚未存储在其中。