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    • 2. 发明申请
    • Synchronous rectifier control device and a forward synchronous rectifier circuit
    • 同步整流控制装置和正向同步整流电路
    • US20090168464A1
    • 2009-07-02
    • US12155353
    • 2008-06-03
    • Chun-Ming LinTa-Ching HsuYun-Kang Chu
    • Chun-Ming LinTa-Ching HsuYun-Kang Chu
    • H02M3/335
    • H02M3/33592Y02B70/1475
    • A synchronous rectifier control device comprises a status detecting unit, an analog circuit, a first counter, a second counter and a signal process unit. The status detecting unit receives at least one reference signal and a detecting signal to generate a first synchronous control signal. The analog circuit generates a delay signal in accordance with the first synchronous control signal. The first counter receives a clock signal and generates a first counter signal in accordance with the first synchronous control signal, the clock signal, and the delay signal. The second counter receives the clock signal and generates a second counter signal in accordance with the first synchronous control signal, the clock signal, and the first counter signal. The signal process unit generates a second synchronous control signal in accordance with the first synchronous control signal and the second signal.
    • 同步整流器控制装置包括状态检测单元,模拟电路,第一计数器,第二计数器和信号处理单元。 状态检测单元接收至少一个参考信号和检测信号以产生第一同步控制信号。 模拟电路根据第一同步控制信号产生延迟信号。 第一计数器接收时钟信号,并根据第一同步控制信号,时钟信号和延迟信号产生第一计数器信号。 第二计数器接收时钟信号,并根据第一同步控制信号,时钟信号和第一计数器信号产生第二计数器信号。 信号处理单元根据第一同步控制信号和第二信号产生第二同步控制信号。
    • 3. 发明授权
    • Synchronous rectifier control device and a forward synchronous rectifier circuit
    • 同步整流控制装置和正向同步整流电路
    • US07952894B2
    • 2011-05-31
    • US12155353
    • 2008-06-03
    • Chun-Ming LinTa-Ching HsuYun-Kang Chu
    • Chun-Ming LinTa-Ching HsuYun-Kang Chu
    • H02M3/335H02M7/217
    • H02M3/33592Y02B70/1475
    • A synchronous rectifier control device comprises a status detecting unit, an analog circuit, a first counter, a second counter and a signal process unit. The status detecting unit receives at least one reference signal and a detecting signal to generate a first synchronous control signal. The analog circuit generates a delay signal in accordance with the first synchronous control signal. The first counter receives a clock signal and generates a first counter signal in accordance with the first synchronous control signal, the clock signal, and the delay signal. The second counter receives the clock signal and generates a second counter signal in accordance with the first synchronous control signal, the clock signal, and the first counter signal. The signal process unit generates a second synchronous control signal in accordance with the first synchronous control signal and the second signal.
    • 同步整流器控制装置包括状态检测单元,模拟电路,第一计数器,第二计数器和信号处理单元。 状态检测单元接收至少一个参考信号和检测信号以产生第一同步控制信号。 模拟电路根据第一同步控制信号产生延迟信号。 第一计数器接收时钟信号,并根据第一同步控制信号,时钟信号和延迟信号产生第一计数器信号。 第二计数器接收时钟信号,并根据第一同步控制信号,时钟信号和第一计数器信号产生第二计数器信号。 信号处理单元根据第一同步控制信号和第二信号产生第二同步控制信号。