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    • 2. 发明授权
    • Pixel structure and display panel
    • 像素结构和显示面板
    • US09425218B2
    • 2016-08-23
    • US14287727
    • 2014-05-27
    • AU Optronics Corporation
    • Wan-Heng ChangHsiao-Wei ChengShih-Chyuan Fan Jiang
    • G02F1/1343H01L27/12
    • H01L27/124G02F1/134363
    • A pixel structure disposed on a first substrate is provided. The pixel structure includes a scan line, a data line, an active component, a pixel electrode, a first dielectric layer, a common electrode, and a protrusion. The scan line and the data line are disposed on the first substrate. The pixel electrode is disposed on the first substrate. The first dielectric layer is disposed on the first substrate and covers the pixel electrode. The common electrode is disposed on the first dielectric layer, and the common electrode has at least two first branched electrodes and a first opening between the first branched electrodes. The first branched electrodes and the first opening on the first substrate overlap with the pixel electrode in a projection direction. The protrusion is disposed on the first dielectric layer, and the protrusion is disposed in the first opening between the first branched electrodes.
    • 设置在第一基板上的像素结构。 像素结构包括扫描线,数据线,有源部件,像素电极,第一电介质层,公共电极和突起。 扫描线和数据线设置在第一基板上。 像素电极设置在第一基板上。 第一介电层设置在第一基板上并覆盖像素电极。 公共电极设置在第一电介质层上,公共电极具有至少两个第一分支电极和第一分支电极之间的第一开口。 第一分支电极和第一基板上的第一开口在投影方向与像素电极重叠。 突起设置在第一电介质层上,并且突起设置在第一分支电极之间的第一开口中。
    • 3. 发明授权
    • Fringe field switching mode liquid crystal display panel
    • 边缘现场开关模式液晶显示面板
    • US09223180B2
    • 2015-12-29
    • US13798607
    • 2013-03-13
    • AU Optronics Corporation
    • Wan-Heng ChangHsiao-Wei ChengShih-Chyuan Fan Jiang
    • G02F1/1343
    • G02F1/134309G02F1/133345G02F1/134363G02F1/136286G02F1/1368G02F2001/134372G02F2201/121
    • A Fringe-Field Switching (FFS) mode liquid crystal display (LCD) panel with optimized designs of pixel areas and/or liquid crystal materials is provided. The FFS mode LCD panel includes an active-element array substrate with a plurality of pixel areas, an opposite substrate, and a liquid crystal layer. Each pixel area comprises a plurality of first common electrodes, a second common electrode between the pixel area and another horizontally adjacent pixel area, and a pixel electrode. The optical transmittance and homogeneity of the pixel area of the display panel are modified by manipulating the relative position of the electrodes in the pixel areas on the active-element array substrate and/or adopting specific parameters of liquid crystal materials in the liquid crystal layer of the display panel.
    • 提供了具有优化的像素区域和/或液晶材料设计的边缘场切换(FFS)模式液晶显示(LCD)面板。 FFS模式LCD面板包括具有多个像素区域的有源元件阵列基板,相对基板和液晶层。 每个像素区域包括多个第一公共电极,像素区域和另一个水平相邻像素区域之间的第二公共电极和像素电极。 通过操纵有源元件阵列基板上的像素区域中的电极的相对位置和/或在液晶层的液晶层中采用液晶材料的特定参数来修改显示面板的像素区域的光透射率和均匀性 显示面板。
    • 4. 发明授权
    • Display panel and array substrate thereof
    • 显示面板及其阵列基板
    • US09165946B1
    • 2015-10-20
    • US14487658
    • 2014-09-16
    • AU Optronics Corporation
    • Wan-Heng ChangHsiao-Wei ChengShih-Chyuan Fan Jiang
    • H01L27/14H01L27/12H01L29/786
    • H01L27/124G02F1/133345G02F1/134363G02F2001/134372H01L27/1218H01L27/1248
    • An array substrate includes a scan line, a data line, a thin film transistor, a first transparent electrode, a passivation layer, and a second transparent electrode. The scan line and the data line interlace to define a pixel region. The gate dielectric layer of the thin film transistor overlaps the scan line and the data line and extends to cover the pixel region. The gate dielectric layer has a first region, a second region, and a third region. The first region corresponds to the semiconductor layer of the thin film transistor. The second region connects the first region and the third region. The thickness of the second region is different from that of the third region. The first transparent electrode covers the gate dielectric layer in the pixel region. The passivation layer covers the thin film transistor and the first transparent electrode. The second transparent electrode covers the passivation layer.
    • 阵列基板包括扫描线,数据线,薄膜晶体管,第一透明电极,钝化层和第二透明电极。 扫描线和数据线交织以定义像素区域。 薄膜晶体管的栅极电介质层与扫描线和数据线重叠,并延伸以覆盖像素区域。 栅介质层具有第一区域,第二区域和第三区域。 第一区域对应于薄膜晶体管的半导体层。 第二区域连接第一区域和第三区域。 第二区域的厚度与第三区域的厚度不同。 第一透明电极覆盖像素区域中的栅介质层。 钝化层覆盖薄膜晶体管和第一透明电极。 第二透明电极覆盖钝化层。