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1. 发明授权

US08143722B2 Wafer-level interconnect for high mechanical reliability applications 有权
标题翻译：晶圆级互连，用于高机械可靠性应用
公开(公告)号：US08143722B2
公开(公告)日：2012-03-27
申请号：US11867646
申请日：2007-10-04
申请人： Anthony Curtis , Guy F. Burgess , Michael Johnson , Ted Tessier , Yuan Lu
发明人： Anthony Curtis , Guy F. Burgess , Michael Johnson , Ted Tessier , Yuan Lu
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L24/10 , B23K35/262 , B23K2101/36 , C22C13/00 , H01L24/13 , H01L2224/0401 , H01L2224/05124 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05171 , H01L2224/0558 , H01L2224/05644 , H01L2224/05647 , H01L2224/13 , H01L2224/131 , H01L2224/16 , H01L2924/00013 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H05K3/3463 , H01L2224/13099 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： An interconnect structure comprises a solder including nickel (Ni) and tin (Sn), with the nickel in a range of 0.01 to 0.20 percent by weight. The interconnect structure further includes an intermetallic compound (IMC) layer in contact with the solder. The (IMC) layer comprises a compound of copper and nickel.
摘要翻译：互连结构包括包含镍（Ni）和锡（Sn）的焊料，其中镍在0.01至0.20重量％的范围内。互连结构还包括与焊料接触的金属间化合物（IMC）层。（IMC）层包含铜和镍的化合物。

2. 发明授权

US08754524B2 Wafer-level interconnect for high mechanical reliability applications 有权
标题翻译：晶圆级互连，用于高机械可靠性应用
公开(公告)号：US08754524B2
公开(公告)日：2014-06-17
申请号：US13397876
申请日：2012-02-16
申请人： Anthony Curtis , Guy F. Burgess , Michael Johnson , Ted Tessier , Yuan Lu
发明人： Anthony Curtis , Guy F. Burgess , Michael Johnson , Ted Tessier , Yuan Lu
IPC分类号： H01L23/48
CPC分类号： H01L24/10 , B23K35/262 , B23K2101/36 , C22C13/00 , H01L24/13 , H01L2224/0401 , H01L2224/05124 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05171 , H01L2224/0558 , H01L2224/05644 , H01L2224/05647 , H01L2224/13 , H01L2224/131 , H01L2224/16 , H01L2924/00013 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H05K3/3463 , H01L2224/13099 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： An interconnect structure comprises a solder including nickel (Ni) in a range of 0.01 to 0.20 percent by weight. The interconnect structure further includes an intermetallic compound (IMC) layer in contact with the solder. The IMC layer comprises a compound of copper and nickel.
摘要翻译：互连结构包括包含0.01至0.20重量％范围内的镍（Ni）的焊料。互连结构还包括与焊料接触的金属间化合物（IMC）层。 IMC层包含铜和镍的化合物。

3. 发明申请

US20120146219A1 WAFER-LEVEL INTERCONNECT FOR HIGH MECHANICAL RELIABILITY APPLICATIONS 有权
标题翻译：高机械可靠性应用的水平互联
公开(公告)号：US20120146219A1
公开(公告)日：2012-06-14
申请号：US13397876
申请日：2012-02-16
申请人： Anthony Curtis , Guy F. Burgess , Michael Johnson , Ted Tessier , Yuan Lu
发明人： Anthony Curtis , Guy F. Burgess , Michael Johnson , Ted Tessier , Yuan Lu
IPC分类号： H01L23/48
CPC分类号： H01L24/10 , B23K35/262 , B23K2101/36 , C22C13/00 , H01L24/13 , H01L2224/0401 , H01L2224/05124 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05171 , H01L2224/0558 , H01L2224/05644 , H01L2224/05647 , H01L2224/13 , H01L2224/131 , H01L2224/16 , H01L2924/00013 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H05K3/3463 , H01L2224/13099 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： An interconnect structure comprises a solder including nickel (Ni) in a range of 0.01 to 0.20 percent by weight. The interconnect structure further includes an intermetallic compound (IMC) layer in contact with the solder. The IMC layer comprises a compound of copper and nickel.
摘要翻译：互连结构包括包含0.01至0.20重量％范围内的镍（Ni）的焊料。互连结构还包括与焊料接触的金属间化合物（IMC）层。 IMC层包含铜和镍的化合物。

4. 发明申请

US20080083986A1 WAFER-LEVEL INTERCONNECT FOR HIGH MECHANICAL RELIABILITY APPLICATIONS 有权
标题翻译：高机械可靠性应用的水平互联
公开(公告)号：US20080083986A1
公开(公告)日：2008-04-10
申请号：US11867646
申请日：2007-10-04
申请人： Anthony Curtis , Guy Burgess , Michael Johnson , Ted Tessier , Yuan Lu
发明人： Anthony Curtis , Guy Burgess , Michael Johnson , Ted Tessier , Yuan Lu
IPC分类号： H01L23/538
CPC分类号： H01L24/10 , B23K35/262 , B23K2101/36 , C22C13/00 , H01L24/13 , H01L2224/0401 , H01L2224/05124 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05171 , H01L2224/0558 , H01L2224/05644 , H01L2224/05647 , H01L2224/13 , H01L2224/131 , H01L2224/16 , H01L2924/00013 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H05K3/3463 , H01L2224/13099 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： The structure described herein incorporates an interconnect positioned between two spaced electrical contacts. The interconnect comprises a lead (Pb)-free solder alloy consisting essentially of nickel (Ni), tin (Sn), silver (Ag), and copper (Cu). The nickel (Ni) content is sufficient to produce a smooth interfacial IMC layer in an under bump metallurgy (UBM) when disposed between the two contacts. An embodiment of the structure described herein is a device comprising a substrate, an under bump metallurgy (UBM) disposed on the substrate, a bulk solder body disposed on the under bump metallurgy (UBM), and a wafer device connected to the under bump metallurgy (UBM) through the bulk solder body. The bulk solder body comprises of nickel (Ni), tin (Sn), silver (Ag), and copper (Cu). The nickel (Ni) is in a range of 0.01 to 0.20 percent by weight (wt %).
摘要翻译：本文描述的结构包括位于两个间隔开的电触点之间的互连。互连包括基本上由镍（Ni），锡（Sn），银（Ag）和铜（Cu）组成的无铅（Pb）焊料合金。当设置在两个触点之间时，镍（Ni）含量足以在凸块下冶金（UBM）中产生平滑的界面IMC层。本文所述的结构的一个实施例是一种器件，包括衬底，设置在衬底上的凸块下金属（UBM），设置在凸块下金属（UBM）上的体焊料体）和连接到凸块下的冶金（UBM）通过大块焊料体。大块焊料体由镍（Ni），锡（Sn），银（Ag）和铜（Cu）构成。镍（Ni）的含量在0.01〜0.20重量％的范围内。

5. 发明申请

US20090014869A1 SEMICONDUCTOR DEVICE PACKAGE WITH BUMP OVERLYING A POLYMER LAYER 审中-公开
标题翻译：具有覆盖聚合物层的保护层的半导体器件封装
公开(公告)号：US20090014869A1
公开(公告)日：2009-01-15
申请号：US11718192
申请日：2005-10-28
申请人： Joan K. Vrtis , Anthony Curtis , Bret Trimmer , Brian King , Yuan Lu , Haluk Balkan
发明人： Joan K. Vrtis , Anthony Curtis , Bret Trimmer , Brian King , Yuan Lu , Haluk Balkan
IPC分类号： H01L23/488 , H01L21/44
CPC分类号： H01L24/05 , H01L23/3192 , H01L24/11 , H01L24/13 , H01L2224/0231 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05572 , H01L2224/05599 , H01L2224/11334 , H01L2224/131 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/05042 , H01L2924/10329 , H01L2924/14 , H01L2924/3011 , H01L2224/13099 , H01L2224/05552
摘要： A semiconductor device package, for example a flip-chip package, having a solder bump mounted above a polymer layer for use in flip-chip mounting of a semiconductor device to a circuit board. A polymer layer such as polybenzoxazole is formed overlying a wafer passivation layer. Solder bumps are attached to an under-bump metallization layer and electrically coupled to conductive bond pads exposed by openings in the wafer passivation layer.
摘要翻译：半导体器件封装，例如倒装芯片封装，其具有安装在聚合物层上方的焊料凸块，用于将半导体器件倒装安装到电路板。聚合物层如聚苯并恶唑形成在晶片钝化层之上。焊料凸点连接到凸块下金属化层上，并且电耦合到由晶片钝化层中的开口暴露的导电接合焊盘。

6. 发明授权

US07926020B1 Methods for automatically generating assertions 有权
标题翻译：自动生成断言的方法
公开(公告)号：US07926020B1
公开(公告)日：2011-04-12
申请号：US11672919
申请日：2007-02-08
申请人： Yuan Lu , Yunshan Zhu
发明人： Yuan Lu , Yunshan Zhu
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： One embodiment of the present invention provides a method that automatically generates assertions of a hardware design. The method includes accessing a trace and a set of predicates of the hardware design. Then, the trace is projected over the set of predicates to generate a second trace. Then, a new set of states of the second trace is computed and the result is represented as a logical formula. The formula is reduced by logic optimization techniques. And finally, a set of logical consequences of the logic formula is produced and each logical consequence is enumerated as an assertion.
摘要翻译：本发明的一个实施例提供一种自动产生硬件设计的断言的方法。该方法包括访问硬件设计的跟踪和一组谓词。然后，将轨迹投影在该组谓词上以生成第二个轨迹。然后，计算第二个跟踪的新的一组状态，并将结果表示为逻辑公式。该公式由逻辑优化技术减少。最后，产生一组逻辑公式的逻辑后果，并将每个逻辑结果列举为一个断言。

7. 发明申请

US20090137411A1 Methods and biochips for detecting small molecule compounds 审中-公开
标题翻译：检测小分子化合物的方法和生物芯片
公开(公告)号：US20090137411A1
公开(公告)日：2009-05-28
申请号：US10593908
申请日：2005-03-28
申请人： Yimin Sun , Wanli Xing , Guoqing Wang , Hongwu Du , Rong Zhang , Yuan Lu , Yan Wang , Jing Cheng
发明人： Yimin Sun , Wanli Xing , Guoqing Wang , Hongwu Du , Rong Zhang , Yuan Lu , Yan Wang , Jing Cheng
IPC分类号： C40B30/04 , C40B40/04 , C40B50/18
CPC分类号： G01N33/543 , B01J2219/00387 , B01J2219/00605 , B01J2219/0061 , B01J2219/00612 , B01J2219/00621 , B01J2219/00626 , B01J2219/00659 , B01J2219/0072 , C40B60/14 , G01N33/54366
摘要： The present invention discloses methods for detection of small molecule compounds and its specific biochips. Biochips of the present invention comprise a solid support and carrier-linked small molecules immobilized onto the solid support. The invention also provides methods and kits for detection of small molecule compounds using the biochips of the invention.
摘要翻译：本发明公开了小分子化合物及其特定生物芯片的检测方法。本发明的生物芯片包含固体支持物和固定在固体支持物上的载体连接的小分子。本发明还提供了使用本发明的生物芯片检测小分子化合物的方法和试剂盒。

8. 发明授权

US09135382B1 Systems, methods, and media for assertion-based verification of devices 有权
标题翻译：用于基于断言的设备验证的系统，方法和介质
公开(公告)号：US09135382B1
公开(公告)日：2015-09-15
申请号：US13672477
申请日：2012-11-08
申请人： Yuan Lu , Nitin Mhaske , Yunshan Zhu
发明人： Yuan Lu , Nitin Mhaske , Yunshan Zhu
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F17/504
摘要： Systems and methods for functionally verifying the performance of a system on a chip (SOC) are provided herein. According to some embodiments, the methods may include at least the steps of analyzing a verification log, via a functional verification system, to determine signatures by correlating a pattern of at least one of triggered and untriggered assertions in one or more blocks of a plurality of blocks to behaviors of at least one of the SOC and the one or more blocks of the plurality of blocks. Exemplary methods also include categorizing signatures according to the behaviors, and storing similar signatures based upon the categorization in a database.
摘要翻译：本文提供了用于功能验证芯片上的系统（SOC）的性能的系统和方法。根据一些实施例，所述方法可以至少包括以下步骤：经由功能验证系统分析验证日志，以通过将多个的一个或多个块中的触发和未触发断言中的至少一个的模式相关联来确定签名阻止多个块中的SOC和一个或多个块中的至少一个的行为。示例性方法还包括根据行为分类签名，并且基于数据库中的分类来存储类似的签名。

9. 发明授权

US08326778B1 Systems and methods for generating predicates and assertions 有权
标题翻译：用于生成谓词和断言的系统和方法
公开(公告)号：US08326778B1
公开(公告)日：2012-12-04
申请号：US12649144
申请日：2009-12-29
申请人： Yuan Lu , Yunshan Zhu
发明人： Yuan Lu , Yunshan Zhu
IPC分类号： G06N5/00
CPC分类号： G06N5/04
摘要： Systems and methods for deriving a predicate by constructing a logic formula from information recorded during test execution, optimizing the logic formula and computing the logical implication of the optimized logic formula. Systems and methods for deriving an assertion from a logical implication by substituting each predicate in the logical implication with corresponding design elements from a hardware design description, inserting the design elements into a target template, inserting a context-sensitive input of the target template based on design elements in the hardware design description and creating an instance name for an instantiation of the target template. Systems and methods for generating a set of clauses that are implied by a disjunctive normal formula of a set of cubes.
摘要翻译：通过从测试执行期间记录的信息构建逻辑公式来推导谓词的系统和方法，优化逻辑公式并计算优化的逻辑公式的逻辑含义。通过用硬件设计描述中的相应设计元素代替逻辑含义中的每个谓词，将设计元素插入到目标模板中，基于目标模板插入目标模板的上下文相关输入，从逻辑含义导出断言的系统和方法硬件设计描述中的设计元素，并为目标模板的实例创建实例名称。用于生成由一组立方体的分离正态公式暗示的一组子句的系统和方法。

10. 发明授权

US08188606B2 Solder bump interconnect 有权
标题翻译：焊点互连
公开(公告)号：US08188606B2
公开(公告)日：2012-05-29
申请号：US13085759
申请日：2011-04-13
申请人： Reynante Alvarado , Yuan Lu , Richard Redburn
发明人： Reynante Alvarado , Yuan Lu , Richard Redburn
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/05 , H01L23/3171 , H01L23/3192 , H01L24/02 , H01L24/03 , H01L24/13 , H01L2224/0235 , H01L2224/0239 , H01L2224/0345 , H01L2224/0346 , H01L2224/0401 , H01L2224/04042 , H01L2224/05022 , H01L2224/05073 , H01L2224/05124 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05541 , H01L2224/05548 , H01L2224/05554 , H01L2224/05555 , H01L2224/05567 , H01L2224/05572 , H01L2224/0558 , H01L2224/05644 , H01L2224/05647 , H01L2224/05666 , H01L2224/1148 , H01L2224/13006 , H01L2224/13007 , H01L2224/13021 , H01L2224/13022 , H01L2224/131 , H01L2224/45144 , H01L2224/45147 , H01L2224/48644 , H01L2224/48647 , H01L2224/48666 , H01L2224/48844 , H01L2224/48847 , H01L2224/48866 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10271 , H01L2924/10329 , H01L2924/12044 , H01L2924/14 , H01L2924/3011 , H01L2924/351 , H01L2924/00014 , H01L2924/00015 , H01L2224/13099 , H01L2924/00
摘要： A semiconductor package includes a device pad on a substrate. A polybenzoxazole (PBO) layer overlies the substrate, and the PBO layer has an opening to expose the device pad. A redistribution layer (RDL) comprises a landing pad, and the RDL is positioned on the PBO layer and conductively coupled to the device pad. A polymer layer is on the RDL, and an under bump metal pad (UBM) is on the landing pad and extends onto a top surface of the polymer layer. The UBM electrically connects to the landing pad through an opening in the polymer layer. A solder bump is secured to the UBM. A shortest distance from a center of the landing pad to an outer edge of the landing pad, and a shortest distance from a center of the UBM to an outer edge of the UBM are in a ratio that ranges from 0.5:1 up to 0.95:1.
摘要翻译：半导体封装包括在衬底上的器件焊盘。聚苯并恶唑（PBO）层覆盖在基底上，并且PBO层具有露出装置垫的开口。再分配层（RDL）包括着陆焊盘，并且RDL定位在PBO层上并且导电地耦合到器件焊盘。聚合物层位于RDL上，底部凸块金属垫（UBM）位于着陆垫上并延伸到聚合物层的顶表面上。 UBM通过聚合物层中的开口与着陆垫电连接。焊接凸块固定在UBM上。从着陆焊盘的中心到着陆焊盘的外边缘的最短距离，并且从UBM的中心到UBM的外边缘的最短距离的范围为0.5:1至0.95： 1。

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