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    • 2. 发明申请
    • Jitter controlled WFQ algorithm on network processors and latency constrained hardware
    • 抖动控制的WFQ算法在网络处理器和延迟受限的硬件上
    • US20060153071A1
    • 2006-07-13
    • US11032074
    • 2005-01-11
    • Adrian GrahBin Du
    • Adrian GrahBin Du
    • H04L12/56H04J3/22H04L12/26H04L1/00H04L12/28H04J3/16
    • H04L47/50
    • Systems and methods of reducing service jitter in WFQ scheduling schemes used in packet traffic management are described. Service jitter is the variance in time between when a queue should have been selected for servicing and when it was actually serviced. The service jitter is generally not a problem in lower speed applications but in a high speed implementation such as a OC192 device latency can lead to downstream service contract violations. According to the invention jitter is controlled by applying a dampening factor to a difference amount that is used by the WFQ process to adjust its timing of queue selection. The difference amount is queue-specific and is a running difference between calculated and actual queue servicing times.
    • 描述了在分组流量管理中使用的WFQ调度方案中减少业务抖动的系统和方法。 服务抖动是当队列应被选择用于维修和实际服务时间之间的时间差异。 服务抖动在低速应用中通常不是问题,但是在诸如OC192设备延迟的高速实现中可能导致下游服务合同违规。 根据本发明,通过将阻尼因子应用于由WFQ处理使用的差值来调整其队列选择的时序来控制抖动。 差异量是队列特定的,并且是计算和实际队列服务时间之间的运行差异。
    • 4. 发明授权
    • Support stand for electronic device
    • 支持电子设备
    • US08534619B2
    • 2013-09-17
    • US13210748
    • 2011-08-16
    • Cong HuangWen-Rong ChenHui LiBin Du
    • Cong HuangWen-Rong ChenHui LiBin Du
    • F16M11/38
    • F16M13/00A47B2023/049F16M11/10F16M11/38
    • A support stand includes a first support assembly, a second support assembly, a first connecting assembly connecting one end of the first support assembly and the second support assembly. A second connecting assembly connects the other ends of the first support assembly and the second support assembly. The first support assembly includes two first support mechanisms, each first support mechanism includes a main body, and a first support rod hinged on the main body in a first direction. When the first support rods rotate around the first direction to a back side of the support stand, the first connecting assembly and the second connecting assembly are tilted by the first support rods and the second support assembly.
    • 支撑架包括第一支撑组件,第二支撑组件,连接第一支撑组件的一端和第二支撑组件的第一连接组件。 第二连接组件连接第一支撑组件和第二支撑组件的另一端。 第一支撑组件包括两个第一支撑机构,每个第一支撑机构包括主体和沿第一方向铰接在主体上的第一支撑杆。 当第一支撑杆围绕第一方向旋转到支撑架的后侧时,第一连接组件和第二连接组件由第一支撑杆和第二支撑组件倾斜。
    • 6. 发明授权
    • Random early packet discard (RED)
    • 随机早期丢弃(RED)
    • US07636307B2
    • 2009-12-22
    • US10386651
    • 2003-03-13
    • Mark ThibodeauBin Du
    • Mark ThibodeauBin Du
    • H04L12/56
    • H04L47/10H04L47/30H04L47/326
    • At telecommunications switches and routers, RED (random early packet discard) uses the queue depth to determine whether to keep or discard each packet as it arrives at a queue. This is done by determining a discard probability (P), which is dependent on the average depth of the queue, and comparing the discard probability to a random number. One way of performing the invention uses the summed discard probabilities, instead of counting the number of packets (count) and multiplying that by the current discard probability, as in the prior art. The resulting sum is compared to the random number for discard operation. The disclosure further describes a more accurate way of calculating average depth of a queue, especially when the queue encounters periods of idleness.
    • 在电信交换机和路由器上,RED(随机早期分组丢弃)使用队列深度来确定每个数据包到达队列时是否保留或丢弃。 这是通过确定取决于队列的平均深度的丢弃概率(P)并将丢弃概率与随机数进行比较来完成的。 执行本发明的一种方式使用相加的丢弃概率,而不是如现有技术中那样计数分组数(计数)并将其乘以当前丢弃概率。 将所得到的和与丢弃操作的随机数进行比较。 本公开进一步描述了计算队列的平均深度的更准确的方法,特别是当队列遇到闲置时间时。
    • 7. 发明授权
    • Method for restoring computer operating system
    • 恢复计算机操作系统的方法
    • US07447888B2
    • 2008-11-04
    • US10555431
    • 2004-04-29
    • Bin DuWenbing YangYuqing BaoWanding Wang
    • Bin DuWenbing YangYuqing BaoWanding Wang
    • G06F9/00
    • G06F11/1417G06F11/1446
    • The present invention provides a method for restoring a computer operation system comprising at least steps of: a) backing up information related to start up of the computer in an HPA of a hard disk; b) providing a self-checking module in the HPA of the hard disk, and additionally configuring a command for invoking the self-checking module in BIOS of the computer; c) invoking the self-checking module by the BIOS when the computer is booted from the hard disk, and determining by the self-checking module, whether the information related to start up of the computer is destroyed or not, if so, restoring the destroyed parts and then starting up the computer, and if not, directly starting up the computer. With the present invention, each time the computer is booted from the hard disk, the system will automatically check OS boot program files, hard disk boot information, partition table information and data information in a boot sector of a boot partition, and restore those destroyed parts without users' intervention, and thus it facilitates users' utilizations. Meanwhile, the backed up data are stored with the HPA, and the security of the backed up data is ensured.
    • 本发明提供了一种用于恢复计算机操作系统的方法,该方法至少包括以下步骤:a)在硬盘的HPA中备份与启动计算机有关的信息; b)在硬盘的HPA中提供自检模块,另外配置用于在计算机的BIOS中调用自检模块的命令; c)当计算机从硬盘启动时由BIOS调用自检模块,并由自检模块确定与计算机的启动有关的信息是否被销毁,如果是,则恢复 销毁部件,然后启动电脑,如果没有,直接启动电脑。 利用本发明,每当计算机从硬盘启动时,系统将在引导分区的引导扇区中自动检查OS引导程序文件,硬盘引导信息,分区表信息和数据信息,并恢复被破坏的 部件没有用户的干预,因此它有助于用户的利用。 同时,备份的数据与HPA一起存储,并保证备份数据的安全性。
    • 8. 发明授权
    • Jitter controlled WFQ algorithm on network processors and latency constrained hardware
    • 抖动控制的WFQ算法在网络处理器和延迟受限的硬件上
    • US07414972B2
    • 2008-08-19
    • US11032074
    • 2005-01-11
    • Adrian GrahBin Du
    • Adrian GrahBin Du
    • G01R31/08
    • H04L47/50
    • Systems and methods of reducing service jitter in WFQ scheduling schemes used in packet traffic management are described. Service jitter is the variance in time between when a queue should have been selected for servicing and when it was actually serviced. The service jitter is generally not a problem in lower speed applications but in a high speed implementation such as a OC192 device latency can lead to downstream service contract violations. According to the invention jitter is controlled by applying a dampening factor to a difference amount that is used by the WFQ process to adjust its timing of queue selection. The difference amount is queue-specific and is a running difference between calculated and actual queue servicing times.
    • 描述了在分组流量管理中使用的WFQ调度方案中减少业务抖动的系统和方法。 服务抖动是当队列应被选择用于维修和实际服务时间之间的时间差异。 服务抖动在低速应用中通常不是问题,但是在诸如OC192设备延迟的高速实现中可能导致下游服务合同违规。 根据本发明,通过将阻尼因子应用于由WFQ处理使用的差值来调整其队列选择的时序来控制抖动。 差异量是队列特定的,并且是计算和实际队列服务时间之间的运行差异。
    • 10. 发明授权
    • Method and apparatus for securing digital information on an integrated circuit read only memory during test operating modes
    • 用于在测试操作模式期间将数字信息保护在集成电路只读存储器上的方法和装置
    • US08397079B2
    • 2013-03-12
    • US12133185
    • 2008-06-04
    • Serag M. GadelRabBin DuZeeshan S. SyedDenis Foley
    • Serag M. GadelRabBin DuZeeshan S. SyedDenis Foley
    • G06F11/30G06F12/14
    • G01R33/093B82Y25/00G01R31/318536G01R31/318541
    • The embodiments protect an IC against Design-For-Test (DFT) or other test mode attack. Secrets in ROM or PROM are secured. One embodiment for securing information on an IC includes receiving a ROM read command, writing data from a plurality of ROM address locations to an encryption logic in response to receiving the ROM read command, and writing an encryption logic output of the encryption logic to a test control logic, the encryption logic output representing the data from the plurality of ROM address locations. Writing the data from the plurality of ROM address locations to the encryption logic may also include writing the data from the plurality of ROM address locations to a multiple input shift register (MISR) in response to the ROM read command, and writing an MISR output to the test control logic, the MISR output representing the data from the plurality of ROM address locations.
    • 这些实施例保护IC免受测试(DFT)或其他测试模式攻击。 ROM或PROM中的秘密是安全的。 用于保护IC上的信息的一个实施例包括接收ROM读取命令,响应于接收到ROM读取命令将数据从多个ROM地址位置写入加密逻辑,并将加密逻辑的加密逻辑输出写入测试 控制逻辑,加密逻辑输出表示来自多个ROM地址位置的数据。 将数据从多个ROM地址位置写入加密逻辑还可以包括响应于ROM读命令将来自多个ROM地址位置的数据写入多输入移位寄存器(MISR),以及将MISR输出写入 测试控制逻辑,MISR输出表示来自多个ROM地址位置的数据。