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    • 1. 发明授权
    • Method and apparatus for securing digital information on an integrated circuit read only memory during test operating modes
    • 用于在测试操作模式期间将数字信息保护在集成电路只读存储器上的方法和装置
    • US08397079B2
    • 2013-03-12
    • US12133185
    • 2008-06-04
    • Serag M. GadelRabBin DuZeeshan S. SyedDenis Foley
    • Serag M. GadelRabBin DuZeeshan S. SyedDenis Foley
    • G06F11/30G06F12/14
    • G01R33/093B82Y25/00G01R31/318536G01R31/318541
    • The embodiments protect an IC against Design-For-Test (DFT) or other test mode attack. Secrets in ROM or PROM are secured. One embodiment for securing information on an IC includes receiving a ROM read command, writing data from a plurality of ROM address locations to an encryption logic in response to receiving the ROM read command, and writing an encryption logic output of the encryption logic to a test control logic, the encryption logic output representing the data from the plurality of ROM address locations. Writing the data from the plurality of ROM address locations to the encryption logic may also include writing the data from the plurality of ROM address locations to a multiple input shift register (MISR) in response to the ROM read command, and writing an MISR output to the test control logic, the MISR output representing the data from the plurality of ROM address locations.
    • 这些实施例保护IC免受测试(DFT)或其他测试模式攻击。 ROM或PROM中的秘密是安全的。 用于保护IC上的信息的一个实施例包括接收ROM读取命令,响应于接收到ROM读取命令将数据从多个ROM地址位置写入加密逻辑,并将加密逻辑的加密逻辑输出写入测试 控制逻辑,加密逻辑输出表示来自多个ROM地址位置的数据。 将数据从多个ROM地址位置写入加密逻辑还可以包括响应于ROM读命令将来自多个ROM地址位置的数据写入多输入移位寄存器(MISR),以及将MISR输出写入 测试控制逻辑,MISR输出表示来自多个ROM地址位置的数据。
    • 2. 发明授权
    • Method and apparatus for securing digital information on an integrated circuit during test operating modes
    • 用于在测试操作模式下在集成电路上保护数字信息的方法和装置
    • US08051345B2
    • 2011-11-01
    • US12133173
    • 2008-06-04
    • Serag M. GadelRabBin DuZeeshan S. SyedDenis Foley
    • Serag M. GadelRabBin DuZeeshan S. SyedDenis Foley
    • G01R31/28
    • G01R31/318555G11C7/24G11C29/12G11C29/14G11C2029/3202
    • The embodiments protect an IC against Design-For-Test (DFT) or other test mode attack. Transitory secrets are secured whether stored in registers or latches, RAM, and/or permanent secrets stored in ROM and/or PROM. One embodiment for securing information on an IC includes entering a test mode and resetting each register in response to entering the test mode of operation and prior to receiving a test mode command. An integrated circuit embodiment includes a test control logic operative to configure the integrated circuit into a test mode and to control the integrated circuit while in the test mode, a set of registers, and a functional reset controller coupled to the test control logic and to the set of registers, operative to receive a reset command from the test control logic and provide the reset command to the set of registers in response to a command to enter the test mode.
    • 这些实施例保护IC免受测试(DFT)或其他测试模式攻击。 确保存储在存储在ROM和/或PROM中的寄存器或锁存器,RAM和/或永久机密中的临时秘密。 用于保护IC上的信息的一个实施例包括响应于进入测试操作模式并在接收到测试模式命令之前进入测试模式并重置每个寄存器。 集成电路实施例包括测试控制逻辑,其可操作以将集成电路配置为测试模式并且在测试模式期间控制集成电路,一组寄存器以及耦合到测试控制逻辑的功能复位控制器 一组寄存器,用于从测试控制逻辑接收复位命令,并响应于进入测试模式的命令向该组寄存器提供复位命令。