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1. 发明申请

US20140197918A1 TRANSFORMER USING SYMMETRICAL PRINTING PATTERN 有权
标题翻译：变压器使用对称印刷图案
公开(公告)号：US20140197918A1
公开(公告)日：2014-07-17
申请号：US14342788
申请日：2011-11-07
申请人： Byung Joo Kang , Sung Hun Ahn , Ho Yong Hwang , Chang Kun Park
发明人： Byung Joo Kang , Sung Hun Ahn , Ho Yong Hwang , Chang Kun Park
IPC分类号： H01F27/28
CPC分类号： H01F27/2804 , H01F27/40 , H01F2027/2814 , H05K1/165 , H05K3/222 , H05K2203/049
摘要： Disclosed is a transformer using a symmetrical printing pattern which includes: a substrate; a plurality of first printing lines printed at predetermined distances on the substrate; a plurality of second printing lines printed at predetermined distances on the substrate; first bonding wires connecting the first printing lines; and second bonding wires connecting the second printing lines, in which the first printing lines and the second printing lines are printed in a symmetrical printing pattern, respectively, on the substrate, and the first bonding wires and the second bonding wires are formed symmetrically, respectively.
摘要翻译：公开了使用对称印刷图案的变压器，其包括：基板; 在基板上以预定距离印刷的多个第一印刷线; 在基板上以预定距离印刷的多个第二印刷线; 连接第一印刷线路的第一接合线; 以及第二接合线，其将第一印刷线和第二印刷线分别以对称的印刷图案印刷在第二印刷线上，并且分别对称地形成第一接合线和第二接合线。

2. 发明授权

US08975999B2 Transformer using symmetrical printing pattern 有权
标题翻译：变压器采用对称印刷图案
公开(公告)号：US08975999B2
公开(公告)日：2015-03-10
申请号：US14342788
申请日：2011-11-07
申请人： Byung Joo Kang , Sung Hun Ahn , Ho Yong Hwang , Chang Kun Park
发明人： Byung Joo Kang , Sung Hun Ahn , Ho Yong Hwang , Chang Kun Park
IPC分类号： H01F5/00 , H01F27/28 , H05K1/16 , H05K3/22
CPC分类号： H01F27/2804 , H01F27/40 , H01F2027/2814 , H05K1/165 , H05K3/222 , H05K2203/049
摘要： Disclosed is a transformer using a symmetrical printing pattern which includes: a substrate; a plurality of first printing lines printed at predetermined distances on the substrate; a plurality of second printing lines printed at predetermined distances on the substrate; first bonding wires connecting the first printing lines; and second bonding wires connecting the second printing lines, in which the first printing lines and the second printing lines are printed in a symmetrical printing pattern, respectively, on the substrate, and the first bonding wires and the second bonding wires are formed symmetrically, respectively.
摘要翻译：公开了使用对称印刷图案的变压器，其包括：基板; 在基板上以预定距离印刷的多个第一印刷线; 在基板上以预定距离印刷的多个第二印刷线; 连接第一印刷线路的第一接合线; 以及第二接合线，其将第一印刷线和第二印刷线分别以对称的印刷图案印刷在第二印刷线上，并且分别对称地形成第一接合线和第二接合线。

3. 发明申请

US20140243646A1 INTRAOCULAR PRESSURE SENSOR AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：内窥镜压力传感器及其制造方法
公开(公告)号：US20140243646A1
公开(公告)日：2014-08-28
申请号：US14350123
申请日：2011-11-24
申请人： Byung Joo Kang , Ji Sung Jo , Chang Kun Park
发明人： Byung Joo Kang , Ji Sung Jo , Chang Kun Park
IPC分类号： A61B3/16
CPC分类号： A61B3/16
摘要： Disclosed is a method of manufacturing an intraocular pressure sensor that is put into an eyeball of a patient and measures the intraocular pressure, the method comprising: preparing a first substrate; depositing a base film on the bottom of the first substrate; exposing the top of the base film by etching the first substrate; applying epoxy onto the center of the exposed base film; disposing the first electrode at the epoxy-applied portion on the base film; preparing a second substrate; depositing a support film onto the second substrate; forming a second electrode on the support film; exposing the bottom of the support film by etching the second substrate; and disposing the second substrate onto the first substrate.
摘要翻译：公开了一种制造放置在患者眼球中并测量眼内压的眼内压传感器的方法，所述方法包括：制备第一基底; 在第一基板的底部上沉积基膜; 通过蚀刻第一衬底来暴露基底膜的顶部; 将环氧树脂施加到暴露的基膜的中心; 将第一电极设置在基膜上的环氧树脂施加部分; 制备第二衬底; 将支撑膜沉积到第二基底上; 在所述支撑膜上形成第二电极; 通过蚀刻第二衬底来暴露支撑膜的底部; 以及将所述第二衬底设置在所述第一衬底上。

4. 发明授权

US09717411B2 Intraocular pressure sensor and method for manufacturing same 有权
公开(公告)号：US09717411B2
公开(公告)日：2017-08-01
申请号：US14350123
申请日：2011-11-24
申请人： Byung Joo Kang , Ji Sung Jo , Chang Kun Park
发明人： Byung Joo Kang , Ji Sung Jo , Chang Kun Park
IPC分类号： A61B3/16 , H01B13/00
CPC分类号： A61B3/16
摘要： Disclosed is a method of manufacturing an intraocular pressure sensor that is put into an eyeball of a patient and measures the intraocular pressure, the method comprising: preparing a first substrate; depositing a base film on the bottom of the first substrate; exposing the top of the base film by etching the first substrate; applying epoxy onto the center of the exposed base film; disposing the first electrode at the epoxy-applied portion on the base film; preparing a second substrate; depositing a support film onto the second substrate; forming a second electrode on the support film; exposing the bottom of the support film by etching the second substrate; and disposing the second substrate onto the first substrate.

5. 发明申请

US20140232462A1 POWER AMPLIFIER USING DIFFERENTIAL STRUCTURE 有权
标题翻译：功率放大器使用差分结构
公开(公告)号：US20140232462A1
公开(公告)日：2014-08-21
申请号：US14008573
申请日：2011-10-13
申请人： Jong Hoon Park , Chang Kun Park
发明人： Jong Hoon Park , Chang Kun Park
IPC分类号： H03F3/45 , H03F3/21
CPC分类号： H03F3/45179 , H03F3/21 , H03F3/45183 , H03F2203/45034 , H03F2203/45318 , H03F2203/45352 , H03F2203/45481 , H03F2203/45638
摘要： Provided is a power amplifier which includes: a first transistor and a second transistor each having a first end connected to a first power source supplying a first voltage and to which signals having a same size but opposite polarities are input; a third transistor and a fourth transistor having first ends respectively connected to the first ends of the first transistor and the second transistor; and a fifth transistor having a first end connected to second ends of the third and fourth transistors and controlling oscillation of the third or fourth transistor.
摘要翻译：提供了一种功率放大器，其包括：第一晶体管和第二晶体管，每个具有连接到提供第一电压的第一电源的第一端，并且输入具有相同尺寸但相反极性的信号; 第三晶体管和第四晶体管，其第一端分别连接到第一晶体管和第二晶体管的第一端; 以及第五晶体管，其第一端连接到第三和第四晶体管的第二端并控制第三或第四晶体管的振荡。

6. 发明授权

US09019013B2 Power amplifier using differential structure 有权
标题翻译：功率放大器采用差分结构
公开(公告)号：US09019013B2
公开(公告)日：2015-04-28
申请号：US14008573
申请日：2011-10-13
申请人： Jong Hoon Park , Chang Kun Park
发明人： Jong Hoon Park , Chang Kun Park
IPC分类号： H03F3/45 , H03F3/21
CPC分类号： H03F3/45179 , H03F3/21 , H03F3/45183 , H03F2203/45034 , H03F2203/45318 , H03F2203/45352 , H03F2203/45481 , H03F2203/45638
摘要： Provided is a power amplifier which includes: a first transistor and a second transistor each having a first end connected to a first power source supplying a first voltage and to which signals having a same size but opposite polarities are input; a third transistor and a fourth transistor having first ends respectively connected to the first ends of the first transistor and the second transistor; and a fifth transistor having a first end connected to second ends of the third and fourth transistors and controlling oscillation of the third or fourth transistor.
摘要翻译：提供了一种功率放大器，其包括：第一晶体管和第二晶体管，每个具有连接到提供第一电压的第一电源的第一端，并且输入具有相同尺寸但相反极性的信号; 第三晶体管和第四晶体管，其第一端分别连接到第一晶体管和第二晶体管的第一端; 以及第五晶体管，其第一端连接到第三和第四晶体管的第二端并控制第三或第四晶体管的振荡。

7. 发明授权

US08760257B2 Transmission line transformer which minimizes signal loss 有权
标题翻译：传输线变压器，使信号损失最小化
公开(公告)号：US08760257B2
公开(公告)日：2014-06-24
申请号：US13880163
申请日：2011-09-07
申请人： Jong Hoon Park , Chang Kun Park
发明人： Jong Hoon Park , Chang Kun Park
IPC分类号： H01F5/00
CPC分类号： H01F27/2852 , H01F19/04 , H01P5/04
摘要： Provided is a transmission line transformer, and more particularly, a transmission line transformer capable of decreasing a power loss caused by a parasitic resistance component of the transmission line transformer and improving a coupling factor by forming a primary transmission line and a secondary transmission line parallel to each other on an integrated circuit (IC) by using a highest layer metal line, and forming a lower layer metal line immediately below the highest layer metal line in addition to the highest layer metal line in a region where the primary transmission line and the secondary transmission line face each other, while forming the transmission line transformer used in a high frequency circuit via a semiconductor process.
摘要翻译：提供了一种传输线变压器，更具体地，涉及一种传输线变压器，其能够降低由传输线变压器的寄生电阻分量引起的功率损耗，并且通过形成与第一传输线平行的第一传输线和二次传输线来提高耦合系数通过使用最高层金属线在集成电路（IC）上彼此相互连接，并且在最高层金属线的正下方形成下层金属线，除了在主传输线和次级侧的区域中的最高层金属线之外传输线彼此面对，同时通过半导体工艺形成用于高频电路的传输线变压器。

8. 发明申请

US20100309732A1 DATA ALIGNMENT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS 有权
标题翻译：半导体存储器的数据对准电路
公开(公告)号：US20100309732A1
公开(公告)日：2010-12-09
申请号：US12647174
申请日：2009-12-24
申请人： Hyung Soo Kim , Yong Ju Kim , Sung Woo Han , Hee Woong Song , Ic Su Oh , Tae Jin Hwang , Hae Rang Choi , Ji Wang Lee , Jae Min Jang , Chang Kun Park
发明人： Hyung Soo Kim , Yong Ju Kim , Sung Woo Han , Hee Woong Song , Ic Su Oh , Tae Jin Hwang , Hae Rang Choi , Ji Wang Lee , Jae Min Jang , Chang Kun Park
IPC分类号： G11C7/10 , G11C7/00 , G11C8/00
CPC分类号： G11C7/1006 , G11C7/1012 , G11C7/1078 , G11C7/1087
摘要： A data alignment circuit of a semiconductor memory apparatus for receiving and aligning parallel data group includes a first control unit, a second control unit, a first alignment unit and a second alignment unit. The first alignment unit generates a first control signal group in response to an address group, a clock signal, and a latency signal. The second control unit generates a second control signal group in response to the address group, the clock signal, and the latency signal. The first alignment unit aligns the parallel data group as a first serial data group in response to the first control signal group. The second alignment unit aligns the parallel data group as a second serial data group in response to the second control signal group.
摘要翻译：用于接收和对准并行数据组的半导体存储装置的数据对准电路包括第一控制单元，第二控制单元，第一对准单元和第二对准单元。第一对准单元响应于地址组，时钟信号和等待时间信号产生第一控制信号组。第二控制单元响应于地址组，时钟信号和等待时间信号产生第二控制信号组。第一对准单元响应于第一控制信号组将并行数据组对准为第一串行数据组。第二对准单元响应于第二控制信号组将并行数据组对准为第二串行数据组。

9. 发明授权

US07800416B2 Data output buffer circuit 有权
标题翻译：数据输出缓冲电路
公开(公告)号：US07800416B2
公开(公告)日：2010-09-21
申请号：US12340882
申请日：2008-12-22
申请人： Yong Ju Kim , Sung Woo Han , Hee Woong Song , Ic Su Oh , Hyung Soo Kim , Tae Jin Hwang , Hae Rang Choi , Ji Wang Lee , Jae Min Jang , Chang Kun Park
发明人： Yong Ju Kim , Sung Woo Han , Hee Woong Song , Ic Su Oh , Hyung Soo Kim , Tae Jin Hwang , Hae Rang Choi , Ji Wang Lee , Jae Min Jang , Chang Kun Park
IPC分类号： H03K3/00
CPC分类号： G11C7/1051 , G11C7/02 , G11C7/04 , G11C7/1057 , G11C7/1066 , G11C7/1072 , G11C11/4093
摘要： A data output circuit includes a pre-driving block configured to receive input data, generate a plurality of pull-up signals and pull-down signals, and change enable times of the pull-up signals and the pull-down signals in response to a plurality of control signals, and a main driving block configured to generate output data in response to the pull-up signals and the pull-down signals.
摘要翻译：数据输出电路包括：预驱动块，被配置为接收输入数据，产生多个上拉信号和下拉信号，以及响应于一个上拉信号和下拉信号改变使能时间多个控制信号和主驱动块，被配置为响应于上拉信号和下拉信号而产生输出数据。

10. 发明申请

US20100064163A1 DOMAIN CROSSING CIRCUIT OF A SEMICONDUCTOR MEMORY APPARATUS 失效
标题翻译：半导体存储器装置的域交叉电路
公开(公告)号：US20100064163A1
公开(公告)日：2010-03-11
申请号：US12346675
申请日：2008-12-30
申请人： Hae Rang Choi , Yong Ju Kim , Sung Woo Han , Hee Woong Song , Ic Su Oh , Hyung Soo Kim , Tae Jin Hwang , Ji Wang Lee , Jae Min Jang , Chang Kun Park
发明人： Hae Rang Choi , Yong Ju Kim , Sung Woo Han , Hee Woong Song , Ic Su Oh , Hyung Soo Kim , Tae Jin Hwang , Ji Wang Lee , Jae Min Jang , Chang Kun Park
IPC分类号： G06F1/12
CPC分类号： G11C7/1051 , G06F1/12 , G11C7/1072 , G11C7/222
摘要： A domain crossing circuit of a semiconductor memory apparatus, the domain crossing circuit comprising first and second count signals generated at substantially a same clock period, and representing predetermined clock differences with reference to an internal clock signal with respect to same bit combination data, and a data processing unit configured to provide output data corresponding to input data based on the second count signal in response to the input data synchronized to an external clock signal.
摘要翻译：半导体存储器装置的域交叉电路，域交叉电路包括在基本上相同的时钟周期产生的第一和第二计数信号，并且相对于相同位组合数据参考内部时钟信号表示预定的时钟差，以及数据处理单元，被配置为响应于与外部时钟信号同步的输入数据，基于第二计数信号提供对应于输入数据的输出数据。

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