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1. 发明授权

US10181528B2 Thin-film transistor and manufacturing method thereof 有权
公开(公告)号：US10181528B2
公开(公告)日：2019-01-15
申请号：US15396822
申请日：2017-01-03
申请人： Chunghwa Picture Tubes, LTD.
发明人： Chin-Tzu Kao , Chung-Hsu Wang
IPC分类号： H01L29/10 , H01L29/786 , H01L29/66 , H01L29/423 , H01L21/4763 , H01L21/02
摘要： The invention relates to a thin-film transistor and a manufacturing method thereof. The manufacturing method of the thin-film transistor includes the following steps: an insulating layer is formed to cover a gate on a substrate; a semiconductor pattern having a first region and a second region is formed on the insulating layer; a plurality of island patterns is formed, wherein at least a portion of the plurality of island patterns is disposed on the semiconductor pattern, and the plurality of island patterns is separated from one another by a gap; and a source and a drain are formed to cover a portion of the plurality of island patterns and fill the gaps to respectively be electrically connected to the first region and the second region of the semiconductor pattern.

2. 发明申请

US20160172389A1 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20160172389A1
公开(公告)日：2016-06-16
申请号：US14603369
申请日：2015-01-23
申请人： Chunghwa Picture Tubes, Ltd.
发明人： Chin-Tzu Kao , Wen-Cheng Lu , Ya-Ju Lu
IPC分类号： H01L27/12
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/127 , H01L29/66757 , H01L29/66765 , H01L29/66969 , H01L29/78618 , H01L29/7869
摘要： A manufacturing method of a thin film transistor includes the following steps. A substrate is provided first. A semiconductor layer is then formed on the substrate. Next, a photoresist pattern including a middle portion and two peripheral portions is formed on the semiconductor layer. The middle portion is disposed between two peripheral portions, and the thickness of the middle portion is greater than each of the peripheral portions. Next, an etching process is performed on the semiconductor layer for forming a patterned semiconductor layer. A photoresist ashing process is then performed to remove at least the peripheral portions of the photoresist pattern to form a channel defining photoresist pattern and expose two portions of the patterned semiconductor layer. Next, the patterned semiconductor layer is treated to form a semiconductor portion and two conductor portions. The channel defining photoresist pattern is then removed.
摘要翻译：薄膜晶体管的制造方法包括以下步骤。首先提供基板。然后在衬底上形成半导体层。接下来，在半导体层上形成包括中间部分和两个周边部分的光致抗蚀剂图案。中间部分设置在两个周边部分之间，中间部分的厚度大于每个周边部分。接下来，对用于形成图案化半导体层的半导体层进行蚀刻处理。然后执行光致抗蚀剂灰化处理以去除光致抗蚀剂图案的至少周边部分以形成限定光致抗蚀剂图案的通道并暴露图案化半导体层的两个部分。接下来，对图案化的半导体层进行处理以形成半导体部分和两个导体部分。然后去除限定光致抗蚀剂图案的通道。

3. 发明申请

US20190109239A1 MANUFACTURING METHOD OF THIN-FILM TRANSISTOR 审中-公开
公开(公告)号：US20190109239A1
公开(公告)日：2019-04-11
申请号：US16214122
申请日：2018-12-09
申请人： Chunghwa Picture Tubes, LTD.
发明人： Chin-Tzu Kao , Chung-Hsu Wang
IPC分类号： H01L29/786 , C23C16/505 , C23C16/40 , C23C16/04 , H01L21/02 , H01L29/66 , H01L21/4763 , H01L29/423
摘要： The invention relates to a thin-film transistor and a manufacturing method thereof. The manufacturing method of the thin-film transistor includes the following steps: an insulating layer is formed to cover a gate on a substrate; a semiconductor pattern having a first region and a second region is formed on the insulating layer; a plurality of island patterns is formed, wherein at least a portion of the plurality of island patterns is disposed on the semiconductor pattern, and the plurality of island patterns is separated from one another by a gap; and a source and a drain are formed to cover a portion of the plurality of island patterns and fill the gaps to respectively be electrically connected to the first region and the second region of the semiconductor pattern.

4. 发明申请

US20190057987A1 FORMING METHOD OF VIA HOLE AND MANUFACTURING METHOD OF PIXEL STRUCTURE 审中-公开
公开(公告)号：US20190057987A1
公开(公告)日：2019-02-21
申请号：US15788813
申请日：2017-10-20
申请人： Chunghwa Picture Tubes, LTD.
发明人： Chin-Tzu Kao , Chien-Pang Tai , Pei-Nong Lu
IPC分类号： H01L27/12 , H01L21/311
摘要： The invention provides a forming method of a via hole, including: sequentially stacking a patterned first conductive layer, a first insulating layer, a patterned second conductive layer, and a second insulating layer on a substrate. The second conductive layer and the first conductive layer overlap in a normal direction of the substrate, such that the second insulating layer has a protrusion portion protruding away from the substrate. A photosensitive material layer covers the second insulating layer. The photosensitive material layer is exposed, wherein a depth of exposure is equal to a vertical distance from a top surface of the protrusion portion to a surface of the photosensitive material layer. The exposed photosensitive material layer is removed by development to form a first via hole exposing the second insulating layer. The exposed second insulating layer is etched to form a second via hole to expose the second conductive layer, and then the photosensitive material layer is removed. A manufacturing method of a pixel structure, using the forming method of the via hole, is also provided.

5. 发明授权

US09269827B2 Oxidizing the source and doping the drain of a thin-film transistor 有权
标题翻译：氧化源极并掺杂薄膜晶体管的漏极
公开(公告)号：US09269827B2
公开(公告)日：2016-02-23
申请号：US14472401
申请日：2014-08-29
申请人： CHUNGHWA PICTURE TUBES, LTD.
发明人： Chin-Tzu Kao , Ya-Ju Lu , Hsiang-Hsien Chung , Wen-Cheng Lu
IPC分类号： H01L21/8234 , H01L29/786 , H01L29/66 , H01L29/49 , H01L21/467 , H01L29/45
CPC分类号： H01L29/7869 , H01L21/0276 , H01L21/426 , H01L21/467 , H01L29/24 , H01L29/42356 , H01L29/45 , H01L29/4908 , H01L29/66969 , H01L29/78606 , H01L29/78618 , H01L29/78624 , H01L29/78696
摘要： A method for manufacturing a thin-film transistor (TFT) is provided, including the following steps. A gate is formed on a substrate. A gate insulating layer is formed on the gate. A patterned semiconductor layer is formed on the gate insulating layer. A source is formed on the patterned semiconductor layer. The peripheral portion of the source is oxidized to form an oxide layer, wherein the oxide layer covers the source and a portion of the patterned semiconductor layer. A protective layer and hydrogen ions are formed, wherein the protective layer covers the oxide layer and the patterned semiconductor layer. The patterned semiconductor layer not covered by the oxide layer is doped with the hydrogen ions to form a drain. A TFT is also provided.
摘要翻译：提供了制造薄膜晶体管（TFT）的方法，包括以下步骤。栅极形成在基板上。在栅极上形成栅极绝缘层。在栅极绝缘层上形成图案化的半导体层。源极形成在图案化的半导体层上。源的周边部分被氧化以形成氧化物层，其中氧化物层覆盖源极和图案化半导体层的一部分。形成保护层和氢离子，其中保护层覆盖氧化物层和图案化的半导体层。未被氧化物层覆盖的图案化半导体层掺杂有氢离子以形成漏极。还提供TFT。

6. 发明申请

US20160035893A1 PIXEL STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：像素结构及其制造方法
公开(公告)号：US20160035893A1
公开(公告)日：2016-02-04
申请号：US14519148
申请日：2014-10-21
申请人： Chunghwa Picture Tubes, LTD.
发明人： Chin-Tzu Kao , Ya-Ju Lu , Kuo-Wei Wu , Cheng-Fang Su
IPC分类号： H01L29/786 , H01L21/02 , H01L27/12 , H01L21/383 , H01L29/66 , H01L29/423
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/124 , H01L27/127 , H01L27/1288 , H01L29/66969 , H01L29/78618
摘要： A manufacturing method of a pixel structure is provided, which includes following steps. A gate and a gate insulating layer are formed on a substrate. A source and a drain are formed on the gate insulating layer. A first and a second semiconductor pattern are formed on the gate insulating layer. The first semiconductor pattern is located above the gate, wherein the first semiconductor pattern contacts the source and the drain. The second semiconductor pattern contacts the drain. A mask which exposes both sides of the first semiconductor pattern is formed on the first semiconductor pattern. A treatment procedure is performed, so that a first and a second conductive region are formed at both sides of the exposed first semiconductor pattern, and the second semiconductor pattern is formed into a pixel electrode pattern. The first semiconductor pattern which is covered by the mask is formed into a channel region.
摘要翻译：提供了像素结构的制造方法，其包括以下步骤。在基板上形成栅极和栅极绝缘层。源极和漏极形成在栅极绝缘层上。在栅极绝缘层上形成第一和第二半导体图案。第一半导体图案位于栅极上方，其中第一半导体图案接触源极和漏极。第二半导体图案接触漏极。在第一半导体图案上形成露出第一半导体图案的两面的掩模。执行处理步骤，使得在暴露的第一半导体图案的两侧形成第一和第二导电区域，并且将第二半导体图案形成为像素电极图案。由掩模覆盖的第一半导体图案形成沟道区域。

7. 发明授权

US10256261B2 Forming method of via hole and manufacturing method of pixel structure 有权
公开(公告)号：US10256261B2
公开(公告)日：2019-04-09
申请号：US15788813
申请日：2017-10-20
申请人： Chunghwa Picture Tubes, LTD.
发明人： Chin-Tzu Kao , Chien-Pang Tai , Pei-Nong Lu
IPC分类号： H01L27/12 , H01L21/311
摘要： The invention provides a forming method of a via hole, including: sequentially stacking a patterned first conductive layer, a first insulating layer, a patterned second conductive layer, and a second insulating layer on a substrate. The second conductive layer and the first conductive layer overlap in a normal direction of the substrate, such that the second insulating layer has a protrusion portion protruding away from the substrate. A photosensitive material layer covers the second insulating layer. The photosensitive material layer is exposed, wherein a depth of exposure is equal to a vertical distance from a top surface of the protrusion portion to a surface of the photosensitive material layer. The exposed photosensitive material layer is removed by development to form a first via hole exposing the second insulating layer. The exposed second insulating layer is etched to form a second via hole to expose the second conductive layer, and then the photosensitive material layer is removed. A manufacturing method of a pixel structure, using the forming method of the via hole, is also provided.

8. 发明授权

US09923099B2 TFT with oxide layer on IGZO semiconductor active layer 有权
公开(公告)号：US09923099B2
公开(公告)日：2018-03-20
申请号：US14994157
申请日：2016-01-13
申请人： CHUNGHWA PICTURE TUBES, LTD.
发明人： Chin-Tzu Kao , Ya-Ju Lu , Hsiang-Hsien Chung , Wen-Cheng Lu
IPC分类号： H01L21/426 , H01L21/467 , H01L29/24 , H01L29/423 , H01L29/45 , H01L29/49 , H01L29/66 , H01L29/786
CPC分类号： H01L29/7869 , H01L21/0276 , H01L21/426 , H01L21/467 , H01L29/24 , H01L29/42356 , H01L29/45 , H01L29/4908 , H01L29/66969 , H01L29/78606 , H01L29/78618 , H01L29/78624 , H01L29/78696
摘要： A method for manufacturing a thin-film transistor (TFT) is provided, including the following steps. A gate is formed on a substrate. A gate insulating layer is formed on the gate. A patterned semiconductor layer is formed on the gate insulating layer. A source is formed on the patterned semiconductor layer. The peripheral portion of the source is oxidized to form an oxide layer, wherein the oxide layer covers the source and a portion of the patterned semiconductor layer. A protective layer and hydrogen ions are formed, wherein the protective layer covers the oxide layer and the patterned semiconductor layer. The patterned semiconductor layer not covered by the oxide layer is doped with the hydrogen ions to form a drain. A TFT is also provided.

9. 发明授权

US09437627B2 Thin film transistor and manufacturing method thereof 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US09437627B2
公开(公告)日：2016-09-06
申请号：US14603369
申请日：2015-01-23
申请人： Chunghwa Picture Tubes, Ltd.
发明人： Chin-Tzu Kao , Wen-Cheng Lu , Ya-Ju Lu
IPC分类号： H01L21/8236 , H01L27/12
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/127 , H01L29/66757 , H01L29/66765 , H01L29/66969 , H01L29/78618 , H01L29/7869
摘要： A manufacturing method of a thin film transistor includes the following steps. A substrate is provided first. A semiconductor layer is then formed on the substrate. Next, a photoresist pattern including a middle portion and two peripheral portions is formed on the semiconductor layer. The middle portion is disposed between two peripheral portions, and the thickness of the middle portion is greater than each of the peripheral portions. Next, an etching process is performed on the semiconductor layer for forming a patterned semiconductor layer. A photoresist ashing process is then performed to remove at least the peripheral portions of the photoresist pattern to form a channel defining photoresist pattern and expose two portions of the patterned semiconductor layer. Next, the patterned semiconductor layer is treated to form a semiconductor portion and two conductor portions. The channel defining photoresist pattern is then removed.
摘要翻译：薄膜晶体管的制造方法包括以下步骤。首先提供基板。然后在衬底上形成半导体层。接下来，在半导体层上形成包括中间部分和两个周边部分的光致抗蚀剂图案。中间部分设置在两个周边部分之间，中间部分的厚度大于每个周边部分。接下来，对用于形成图案化半导体层的半导体层进行蚀刻处理。然后执行光致抗蚀剂灰化处理以去除光致抗蚀剂图案的至少周边部分以形成限定光致抗蚀剂图案的通道并暴露图案化半导体层的两个部分。接下来，对图案化的半导体层进行处理以形成半导体部分和两个导体部分。然后去除限定光致抗蚀剂图案的通道。

10. 发明授权

US09269637B2 Thin film transistor substrate 有权
标题翻译：薄膜晶体管基板
公开(公告)号：US09269637B2
公开(公告)日：2016-02-23
申请号：US14144300
申请日：2013-12-30
申请人： CHUNGHWA PICTURE TUBES, LTD
发明人： Chin-Tzu Kao , Wen-Cheng Lu
IPC分类号： H01L29/12 , H01L21/8254 , H01L21/70 , H01L29/786 , H01L29/66
CPC分类号： H01L21/8254 , H01L21/707 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要： A TFT substrate includes: a substrate; and a plurality of TFTs, wherein each of the TFTs comprises: a gate electrode, disposed on the substrate; a gate insulating layer, disposed on the substrate and covering the gate electrode; a metallic oxide active layer, disposed on the gate insulating layer; a metallic oxide protection layer, disposed on the metallic oxide active layer; an etching stop layer, disposed on the metallic oxide protection layer, wherein a first through hole and a second through hole penetrate through the etching stop layer and the metallic oxide protection layer; and a source electrode and a drain electrode, disposed in the first through hole and the second through hole respectively, and electrically connected to the metallic oxide active layer.
摘要翻译： TFT基板包括：基板; 和多个TFT，其中每个TFT包括：设置在基板上的栅电极; 栅极绝缘层，设置在所述基板上并覆盖所述栅电极; 金属氧化物有源层，设置在栅极绝缘层上; 金属氧化物保护层，设置在金属氧化物活性层上; 设置在所述金属氧化物保护层上的蚀刻停止层，其中第一通孔和第二通孔穿过所述蚀刻停止层和所述金属氧化物保护层; 以及源电极和漏电极，分别设置在第一通孔和第二通孔中，并与金属氧化物活性层电连接。

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