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1. 发明申请

US20150332981A1 METHOD FOR WAFER ETCHING IN DEEP SILICON TRENCH ETCHING PROCESS 有权
标题翻译：深层硅凝胶蚀刻过程中的蚀刻方法
公开(公告)号：US20150332981A1
公开(公告)日：2015-11-19
申请号：US14435955
申请日：2013-12-31
申请人： CSMC TECHNOLOGIES FAB1 CO., LTD.
发明人： Anna ZHANG , Xiaoming LI
IPC分类号： H01L21/66 , H01L21/683 , H01L21/3065
CPC分类号： H01L22/26 , H01L21/3065 , H01L21/6831
摘要： A method for wafer etching in a deep silicon trench etching process includes the following steps: a. electrostatically absorbing a wafer using an electrostatic chuck, and stabilizing the atmosphere required by the process (S110); b. performing the sub-steps of a main process for the wafer, and the time for the sub-steps of the main process being shorter than the time required by the wafer main process; c. releasing the electrostatic adsorption of the electrostatic chuck on the wafer; d. determining whether the cumulative time of the sub-steps of the main process reaches a predetermined threshold or not, if so, performing the step e (S150), and if not, repeating the operations in the steps a to c (S140); and e. ending a wafer manufacturing process. The etching method avoids the wafer from continuous contact with the electrostatic chuck, reduces electrostatic accumulation on the surface of the wafer, and therefore solves the problem of resist reticulation on the surface of the wafer in the DSIE process.
摘要翻译：在深硅沟槽蚀刻工艺中的晶片蚀刻方法包括以下步骤：a。使用静电卡盘静电吸收晶片，并稳定工艺所需的气氛（S110）; b。执行晶片主工艺的子步骤，并且主工艺的子步骤的时间比晶片主工艺所需的时间短; C。释放静电吸盘在晶片上的静电吸附; d。确定主处理的子步骤的累积时间是否达到预定阈值（如果是），执行步骤e（S150），如果不是则重复步骤a至c中的操作（S140）; 和e。结束晶圆制造工艺。蚀刻方法避免了晶片与静电卡盘的连续接触，减少了晶片表面上的静电积累，因此解决了DSIE工艺中晶片表面的抗网纹问题。

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