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1. 发明授权

US08643031B2 Liquid crystal panel and pixel structure thereof 有权
公开(公告)号：US08643031B2
公开(公告)日：2014-02-04
申请号：US13329623
申请日：2011-12-19
申请人： Chia Hua Yu , I Fang Wang , Feng Weei Kuo , Jui Chi Lai , Ko Ruey Jen , Guang Shiung Chao
发明人： Chia Hua Yu , I Fang Wang , Feng Weei Kuo , Jui Chi Lai , Ko Ruey Jen , Guang Shiung Chao
IPC分类号： H01L33/00
摘要： There is provided a pixel structure of a liquid crystal panel including a transparent substrate, and a gate line, a data line, a switching transistor, a first electrode, a second electrode and a shield layer formed on the transparent substrate. The gate line is substantially perpendicular to the data line. The switching transistor is located adjacent to a crossing point of the gate line and the data line, and is configured to input a display voltage of the data line to the second electrode according to the control of the gate line. The first electrode and the second electrode are arranged in such a way that the display voltage forms a transverse electric field between the first electrode and the second electrode. The shield layer overlaps at least a part of the gate and is electrically isolated from the first electrode and the second electrode.

2. 发明授权

US09029876B2 Display panel with shield layer partially over gate line 有权
标题翻译：屏蔽层部分覆盖栅极线的显示面板
公开(公告)号：US09029876B2
公开(公告)日：2015-05-12
申请号：US13329623
申请日：2011-12-19
申请人： Chia Hua Yu , I Fang Wang , Feng Weei Kuo , Jui Chi Lai , Ko Ruey Jen , Guang Shiung Chao
发明人： Chia Hua Yu , I Fang Wang , Feng Weei Kuo , Jui Chi Lai , Ko Ruey Jen , Guang Shiung Chao
IPC分类号： H01L33/00 , G02F1/1343 , H01L27/12 , G02F1/1362
CPC分类号： G02F1/134363 , G02F2001/136218 , H01L27/124
摘要： There is provided a pixel structure of a liquid crystal panel including a transparent substrate, and a gate line, a data line, a switching transistor, a first electrode, a second electrode and a shield layer formed on the transparent substrate. The gate line is substantially perpendicular to the data line. The switching transistor is located adjacent to a crossing point of the gate line and the data line, and is configured to input a display voltage of the data line to the second electrode according to the control of the gate line. The first electrode and the second electrode are arranged in such a way that the display voltage forms a transverse electric field between the first electrode and the second electrode. The shield layer overlaps at least a part of the gate and is electrically isolated from the first electrode and the second electrode.
摘要翻译：提供了一种包括透明基板的液晶面板的像素结构，以及形成在透明基板上的栅极线，数据线，开关晶体管，第一电极，第二电极和屏蔽层。栅极线基本上垂直于数据线。开关晶体管位于栅极线和数据线的交叉点附近，并且被配置为根据栅极线的控制将数据线的显示电压输入到第二电极。第一电极和第二电极被布置成使得显示电压在第一电极和第二电极之间形成横向电场。屏蔽层与栅极的至少一部分重叠，并与第一电极和第二电极电隔离。

3. 发明授权

US07999899B1 Fringe field switching liquid crystal display apparatus 有权
标题翻译：边缘现场开关液晶显示装置
公开(公告)号：US07999899B1
公开(公告)日：2011-08-16
申请号：US13013440
申请日：2011-01-25
申请人： Chia Hua Yu , I-Fang Wang , Feng-Weei Kuo , Ko-Ruay Jen , Guang-Shiung Chao
发明人： Chia Hua Yu , I-Fang Wang , Feng-Weei Kuo , Ko-Ruay Jen , Guang-Shiung Chao
IPC分类号： G02F1/1343
CPC分类号： G02F1/134363 , G02F2001/134372
摘要： A fringe field switching liquid crystal display apparatus is provided. This apparatus includes a first electrode disposed in a stacked relationship with a second electrode. The first electrode includes a first side edge, a second side edge, and plural spaces that define plural strips between the first and the second side edges, wherein the plural strips and the plural spacings form a first area. The second electrode is disposed on one of places above and below the first electrode, and has at least a penetrating vacancy or other capacitance-reduction device, which has a projection onto the first electrode located outside the first area.
摘要翻译：提供了一种边缘场切换液晶显示装置。该装置包括与第二电极堆叠关系地设置的第一电极。第一电极包括第一侧边缘，第二侧边缘和在第一和第二侧边缘之间限定多个条带的多个空间，其中多个条带和多个间隔形成第一区域。第二电极设置在第一电极上方和下方的一个位置上，并且至少具有穿透空位或其他电容减小装置，其在位于第一区域外部的第一电极上具有突起。

4. 发明授权

US07978278B2 Display apparatus and repair method thereof 有权
标题翻译：显示装置及其修理方法
公开(公告)号：US07978278B2
公开(公告)日：2011-07-12
申请号：US12252857
申请日：2008-10-16
申请人： Yi Tse Lin , Hsu Ho Wu , Chia Hua Yu , Hui Fang Cheng
发明人： Yi Tse Lin , Hsu Ho Wu , Chia Hua Yu , Hui Fang Cheng
IPC分类号： G02F1/1333 , G02F1/1343 , G02F1/13
CPC分类号： G02F1/136259 , G02F2001/136263
摘要： A display apparatus comprises a substrate, a first lead, a second lead and a third lead. The first lead and second lead are provided on the substrate and intersect at a first overlapping area. The third lead surrounds the first overlapping area where the first lead and second lead cross each other. The third lead intersects the first lead respectively at a second overlapping area and a third overlapping area.
摘要翻译：显示装置包括基板，第一引线，第二引线和第三引线。第一引线和第二引线设置在基板上并在第一重叠区域相交。第三引线围绕第一重叠区域，第一引线和第二引线彼此交叉。第三引线分别在第二重叠区域和第三重叠区域与第一引线相交。

5. 发明授权

US08681281B2 Grounding structure for display device 有权
标题翻译：显示设备接地结构
公开(公告)号：US08681281B2
公开(公告)日：2014-03-25
申请号：US12560570
申请日：2009-09-16
申请人： Hsuan-Chen Liu , Sung-Chun Lin , Kun Cheng Lee , Chia Hua Yu
发明人： Hsuan-Chen Liu , Sung-Chun Lin , Kun Cheng Lee , Chia Hua Yu
IPC分类号： G02F1/1333 , G02F1/1345
CPC分类号： G02F1/13452 , G02F1/13454 , G02F2001/133334
摘要： A grounding structure for a display device is provided. The grounding structure includes a substrate, a first connecting pad, a second connecting pad, a connecting structure and a grounding line. The first and second connecting pads are disposed on the substrate. The connecting structure electrically connects the first and second connecting pads. The first grounding line is disposed on the substrate, and has a length larger than two thirds of the projected length of the connecting structure on the surface of the substrate.
摘要翻译：提供了一种用于显示装置的接地结构。接地结构包括基板，第一连接焊盘，第二连接焊盘，连接结构和接地线。第一和第二连接焊盘设置在基板上。连接结构电连接第一和第二连接焊盘。第一接地线设置在基板上，并且其长度大于基板表面上的连接结构的突出长度的三分之二。

6. 发明授权

US08487890B2 In-cell touch-sensitive panel 有权
标题翻译：单元内触摸屏
公开(公告)号：US08487890B2
公开(公告)日：2013-07-16
申请号：US12705232
申请日：2010-02-12
申请人： Yi Chung Juan , Chia Hua Yu , Sung Chun Lin , Hsu Ho Wu
发明人： Yi Chung Juan , Chia Hua Yu , Sung Chun Lin , Hsu Ho Wu
IPC分类号： G06F3/041
CPC分类号： G06F3/0412 , G06F3/045
摘要： An in-cell touch-sensitive panel includes TFT and CF substrates. The TFT substrate includes a net-shaped readout circuit and conductive pads arranged in array manner. The net-shaped readout circuit includes widthwise and lengthwise readout lines. The widthwise readout lines are electrically connected to the lengthwise readout lines. The conductive pads are electrically connected to the net-shaped readout circuit. Spacers are adapted to keep a first gap between the TFT and CF substrates. Protrudent portions are arranged to be corresponding to the conductive pads, and there is a second gap between the protrudent portion and the conductive pad. A transparent electrode covers the spacers and the protrudent portion.
摘要翻译：单元内触摸屏包括TFT和CF基板。 TFT基板包括网状读出电路和以阵列方式布置的导电焊盘。网状读出电路包括宽度方向和长度方向的读出线。横向读出线电连接到纵向读出线。导电焊盘电连接到网状读出电路。隔板适于保持TFT和CF基板之间的第一间隙。突出部分被布置成对应于导电焊盘，并且在突出部分和导电焊盘之间存在第二间隙。透明电极覆盖间隔物和凸起部分。

7. 发明授权

US08035765B2 TFT array substrate, LCD panel and liquid crystal display 有权
标题翻译： TFT阵列基板，LCD面板和液晶显示器
公开(公告)号：US08035765B2
公开(公告)日：2011-10-11
申请号：US12771633
申请日：2010-04-30
申请人： Jui Hsin Tsai , Chia Hua Yu , Kun Chen Lee
发明人： Jui Hsin Tsai , Chia Hua Yu , Kun Chen Lee
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G02F1/136213 , G02F2001/134345
摘要： A TFT array substrate includes gate lines, data lines, and first and second common lines. The gate lines are disposed on a transparent substrate. The first gate lines to the N+1-th gate lines are arranged in order, and N is a positive number. The data lines cross the gate lines. There is no pixel region defined by the N-th and N+1-th gate lines and adjacent two of the data lines, when N is an even number. There are two pixel regions being left and right pixel region defined by the N-th and N+1-th gate lines and adjacent two of the data lines, when N is an odd number. The first common lines are parallel to the gate lines. The second common lines are parallel to the data lines and electrically connected to the first common lines, wherein each second common line is disposed between the left and right pixel regions.
摘要翻译： TFT阵列基板包括栅极线，数据线以及第一和第二公共线。栅极线设置在透明基板上。到第N + 1栅极线的第一栅极线依次排列，N是正数。数据线穿过栅极线。当N是偶数时，不存在由第N和第N + 1个栅极线和相邻的两条数据线限定的像素区域。当N是奇数时，存在由第N和第N + 1个栅极线和相邻的两条数据线限定的左右像素区域的两个像素区域。第一条公共线与栅极线平行。第二公共线与数据线平行并且电连接到第一公共线，其中每个第二公共线设置在左和右像素区之间。

8. 发明授权

US08451413B2 Array substrate for FFS type LCD panel and method for manufacturing the same 有权
标题翻译：用于FFS型LCD面板的阵列基板及其制造方法
公开(公告)号：US08451413B2
公开(公告)日：2013-05-28
申请号：US12696690
申请日：2010-01-29
申请人： Hsuan Chen Liu , Yun Bok Lee , Chia Hua Yu , Kun Tsai Huang , Kun Cheng Lee
发明人： Hsuan Chen Liu , Yun Bok Lee , Chia Hua Yu , Kun Tsai Huang , Kun Cheng Lee
IPC分类号： G02F1/1343
CPC分类号： G02F1/134363 , G02F1/136286 , G02F2201/40
摘要： An array substrate for FFS type LCD panel includes a transparent substrate, gate lines, a gate insulating layer, data lines, pixel electrodes, a passivation layer and a common electrode. The gate lines are disposed on the transparent substrate. The gate insulating layer is disposed on the transparent substrate and covers the gate lines. The data lines are disposed on the gate insulating layer. The pixel electrodes are disposed on the gate insulating layer, wherein the pixel electrodes and the data lines are located on the same level. The passivation layer is disposed on the gate insulating layer and covers the pixel electrodes and the data lines. The common electrode is disposed on the passivation layer.
摘要翻译：用于FFS型LCD面板的阵列基板包括透明基板，栅极线，栅极绝缘层，数据线，像素电极，钝化层和公共电极。栅极线设置在透明基板上。栅极绝缘层设置在透明基板上并覆盖栅极线。数据线设置在栅极绝缘层上。像素电极设置在栅绝缘层上，其中像素电极和数据线位于相同的电平上。钝化层设置在栅极绝缘层上并覆盖像素电极和数据线。公共电极设置在钝化层上。

9. 发明授权

US08451203B2 Liquid crystal display and pixel arrangement method thereof 有权
标题翻译：液晶显示器及其像素排列方法
公开(公告)号：US08451203B2
公开(公告)日：2013-05-28
申请号：US12756261
申请日：2010-04-08
申请人： Ling Chih Kao , Chia Hua Yu , Sung Chun Lin , Kun Chen Lee
发明人： Ling Chih Kao , Chia Hua Yu , Sung Chun Lin , Kun Chen Lee
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G3/3677
摘要： A pixel arrangement method for a liquid crystal display includes the steps of: inputting data signals with different driving polarities to odd data lines and even data lines respectively; and changing connections between a gate of thin film transistor and gate lines and connections between a source of thin film transistor and data lines in every pixel area whereby the driving polarity is inverted every two pixel areas in a transverse direction and is inverted every pixel area in a longitudinal direction. The present invention further provides a liquid crystal display.
摘要翻译：液晶显示器的像素排列方法包括以下步骤：将具有不同驱动极性的数据信号分别输入到奇数数据线和偶数数据线; 并且改变薄膜晶体管的栅极和栅极线之间的连接以及每个像素区域中的薄膜晶体管源和数据线之间的连接，从而驱动极性在横向上每两个像素区域反转，并且在每个像素区域中被反转纵向。本发明还提供一种液晶显示器。

10. 发明授权

US08305329B2 Integrated gate driver circuit and driving method therefor 有权
标题翻译：集成栅极驱动电路及其驱动方法
公开(公告)号：US08305329B2
公开(公告)日：2012-11-06
申请号：US12560771
申请日：2009-09-16
申请人： Yan Jou Chen , Yung Hsin Lu , Chia Hua Yu , Sung Chun Lin
发明人： Yan Jou Chen , Yung Hsin Lu , Chia Hua Yu , Sung Chun Lin
IPC分类号： G09G3/36
CPC分类号： G09G3/3677
摘要： An integrated gate driver circuit receives a plurality of clocks and includes a plurality of driving units cascaded in series. Each driving unit is for driving a load and includes an input terminal, an output terminal, a first switch and a second switch. The first switch has a first terminal coupled to the input terminal, a second terminal coupled to a first node, and a control terminal receiving a first clock, and the first switch is turned on when the first clock is at high level. The second switch has a first terminal receiving a second clock, a second terminal coupled to the output terminal, and a control terminal coupled to the first node, wherein the second clock charges and discharges the load through the second switch when the first node is at high level; wherein the output terminal of each driving unit is coupled to the input terminal of the immediately succeeding driving unit.
摘要翻译：集成栅极驱动器电路接收多个时钟并且包括串联级联的多个驱动单元。每个驱动单元用于驱动负载，并且包括输入端子，输出端子，第一开关和第二开关。第一开关具有耦合到输入端的第一端子，耦合到第一节点的第二端子和接收第一时钟的控制端子，并且当第一时钟处于高电平时第一开关导通。第二开关具有接收第二时钟的第一端子，耦合到输出端子的第二端子和耦合到第一节点的控制端子，其中当第一节点处于第二节点时，第二时钟通过第二开关对负载进行充电和放电高水平; 其中每个驱动单元的输出端耦合到紧随其后的驱动单元的输入端。

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