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1. 发明申请

US20100068454A1 RUBBER DOME AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：橡胶球及其制造方法
公开(公告)号：US20100068454A1
公开(公告)日：2010-03-18
申请号：US12557171
申请日：2009-09-10
申请人： Chien-Shih Hsu , Hong-Yi Huang , Liang-Ta Yeh
发明人： Chien-Shih Hsu , Hong-Yi Huang , Liang-Ta Yeh
IPC分类号： B28B1/14 , B29C39/02
CPC分类号： B29C33/0022 , B29C33/0033 , B29C39/006 , B29C39/26 , Y10T428/24281
摘要： A rubber dome is disclosed in this invention. The rubber dome includes a rubber body and a hole. When the bottom of a first mold and the top of a second mold are closely connected, a specific space is generated between them. After a rubber material is poured into the specific space, the rubber material will form the rubber body. When the first mold and the second mold are separated, the hole will be automatically formed on the top of the rubber body.
摘要翻译：在本发明中公开了橡胶圆顶。橡胶圆顶包括橡胶体和孔。当第一模具的底部和第二模具的顶部紧密连接时，在它们之间产生特定的空间。在将橡胶材料倒入特定空间之后，橡胶材料将形成橡胶体。当第一模具和第二模具分离时，孔将自动地形成在橡胶体的顶部上。

2. 发明申请

US20100156678A1 Gas Releasable Key Structure and Keyboard Structure Using the Same 有权
标题翻译：气体可释放的键结构和使用它的键盘结构
公开(公告)号：US20100156678A1
公开(公告)日：2010-06-24
申请号：US12641553
申请日：2009-12-18
申请人： Chien-Shih Hsu , Hong-Yi Huang
发明人： Chien-Shih Hsu , Hong-Yi Huang
IPC分类号： H03M11/00
CPC分类号： H01H13/82 , G06F3/0202 , H01H2213/01 , H01H2215/004
摘要： A gas releasable key structure including a base, a thin-film circuit, a key cap and an elastic structure is disclosed. The elastic structure is disposed between the key cap and the thin-film circuit and includes a cap body, a ring-shaped flange, a motion pillar and a conductor. The cap body has a first opening and a second opening. The ring-shaped flange connects an edge around the first opening. The motion pillar in the cap body has a through hole, an upper surface and a lower surface. The through hole is extended to the upper surface from the lower surface, connecting the second opening. The conductor on the lower surface has an indent and a breach that connects the through hole. When the first opening is closed, the gas inside the cap body is dissipated to the exterior via the indent, the breach, the through hole and the second opening.
摘要翻译：公开了一种包括底座，薄膜电路，键帽和弹性结构的气体可释放键结构。弹性结构设置在键帽和薄膜电路之间，包括盖体，环形凸缘，运动柱和导体。帽体具有第一开口和第二开口。环形凸缘连接第一开口周围的边缘。帽体中的运动柱具有通孔，上表面和下表面。通孔从下表面延伸到上表面，连接第二开口。下表面上的导体具有连接通孔的凹口和缺口。当第一开口关闭时，盖体内的气体经由凹口，破裂孔，通孔和第二开口消散到外部。

3. 发明授权

US08274006B2 Gas releasable key structure and keyboard structure using the same 有权
标题翻译：气体释放键结构和键盘结构使用相同
公开(公告)号：US08274006B2
公开(公告)日：2012-09-25
申请号：US12641553
申请日：2009-12-18
申请人： Chien-Shih Hsu , Hong-Yi Huang
发明人： Chien-Shih Hsu , Hong-Yi Huang
IPC分类号： H01H1/10
CPC分类号： H01H13/82 , G06F3/0202 , H01H2213/01 , H01H2215/004
摘要： A gas releasable key structure including a base, a thin-film circuit, a key cap and an elastic structure is disclosed. The elastic structure is disposed between the key cap and the thin-film circuit and includes a cap body, a ring-shaped flange, a motion pillar and a conductor. The cap body has a first opening and a second opening. The ring-shaped flange connects an edge around the first opening. The motion pillar in the cap body has a through hole, an upper surface and a lower surface. The through hole is extended to the upper surface from the lower surface, connecting the second opening. The conductor on the lower surface has an indent and a breach that connects the through hole. When the first opening is closed, the gas inside the cap body is dissipated to the exterior via the indent, the breach, the through hole and the second opening.
摘要翻译：公开了一种包括底座，薄膜电路，键帽和弹性结构的气体可释放键结构。弹性结构设置在键帽和薄膜电路之间，包括盖体，环形凸缘，运动柱和导体。帽体具有第一开口和第二开口。环形凸缘连接第一开口周围的边缘。帽体中的运动柱具有通孔，上表面和下表面。通孔从下表面延伸到上表面，连接第二开口。下表面上的导体具有连接通孔的凹口和缺口。当第一开口关闭时，盖体内的气体经由凹口，破裂孔，通孔和第二开口消散到外部。

4. 发明申请

US20120066311A1 NETWORK CONNECTION ESTABLISHMENT AND DATA TRANSMISSION METHOD 审中-公开
标题翻译：网络连接建立和数据传输方法
公开(公告)号：US20120066311A1
公开(公告)日：2012-03-15
申请号：US12978357
申请日：2010-12-23
申请人： Wei-Cheng Wang , Ping-Shun Zeung , Yung-Shen Chang , Chen-Ming Lee , Hong-Yi Huang
发明人： Wei-Cheng Wang , Ping-Shun Zeung , Yung-Shen Chang , Chen-Ming Lee , Hong-Yi Huang
IPC分类号： G06F15/16
CPC分类号： H04L67/141 , H04L51/18 , H04W28/18 , H04W48/08 , H04W76/10
摘要： The present innovation discloses a network communication establishment method between a portable device and a computer. The major feature of the present innovation is that the parameters are transmitted via the email and after the connection is established, the commands or requests for data transmission are still transmitted via email. As to the data under transmission, it is transmitted by peer to peer (P2P) technology. In another embodiment, the data may also be transmitted via email.
摘要翻译：本发明公开了便携式设备和计算机之间的网络通信建立方法。本创新的主要特点是通过电子邮件传输参数，建立连接后，仍通过电子邮件传输数据传输命令或请求。对于传输中的数据，它通过对等（P2P）技术传输。在另一个实施例中，也可以通过电子邮件传送数据。

5. 发明申请

US20110068841A1 High-resolution varactors, single-edge triggered digitally controlled oscillators, and all-digital phase-locked loops using the same 有权
标题翻译：高分辨率变容二极管，单边缘触发数字控制振荡器和使用相同的全数字锁相环
公开(公告)号：US20110068841A1
公开(公告)日：2011-03-24
申请号：US12923435
申请日：2010-09-21
申请人： Hong-Yi Huang , Jen-Chieh Liu , Yuan-Hua Chu
发明人： Hong-Yi Huang , Jen-Chieh Liu , Yuan-Hua Chu
IPC分类号： H03L7/06
CPC分类号： H03L7/0991 , H03K3/0315 , H03K5/133 , H03K5/1534 , H03K2005/00071 , H03K2005/00293 , H03L2207/50
摘要： A digitally controlled oscillator (DCO) includes a pulse generator for generating a pulse signal upon an edge of a trigger signal, and at least one delay circuit coupled to delay the pulse signal generated by the pulse generator. The pulse generator is coupled to receive one of the delayed pulse signal from the at least one delay circuit and an enable signal as the trigger signal. A digitally controlled varactor (DCV) includes a transistor having a gate, a source, a drain, and a substrate, wherein at least one of the gate, the source, the drain, and the substrate is coupled to receive one of two or more voltages, wherein at least one of the two or more voltages is not a power supply voltage or ground.
摘要翻译：数字控制振荡器（DCO）包括脉冲发生器，用于在触发信号的边沿产生脉冲信号，以及至少一个延迟电路，其被连接以延迟由脉冲发生器产生的脉冲信号。脉冲发生器被耦合以接收来自至少一个延迟电路的延迟脉冲信号中的一个和使能信号作为触发信号。数字控制变容二极管（DCV）包括具有栅极，源极，漏极和衬底的晶体管，其中栅极，源极，漏极和衬底中的至少一个被耦合以接收两个或更多个中的一个电压，其中所述两个或更多个电压中的至少一个不是电源电压或接地。

6. 发明授权

US07859343B2 High-resolution varactors, single-edge triggered digitally controlled oscillators, and all-digital phase-locked loops using the same 有权
标题翻译：高分辨率变容二极管，单边缘触发数字控制振荡器和使用相同的全数字锁相环
公开(公告)号：US07859343B2
公开(公告)日：2010-12-28
申请号：US11595972
申请日：2006-11-13
申请人： Hong-Yi Huang , Jen-Chieh Liu , Yuan-Hua Chu
发明人： Hong-Yi Huang , Jen-Chieh Liu , Yuan-Hua Chu
IPC分类号： H03L7/08
CPC分类号： H03L7/0991 , H03K3/0315 , H03K5/133 , H03K5/1534 , H03K2005/00071 , H03K2005/00293 , H03L2207/50
摘要： A digitally controlled oscillator (DCO) includes a pulse generator for generating a pulse signal upon an edge of a trigger signal, and at least one delay circuit coupled to delay the pulse signal generated by the pulse generator. The pulse generator is coupled to receive one of the delayed pulse signal from the at least one delay circuit and an enable signal as the trigger signal. A digitally controlled varactor (DCV) includes a transistor having a gate, a source, a drain, and a substrate, wherein at least one of the gate, the source, the drain, and the substrate is coupled to receive one of two or more voltages, wherein at least one of the two or more voltages is not a power supply voltage or ground.
摘要翻译：数字控制振荡器（DCO）包括脉冲发生器，用于在触发信号的边沿产生脉冲信号，以及至少一个延迟电路，其被连接以延迟由脉冲发生器产生的脉冲信号。脉冲发生器被耦合以接收来自至少一个延迟电路的延迟脉冲信号中的一个和使能信号作为触发信号。数字控制变容二极管（DCV）包括具有栅极，源极，漏极和衬底的晶体管，其中栅极，源极，漏极和衬底中的至少一个被耦合以接收两个或更多个中的一个电压，其中所述两个或更多个电压中的至少一个不是电源电压或接地。

7. 发明申请

US20080111641A1 High-resolution varactors, single-edge triggered digitally controlled oscillators, and all-digital phase-locked loops using the same 有权
标题翻译：高分辨率变容二极管，单边缘触发数字控制振荡器和使用相同的全数字锁相环
公开(公告)号：US20080111641A1
公开(公告)日：2008-05-15
申请号：US11595972
申请日：2006-11-13
申请人： Hong-Yi Huang , Jen-Chieh Liu , Yuan-Hua Chu
发明人： Hong-Yi Huang , Jen-Chieh Liu , Yuan-Hua Chu
IPC分类号： H03L7/08 , H01L29/94 , H03B28/00
CPC分类号： H03L7/0991 , H03K3/0315 , H03K5/133 , H03K5/1534 , H03K2005/00071 , H03K2005/00293 , H03L2207/50
摘要： A digitally controlled oscillator (DCO) includes a pulse generator for generating a pulse signal upon an edge of a trigger signal, and at least one delay circuit coupled to delay the pulse signal generated by the pulse generator. The pulse generator is coupled to receive one of the delayed pulse signal from the at least one delay circuit and an enable signal as the trigger signal. A digitally controlled varactor (DCV) includes a transistor having a gate, a source, a drain, and a substrate, wherein at least one of the gate, the source, the drain, and the substrate is coupled to receive one of two or more voltages, wherein at least one of the two or more voltages is not a power supply voltage or ground.
摘要翻译：数字控制振荡器（DCO）包括脉冲发生器，用于在触发信号的边沿产生脉冲信号，以及至少一个延迟电路，其被连接以延迟由脉冲发生器产生的脉冲信号。脉冲发生器被耦合以接收来自至少一个延迟电路的延迟脉冲信号中的一个和使能信号作为触发信号。数字控制变容二极管（DCV）包括具有栅极，源极，漏极和衬底的晶体管，其中栅极，源极，漏极和衬底中的至少一个被耦合以接收两个或更多个中的一个电压，其中所述两个或更多个电压中的至少一个不是电源电压或接地。

8. 发明授权

US06850089B2 Apparatus for capacitor-coupling acceleration 失效
标题翻译：电容耦合加速装置
公开(公告)号：US06850089B2
公开(公告)日：2005-02-01
申请号：US10340760
申请日：2003-01-13
申请人： Hong-Yi Huang , Shih-Lun Chen
发明人： Hong-Yi Huang , Shih-Lun Chen
IPC分类号： H03K19/017 , H03K19/092
CPC分类号： H03K19/01707
摘要： A capacitor-coupling acceleration apparatus is an accelerating circuit capable of being applied to interconnect lines in an integrated circuit in order to reduce delay owing to parasitic resistance and capacitance of the interconnect lines in the integrated circuit. The apparatus can be disposed between the interconnect lines. When a signal transmitted on the interconnect line has a change from a low-level voltage to a high-level voltage, the apparatus detects the voltage level change of the signal and provides a charging loop to charge the interconnect line, thereby accelerating the change from the low-level voltage to the high-level voltage. When a signal on the interconnect line has a change from the high-level voltage to the low-level voltage, the apparatus detects the voltage level change of the signal and provides a discharging loop to discharge the interconnect line, thereby accelerating the change from the high-level voltage to the low-level voltage.
摘要翻译：电容耦合加速装置是能够应用于集成电路中的布线的加速电路，以便由于集成电路中的互连线的寄生电阻和电容而减少延迟。该装置可以设置在互连线之间。当在互连线上发送的信号从低电平电压变化到高电平电压时，该装置检测信号的电压电平变化，并提供充电回路以对互连线进行充电，从而加速从低电平电压到高电平电压。当互连线上的信号具有从高电平电压到低电平电压的变化时，该装置检测信号的电压电平变化，并提供放电环以放电互连线，从而加速从高电平到低电平电压。

9. 发明申请

US20090212822A1 BULK INPUT CURRENT SWITCH LOGIC CIRCUIT 有权
标题翻译：大容量输入电流开关逻辑电路
公开(公告)号：US20090212822A1
公开(公告)日：2009-08-27
申请号：US12141112
申请日：2008-06-18
申请人： Hong-Yi Huang , Chun-Tsai Hung , Yuan-Hua Chu
发明人： Hong-Yi Huang , Chun-Tsai Hung , Yuan-Hua Chu
IPC分类号： H03K19/094
CPC分类号： H03K19/086 , H03K19/20
摘要： A current switch logic circuit is disclosed. The circuit includes a current sense amplifier formed by a first transistor to a fifth transistor, and a logic tree. The logic tree is used to generate a first current and a second current. The current sense amplifier generates a first output signal and a second output signal according to the first current and the second current.
摘要翻译：公开了一种电流开关逻辑电路。该电路包括由第一晶体管至第五晶体管形成的电流检测放大器和逻辑树。逻辑树用于生成第一个电流和第二个电流。电流检测放大器根据第一电流和第二电流产生第一输出信号和第二输出信号。

10. 发明授权

US07522084B2 Cycle time to digital converter 失效
标题翻译：循环时间到数字转换器
公开(公告)号：US07522084B2
公开(公告)日：2009-04-21
申请号：US11826339
申请日：2007-07-13
申请人： Hong-Yi Huang , Sheng-Dar Wu , Yuan-Hua Chu
发明人： Hong-Yi Huang , Sheng-Dar Wu , Yuan-Hua Chu
IPC分类号： H03M1/60
CPC分类号： G04F10/005
摘要： A cycle time to digital converter includes a dual delay lock loop, multi phase sampling detector and VDL sampling detector. The dual delay lock loop generates the first voltage corresponding to the first delay time and the second voltage corresponding to the second delay time. The multi phase sampling detector receives first start signal, first stop signal and first voltage to detect a coarse delay time, generates the first group signals according to the coarse delay time, delays the first stop signal by a common delay time to generate the second stop signal, and delays the first start signal by the coarse delay time and the common delay time to generate the second start signal. The VDL sampling detector receives first voltage, second voltage, second start signal and second stop signal for detecting a fine delay time and generates the second group signals according to the fine delay time.
摘要翻译：数字转换器的周期时间包括双延迟锁定环路，多相采样检测器和VDL采样检测器。双延迟锁定环路产生对应于第一延迟时间的第一电压和对应于第二延迟时间的第二电压。多相采样检测器接收第一起始信号，第一停止信号和第一电压以检测粗延迟时间，根据粗延迟时间产生第一组信号，将第一停止信号延迟公共延迟时间以产生第二停止并且将第一起始信号延迟粗延迟时间和公共延迟时间以产生第二起始信号。 VDL采样检测器接收第一电压，第二电压，第二起始信号和第二停止信号，用于检测精细的延迟时间，并根据微小的延迟时间产生第二组信号。

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