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    • 7. 发明申请
    • PROTECTING BLOCK CIPHER COMPUTATION OPERATIONS FROM EXTERNAL MONITORING ATTACKS
    • US20210058228A1
    • 2021-02-25
    • US17009361
    • 2020-09-01
    • Cryptography Research, Inc.
    • Jean-Michel CioranescoElena TrichinaElke De MulderMatthew Pond Baker
    • H04L9/00H04L9/14H04L9/06
    • Systems and methods for protecting block cipher computation operations, from external monitoring attacks. An example apparatus for implementing a block cipher may comprise: a first register configured to store a first pre-computed mask value represented by a combination of a first random value and a second random value; a second register configured to store an output mask value, wherein the output mask value is an inverse permutation function of the first random value; a third register configured to store a second pre-computed mask value represented by a combination the first pre-computed mask value and a permutation function of the output mask value; a fourth register configured to store an input mask value, wherein the input mask value is a combination of an expansion function of the first random value and a key mask value; a non-linear transformation circuit configured to apply the expansion function to a masked round state, perform a non-linear transformation of a combination of a masked key with an output of the expansion function, and apply the permutation function to the output of the non-linear transformation, wherein the non-linear transformation is defined using the input mask value stored in the fourth register and the output mask value stored in the second register; and two round feedback circuits configured to swap the masked round state produced by the non-linear transformation and combine the masked round state with the first pre-computed mask value stored in the first register and the second pre-computed mask value stored in the third register.
    • 9. 发明申请
    • PROTECTING BLOCK CIPHER COMPUTATION OPERATIONS FROM EXTERNAL MONITORING ATTACKS
    • US20180062828A1
    • 2018-03-01
    • US15682881
    • 2017-08-22
    • Cryptography Research, Inc.
    • Jean-Michel CioranescoElena TrichinaElke De MulderMatthew Pond Baker
    • H04L9/00H04L9/14H04L9/06
    • Systems and methods for protecting block cipher computation operations, from external monitoring attacks. An example apparatus for implementing a block cipher may comprise: a first register configured to store a first pre-computed mask value represented by a combination of a first random value and a second random value; a second register configured to store an output mask value, wherein the output mask value is an inverse permutation function of the first random value; a third register configured to store a second pre-computed mask value represented by a combination the first pre-computed mask value and a permutation function of the output mask value; a fourth register configured to store an input mask value, wherein the input mask value is a combination of an expansion function of the first random value and a key mask value; a non-linear transformation circuit configured to apply the expansion function to a masked round state, perform a non-linear transformation of a combination of a masked key with an output of the expansion function, and apply the permutation function to the output of the non-linear transformation, wherein the non-linear transformation is defined using the input mask value stored in the fourth register and the output mask value stored in the second register; and two round feedback circuits configured to swap the masked round state produced by the non-linear transformation and combine the masked round state with the first pre-computed mask value stored in the first register and the second pre-computed mask value stored in the third register.
    • 10. 发明申请
    • LOW OVERHEAD RANDOM PRE-CHARGE COUNTERMEASURE FOR SIDE-CHANNEL ATTACKS
    • 侧向通道攻击的低负荷随机预先计数
    • US20170061121A1
    • 2017-03-02
    • US15245507
    • 2016-08-24
    • Cryptography Research, Inc
    • Roberto RivoirElke De MulderJean-Michel Cioranesco
    • G06F21/55
    • G06F21/755G06F2221/034
    • A side-channel attack resistant circuit topology for performing logic functions. This topology includes combinatorial logic to perform the at least one logic function. A logic input selector alternately supplies, in response to a first timing reference signal, an input to the combinatorial logic with noise generating input values and valid input values. A first latch input selector alternately supplies, in response to the first timing reference signal, a first memory element input with noise generating input values and valid logic output values. The valid logic output values are received from the combinatorial logic. A first memory element latches the valid logic output values in response to a second timing reference signal.
    • 用于执行逻辑功能的侧信道攻击电路拓扑。 该拓扑包括用于执行至少一个逻辑功能的组合逻辑。 逻辑输入选择器响应于第一定时参考信号交替地提供具有噪声产生输入值和有效输入值的组合逻辑的输入。 第一锁存器输入选择器响应于第一定时参考信号交替地提供输入噪声产生输入值和有效逻辑输出值的第一存储器元件。 从组合逻辑接收有效的逻辑输出值。 响应于第二定时参考信号,第一存储器元件锁存有效的逻辑输出值。