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1. 发明授权

US11409686B1 Systems and methods for floating paddle card enablement 有权
公开(公告)号：US11409686B1
公开(公告)日：2022-08-09
申请号：US17154836
申请日：2021-01-21
申请人： Dell Products L.P.
发明人： Timothy M. Lambert , Jeffrey L. Kennedy , Nihit S. Bhavsar
IPC分类号： G06F13/40 , G06F1/12 , G06F1/26 , G06F11/14 , G06F13/10 , G06F13/12
摘要： An information handling system may include a motherboard and a floating paddle card. The motherboard may include a host system comprising a host system processor, a logic device configured to perform a functionality of the information handling system in accordance with code stored on non-transitory computer-readable media of the logic device, and a management controller communicatively coupled to the host system processor and the logic device and configured to perform out-of-band management of the information handling system. The floating paddle card may be communicatively coupled to the motherboard and configured to serve as interface between one or more devices coupled to the floating paddle card and the logic device and the management controller, the floating paddle card comprising a microcontroller unit configured to, alone or in combination with other circuitry of the floating paddle card, divide management of the one or more devices between the motherboard and the floating paddle card.

2. 发明授权

US11349965B1 Self-describing cable 有权
公开(公告)号：US11349965B1
公开(公告)日：2022-05-31
申请号：US17124774
申请日：2020-12-17
申请人： Dell Products L.P.
发明人： Yuchen Xu , Timothy M. Lambert , Jeffrey L. Kennedy
IPC分类号： H04L69/22 , H01B13/34 , H04L69/24
摘要： A system may include a controller, an endpoint device, and a cable coupled between the controller and the endpoint device and comprising a communication wire for bidirectionally communicating signals between the controller and the endpoint device and a circuit formed as a part of the cable and communicatively coupled to the communication wire, the circuit having a microcontroller unit configured to communicate identifying information regarding the cable to the controller via the communication wire and without contention with the signals bidirectionally communicated between the controller and the endpoint device.

3. 发明授权

US11509751B2 Self-describing system using single-source/multi-destination cable 有权
公开(公告)号：US11509751B2
公开(公告)日：2022-11-22
申请号：US17132905
申请日：2020-12-23
申请人： Dell Products L.P.
发明人： Michael J. Stumpf , Jeffrey L. Kennedy
IPC分类号： H04L69/24 , H04L69/22 , G01R27/02 , H04B3/14 , H04L69/00
摘要： An information handling system may include a plurality of communication destinations, a communication source, a single-source/multi-destination cable having a plurality of branches, each branch communicatively coupling the communication source to a communication destination respective to such branch, and a logic device communicatively coupled to the communication source and the single-source/multi-destination cable and configured to communicate to each of the plurality of branches both analog source identifying information and digital source identifying information regarding the communication source.

4. 发明授权

US11409683B2 Systems and methods for single-wire multi-protocol discovery and assignment to protocol-aware purpose-built engines 有权
公开(公告)号：US11409683B2
公开(公告)日：2022-08-09
申请号：US17131300
申请日：2020-12-22
申请人： Dell Products L.P.
发明人： Timothy M. Lambert , Jeffrey L. Kennedy
IPC分类号： G06F13/40
摘要： A method may be provided for a system having a logic device interfaced between a management controller and a plurality of subsystems, wherein the logic device includes a plurality of purpose-built engines, each purpose-built engine configured to perform single-wire communication with one or more subsystems in accordance with a particular protocol associated with such purpose-built engine and a purpose-built engine group switch interfaced between the plurality of purpose-built engines and a plurality of connectors for communicatively coupling the plurality of subsystems to the logic device. The method may include establishing, with a purpose-built engine group switch, a plurality of communication routes based on one or more switch control signals, wherein each route of the plurality of communication routes is established between a respective purpose-built engine and a respective connector. The method may also include monitoring all possible one-wire communication paths between the purpose-built engines and the subsystems for announcements of protocol types. The method may further include in response to such monitoring, communicating the switch control signals to the purpose-built engine group switch in accordance with supported communications protocols of individual purpose-built engines of the plurality of purpose-built engines.

5. 发明授权

US11334130B1 Method for power brake staggering and in-rush smoothing for multiple endpoints 有权
公开(公告)号：US11334130B1
公开(公告)日：2022-05-17
申请号：US16952467
申请日：2020-11-19
申请人： Dell Products L.P.
发明人： Jeffrey L. Kennedy , Timothy M. Lambert , Yuchen Xu
IPC分类号： G06F1/26 , G06F13/42 , G06F1/28 , G06F1/30 , G06F1/3206 , G06F1/18 , G06F9/02 , G06F9/4401
摘要： Systems and methods for staggering the release of multiple endpoints from a power brake event. A MCU on each riser implements a riser offset delay based on its position in an order in which power is to be released. For a riser with multiple slots, a delay circuit may be connected to one or more slots to provide a unique offset time to delay the release of power supply the slot. In some systems, a baseboard management controller (BMC) identifies endpoints subject to a power brake event during a POST process. Risers and slots that are not subject to a power brake event are identified and not included in the determination of delays or offset times.

6. 发明授权

US11294849B1 Systems and methods for in-band pulse-addressable multiplexer 有权
公开(公告)号：US11294849B1
公开(公告)日：2022-04-05
申请号：US17100445
申请日：2020-11-20
申请人： Dell Products L.P.
发明人： Timothy M. Lambert , Michael J. Stumpf , Jeffrey L. Kennedy
IPC分类号： G06F13/42 , H04L12/40
摘要： An information handling system may include a bus initiator, a plurality of bus endpoints, and a bus communicatively coupled between the bus initiator and the plurality of bus endpoints, wherein the bus comprises a multiplexer topology of a plurality of multiplexers. The bus initiator may be configured to perform in-band addressing to select a communications channel through the multiplexer topology via an addressing protocol that uses pulse bursts for initiation of the addressing, identification of the communications channel, and termination of the addressing. Pulses of the pulse bursts may be sufficiently short in duration to pass through filters of the bus endpoints such that the pulse bursts are not processed by the endpoints.

7. 发明授权

US11630898B2 Systems and methods for providing secure logic device authentication, update, and recovery 有权
公开(公告)号：US11630898B2
公开(公告)日：2023-04-18
申请号：US17132783
申请日：2020-12-23
申请人： Dell Products L.P.
发明人： Timothy M. Lambert , Milton Olavo Decarvalho Taveira , Jeffrey L. Kennedy
IPC分类号： G06F21/57 , G06F8/65 , G06F12/14 , G06F21/44
摘要： An information handling system may include a host system comprising a host system processor, a logic device configured to perform a functionality of the information handling system in accordance with code stored on non-transitory computer-readable media of the logic device, and a management controller communicatively coupled to the host system processor and the logic device and configured to perform out-of-band management of the information handling system. The management controller may be further configured to: during a boot of the management controller, perform an initial authentication of the code via an immutable interface of the logic device, after the initial authentication and prior to completion of boot of the management controller, enable a hardware lock to prevent write access to the logic device via the immutable interface, and in response to a power on request of the host system, perform a second authentication of the code via a mutable interface of the logic device.

8. 发明授权

US11340572B1 Communication with an information handling system air mover using enhanced data-over-tachometer signal protocol with variable read and write commands 有权
公开(公告)号：US11340572B1
公开(公告)日：2022-05-24
申请号：US17100510
申请日：2020-11-20
申请人： Dell Products L.P.
发明人： Timothy M. Lambert , Michael J. Stumpf , Nihit S. Bhavsar , Jeffrey L. Kennedy
IPC分类号： G08B1/08 , G05B19/042 , F24F11/30 , F24F11/58 , F24F11/72 , F24F11/65 , H04L12/28 , G08B25/06 , H04L67/12
摘要： An information handling system may include an air mover configured to drive a flow of air and a processing component communicatively coupled to the air mover for controlling operation of the air mover via a first wire configured to communicate analog air mover speed commands from the processing component to the air mover for controlling a speed of the air mover and a second wire configured to communicate analog tachometer information from the air mover to the processing component. At least one of the air mover and the processing component may be configured to initiate a mode for serial digital communication via the first wire and the second wire. The air mover and the processing component may be configured to communicate information to each other in accordance with a digital communication protocol via the first wire and the second wire during the mode for serial digital communication.

9. 发明申请

US20220155834A1 METHOD FOR POWER BRAKE STAGGERING AND IN-RUSH SMOOTHING FOR MULTIPLE ENDPOINTS 有权
公开(公告)号：US20220155834A1
公开(公告)日：2022-05-19
申请号：US16952467
申请日：2020-11-19
申请人： Dell Products L.P.
发明人： Jeffrey L. Kennedy , Timothy M. Lambert , Yuchen Xu
IPC分类号： G06F1/26 , G06F13/42
摘要： Systems and methods for staggering the release of multiple endpoints from a power brake event. A MCU on each riser implements a riser offset delay based on its position in an order in which power is to be released. For a riser with multiple slots, a delay circuit may be connected to one or more slots to provide a unique offset time to delay the release of power supply the slot. In some systems, a baseboard management controller (BMC) identifies endpoints subject to a power brake event during a POST process. Risers and slots that are not subject to a power brake event are identified and not included in the determination of delays or offset times.

10. 发明授权

US11093431B2 Automated device discovery system 有权
公开(公告)号：US11093431B2
公开(公告)日：2021-08-17
申请号：US16159347
申请日：2018-10-12
申请人： Dell Products L.P.
发明人： Alberto David Perez Guevara , Jeffrey L. Kennedy
IPC分类号： G06F13/40 , G06F13/10 , G06F13/362
摘要： An automated device discovery system includes a chassis defining device slots, with device connectors located adjacent each of the device slots. A bus subsystem and a reset subsystem are coupled to the device connectors. A processing system, which is coupled to each of the at least one bus system and the reset subsystem, causes the reset subsystem to sequentially assert reset instructions through each of the device connectors in a device slot sequence. The processing system then sequentially detects, via bus paths in the bus subsystem, each device that is located in one the device slots and coupled to its respective device connector based on reset operations performed by that device in response to the sequentially asserted reset instructions. The processing system then maps each device that was detected with a respective device slot identifier that corresponds to the device slot sequence in which the reset instructions were asserted.

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