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1. 发明申请

US20070183349A1 Duplex mismatch detection 有权
标题翻译：双工不匹配检测
公开(公告)号：US20070183349A1
公开(公告)日：2007-08-09
申请号：US11523389
申请日：2006-09-19
申请人： Donald Pannell , Ozdal Barkan
发明人： Donald Pannell , Ozdal Barkan
IPC分类号： H04L5/14 , H04B1/56 , H04J3/02
CPC分类号： H04L5/14
摘要： Embodiments of the present invention provide techniques for both ends of a link suffering from duplex mismatch to correct the duplex mismatch. According to some embodiments, the half-duplex end of the link can detect that the other end of the link is in full-duplex mode by detecting late and/or very late collisions, and can correct the duplex mismatch by changing to full-duplex mode. According to some embodiments, the full-duplex end of the link can detect that the other end of the link is in half-duplex mode by one or more techniques including detecting cyclic redundancy check (CRC) errors and frame fragments, and can correct the duplex mismatch by changing to half-duplex mode.
摘要翻译：本发明的实施例提供了用于双工不匹配以纠正双工不匹配的链路的两端的技术。根据一些实施例，链路的半双工端可以通过检测延迟和/或非常晚的冲突来检测链路的另一端处于全双工模式，并且可以通过改变为全双工来校正双工不匹配模式。根据一些实施例，链路的全双工端可以通过一种或多种技术来检测链路的另一端是半双工模式，包括检测循环冗余校验（CRC）错误和帧片段，并且可以校正通过更改为半双工模式来实现双工不匹配。

2. 发明授权

US08089907B2 Duplex mismatch detection 有权
标题翻译：双工不匹配检测
公开(公告)号：US08089907B2
公开(公告)日：2012-01-03
申请号：US11523389
申请日：2006-09-19
申请人： Donald Pannell , Ozdal Barkan
发明人： Donald Pannell , Ozdal Barkan
IPC分类号： H04B1/44
CPC分类号： H04L5/14
摘要： An apparatus including a port to transmit first frames and receive second frames over a communication channel, the port including a collision detect circuit and a duplex mismatch circuit. The collision detect circuit detects collisions on the communication channel between the first frames and the second frames. The duplex mismatch circuit declares a duplex mismatch when the communication channel was established without attempting auto-negotiation, the port is in a half-duplex mode, and the collision detect circuit detects a very late collision involving one of the first frames. The very late collision occurs after a predetermined amount of data has been transmitted in the one of the first frames. The duplex mismatch indicates that a full-duplex mode is used with respect to the second frames.
摘要翻译：一种装置，包括用于发送第一帧并通过通信信道接收第二帧的端口，所述端口包括冲突检测电路和双工不匹配电路。冲突检测电路检测第一帧和第二帧之间的通信信道上的冲突。当通信信道建立而不尝试自动协商，端口处于半双工模式，并且冲突检测电路检测到涉及其中一个第一帧的非常晚的冲突时，双工不匹配电路声明双工不匹配。在第一帧之一中发送预定量的数据之后发生非常晚的冲突。双工不匹配表示相对于第二帧使用全双工模式。

3. 发明授权

US08705416B2 Duplex mismatch detection 有权
标题翻译：双工不匹配检测
公开(公告)号：US08705416B2
公开(公告)日：2014-04-22
申请号：US13315800
申请日：2011-12-09
申请人： Donald Pannell , Ozdal Barkan
发明人： Donald Pannell , Ozdal Barkan
IPC分类号： H04B1/44
CPC分类号： H04L5/14
摘要： An apparatus including a port to transmit first frames and receive second frames over a communication channel, the port including a collision detect circuit and a duplex mismatch circuit. The collision detect circuit detects collisions on the communication channel between the first frames and the second frames. The duplex mismatch circuit declares a duplex mismatch when the communication channel was established without attempting auto-negotiation, the port is in a half-duplex mode, and the collision detect circuit detects a very late collision involving one of the first frames. The very late collision occurs after a predetermined amount of data has been transmitted in the one of the first frames. The duplex mismatch indicates that a full-duplex mode is used with respect to the second frames.
摘要翻译：一种装置，包括用于发送第一帧并通过通信信道接收第二帧的端口，所述端口包括冲突检测电路和双工不匹配电路。冲突检测电路检测第一帧和第二帧之间的通信信道上的冲突。当通信信道建立而不尝试自动协商，端口处于半双工模式，并且冲突检测电路检测到涉及其中一个第一帧的非常晚的冲突时，双工不匹配电路声明双工不匹配。在第一帧之一中发送预定量的数据之后发生非常晚的冲突。双工不匹配表示相对于第二帧使用全双工模式。

4. 发明申请

US20120076057A1 Duplex Mismatch Detection 有权
标题翻译：双工不匹配检测
公开(公告)号：US20120076057A1
公开(公告)日：2012-03-29
申请号：US13315800
申请日：2011-12-09
申请人： Donald Pannell , Ozdal Barkan
发明人： Donald Pannell , Ozdal Barkan
IPC分类号： H04L5/14 , H04L5/16
CPC分类号： H04L5/14
摘要： An apparatus including a port to transmit first frames and receive second frames over a communication channel, the port including a collision detect circuit and a duplex mismatch circuit. The collision detect circuit detects collisions on the communication channel between the first frames and the second frames. The duplex mismatch circuit declares a duplex mismatch when the communication channel was established without attempting auto-negotiation, the port is in a half-duplex mode, and the collision detect circuit detects a very late collision involving one of the first frames. The very late collision occurs after a predetermined amount of data has been transmitted in the one of the first frames. The duplex mismatch indicates that a full-duplex mode is used with respect to the second frames.
摘要翻译：一种装置，包括用于发送第一帧并通过通信信道接收第二帧的端口，所述端口包括冲突检测电路和双工不匹配电路。冲突检测电路检测第一帧和第二帧之间的通信信道上的冲突。当通信信道建立而不尝试自动协商，端口处于半双工模式，并且冲突检测电路检测到涉及其中一个第一帧的非常晚的冲突时，双工不匹配电路声明双工不匹配。在第一帧之一中发送预定量的数据之后发生非常晚的冲突。双工不匹配表示相对于第二帧使用全双工模式。

5. 发明授权

US08488699B2 Synchronous network device 有权
标题翻译：同步网络设备
公开(公告)号：US08488699B2
公开(公告)日：2013-07-16
申请号：US13215149
申请日：2011-08-22
申请人： Ozdal Barkan
发明人： Ozdal Barkan
IPC分类号： H04K1/10
CPC分类号： H04J3/0685 , G06F1/10 , H04J3/0688 , H04J3/0697
摘要： A physical layer device including a plurality of ports and a clock synchronization module. Each port of the plurality of ports is programmable to receive a grandmaster clock. The clock synchronization module is configured to i) receive the grandmaster clock from a first port of the plurality of ports (wherein the first port has been programmed to receive the grandmaster clock), and ii) clean up the grandmaster clock, wherein cleaning up the grandmaster clock includes one or more of removing jitter from the grandmaster clock, controlling a voltage swing or the grandmaster clock, or establishing fixed edge rates of the grandmaster clock. Other ones of the plurality of ports, not including the first port, are programmed to receive the cleaned up grandmaster clock for use when transmitting data.
摘要翻译：包括多个端口的物理层设备和时钟同步模块。多个端口的每个端口都是可编程的，以接收一个主控时钟。所述时钟同步模块被配置为i）从所述多个端口的第一端口（其中所述第一端口被编程为接收所述主控时钟）接收所述主控时钟，以及ii）清除所述主机时钟，其中，主机时钟包括一个或多个从大师时钟中消除抖动，控制电压摆幅或大师时钟，或建立固定边沿速率的大师时钟。多个端口中的其他端口（不包括第一端口）被编程为在传输数据时接收清理的主机时钟用于使用。

6. 发明授权

US08472470B1 Method and apparatus for automatically disabling an interface to media in a network device 有权
标题翻译：用于在网络设备中自动禁用与媒体的接口的方法和装置
公开(公告)号：US08472470B1
公开(公告)日：2013-06-25
申请号：US12906934
申请日：2010-10-18
申请人： Ozdal Barkan
发明人： Ozdal Barkan
IPC分类号： H04L12/66
CPC分类号： H04L49/30 , H04L12/40032 , H04L12/40195
摘要： An apparatus including a first interface module, a second interface module, and a first physical layer device. The first interface module is configured to interface the apparatus to a copper medium. The second interface module is configured to interface the apparatus to a fiber-optic medium. The first physical layer device is configured to generate a control signal in response to establishing a link over the copper medium via the first interface module. The control signal (i) activates a link indicator to indicate status of the link over the copper medium and (ii) deactivates the second interface module.
摘要翻译：一种包括第一接口模块，第二接口模块和第一物理层设备的装置。第一接口模块被配置为将设备连接到铜介质。第二接口模块被配置为将设备接口到光纤介质。第一物理层设备被配置为响应于经由第一接口模块在铜介质上建立链路来产生控制信号。控制信号（i）激活链路指示符以指示铜介质上的链路的状态，以及（ii）停用第二接口模块。

7. 发明申请

US20080232527A1 SYNCHRONOUS NETWORK DEVICE 有权
标题翻译：同步网络设备
公开(公告)号：US20080232527A1
公开(公告)日：2008-09-25
申请号：US12052371
申请日：2008-03-20
申请人： Ozdal Barkan
发明人： Ozdal Barkan
IPC分类号： H04L7/00
CPC分类号： H04J3/0685 , G06F1/10 , H04J3/0688 , H04J3/0697
摘要： A physical layer device comprises a first port that embeds a first clock into data transmitted over a first physical medium; a second port that embeds a second clock into data transmitted over a second physical medium; a first selection module that outputs the first clock to the first port based on one of a locally generated clock and a recovered clock; and a second selection module that outputs the second clock to the second port based on one of the locally generated clock and the recovered clock. A method comprises embedding a first clock into data transmitted over a first physical medium; embedding a second clock into data transmitted over a second physical medium; generating the first clock based on one of a locally generated clock and a recovered clock; and generating the second clock based on one of the locally generated clock and the recovered clock.
摘要翻译：物理层设备包括将第一时钟嵌入到通过第一物理介质传输的数据中的第一端口; 第二端口，其将第二时钟嵌入到通过第二物理介质传输的数据中; 第一选择模块，其基于本地生成的时钟和恢复时钟之一将第一时钟输出到第一端口; 以及第二选择模块，其基于本地生成的时钟和恢复的时钟之一将第二时钟输出到第二端口。一种方法包括将第一时钟嵌入到通过第一物理介质传输的数据中; 将第二时钟嵌入到通过第二物理介质传输的数据中; 基于本地生成的时钟和恢复的时钟之一产生第一时钟; 以及基于本地生成的时钟和恢复的时钟之一生成第二时钟。

8. 发明授权

US08588705B1 System and method of determining Power over Ethernet impairment 有权
标题翻译：确定以太网供电障碍的系统和方法
公开(公告)号：US08588705B1
公开(公告)日：2013-11-19
申请号：US12323292
申请日：2008-11-25
申请人： Tak-Lap Tsui , Runsheng He , Ozdal Barkan , Dance Wu
发明人： Tak-Lap Tsui , Runsheng He , Ozdal Barkan , Dance Wu
IPC分类号： H04W52/24
CPC分类号： H04B3/237 , H04B3/493 , H04B5/0037 , H04W52/24
摘要： A system and method of determining an unbalanced current condition in Power over Ethernet applications are disclosed. In some implementations, a user or network administrator may be notified of potential impairments due to unbalanced current.
摘要翻译：公开了一种在以太网供电中确定不平衡电流状况的系统和方法。在一些实现中，可能会向用户或网络管理员通知由于不平衡电流引起的潜在损害。

9. 发明授权

US08513952B2 Sub-symbol rate cable tester 有权
标题翻译：子符号速率电缆测试仪
公开(公告)号：US08513952B2
公开(公告)日：2013-08-20
申请号：US12330751
申请日：2008-12-09
申请人： Ozdal Barkan , William Lo , Tak-Lap Tsui
发明人： Ozdal Barkan , William Lo , Tak-Lap Tsui
IPC分类号： G01R31/00
CPC分类号： G01R31/28 , G01R31/021 , H04L43/50
摘要： Aspects of the present disclosure provide for a cable tester that tests a cable to determine the cable length. The cable tester can include a clock generator that generates a clock that has clock period that is a multiple of the data symbol period and a signal generator that injects the training signal, which can be synchronous with the clock, into the cable. The cable tester can also include a receiver that samples the returned signal from the cable and adaptively filters the returned signal based on the training signal and a controller that determines the cable length from the adaptive filter tap coefficients.
摘要翻译：本公开的方面提供了测试电缆以确定电缆长度的电缆测试器。电缆测试器可以包括时钟发生器，其产生具有数据符号周期的倍数的时钟周期的时钟和将时钟同步的训练信号注入到电缆中的信号发生器。电缆测试器还可以包括接收器，其对来自电缆的返回信号进行采样，并且基于训练信号自适应地过滤返回的信号，以及控制器，其根据自适应滤波器抽头系数确定电缆长度。

10. 发明授权

US07701861B1 Physical layer and physical layer diagnostic system with reversed loopback test 有权
标题翻译：物理层和物理层诊断系统进行反向环回测试
公开(公告)号：US07701861B1
公开(公告)日：2010-04-20
申请号：US11901694
申请日：2007-09-18
申请人： Ozdal Barkan
发明人： Ozdal Barkan
IPC分类号： H04J1/16 , H04L12/56
CPC分类号： H04L1/243 , H04L43/50
摘要： A physical layer and a physical layer diagnostic system allow the physical layer of a network device to be tested without requiring the physical layer to be connected to a medium access controller. The physical layer includes a medium-side interface. A plurality of digital circuits in the physical layer communicate with the medium-side interface. A medium communicates with the medium-side interface. A packet generating device is connected to the medium and generates data packets that are transmitted over the medium to the medium-side interface, through the plurality of digital circuits of the physical layer and back to the packet generating device.
摘要翻译：物理层和物理层诊断系统允许对网络设备的物理层进行测试，而不需要将物理层连接到介质访问控制器。物理层包括中间侧接口。物理层中的多个数字电路与中间侧接口通信。介质与介质侧接口通信。分组产生装置连接到介质，并且通过物理层的多个数字电路产生通过介质发送到中间侧接口的数据分组，并返回到分组生成装置。

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