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    • 3. 发明申请
    • CAPACITANCE SENSOR WITH NOISE REJECTION
    • 具有噪声抑制的电容传感器
    • US20160364079A1
    • 2016-12-15
    • US14946784
    • 2015-11-20
    • FREESCALE SEMICONDUCTOR, INC.
    • Liang QiuBin FengXiaolei Wu
    • G06F3/041G06F3/044
    • G06F3/0418G05F3/262G06F3/044H03K17/962H03K2217/960705H03K2217/960725
    • In a touch interface, a sensor provides an output signal that is a function of a sensed capacitance. The sensor includes a charger for repetitively applying first and second voltages to charge the sensed capacitance to first and second charge values in first and second phases respectively. A sampler includes a first current mirror for providing first and second sample current signals that are a function of the first and second charge values respectively. An accumulator uses an accumulator signal to provide the output signal. The accumulator repetitively uses the first and second sample current signals differentially to modify a charge on an accumulator capacitor and provide the accumulator signal. The accumulator signal is a progressive function of the sensed capacitance but cancels noise in the first and second sample signals at frequencies less than a repetition rate of operation of the accumulator.
    • 在触摸界面中,传感器提供作为感测电容的函数的输出信号。 该传感器包括用于重复地施加第一和第二电压的充电器,用于将所感测的电容分别充电到第一和第二相中的第一和第二充电值。 采样器包括用于分别提供作为第一和第二充电值的函数的第一和第二采样电流信号的第一电流镜。 累加器使用累加器信号来提供输出信号。 蓄电池重复地使用第一和第二采样电流信号差分地修改蓄电池电容器上的电荷并提供累加器信号。 累加器信号是感测电容的渐进功能,但是以小于累加器的重复操作频率的频率消除第一和第二采样信号中的噪声。
    • 5. 发明授权
    • Spread-spectrum clock generator
    • 扩频时钟发生器
    • US09509295B1
    • 2016-11-29
    • US14992007
    • 2016-01-10
    • FREESCALE SEMICONDUCTOR, INC.
    • Meng LiuBin FengLiang Qiu
    • H03K5/135H03K3/84
    • H03K5/135
    • A spread-spectrum clock (SSC) generator for generating an SSC signal. The SSC generator has a first up/down counter that operates for a fixed, first duration (t1), a first PRBS generator that operate for a variable, second duration (t2), a second up/down counter that operates for a fixed, third duration (t3), and a second PRBS generator that operates for a variable, fourth duration (t4). A state machine sequentially triggers the first counter and the first PRBS generator to generate a positive portion of a cycle of the SSC signal and then sequentially triggers the second counter and the second PRBS generator to generate a negative portion of the cycle of the SSC signal. For a set of parameters stored in configurable registers, the first and third durations are fixed from cycle to cycle, while the second and fourth durations vary from cycle to cycle.
    • 扩频时钟(SSC)发生器,用于产生SSC信号。 SSC发生器具有第一上/下计数器,其操作固定的第一持续时间(t1),第一PRBS发生器,其操作变量,第二持续时间(t2),第二上/下计数器,其操作固定的, 第三持续时间(t3)和第二持续时间(t4)操作的第二PRBS发生器。 状态机依次触发第一计数器和第一PRBS发生器以产生SSC信号的周期的正部分,然后顺序地触发第二计数器和第二PRBS发生器以产生SSC信号的周期的负部分。 对于存储在可配置寄存器中的一组参数,第一和第三持续时间是从周期到周期固定的,而第二和第四持续时间随周期而变化。