专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US11195941B2 Semiconductor device 有权
公开(公告)号：US11195941B2
公开(公告)日：2021-12-07
申请号：US16589127
申请日：2019-09-30
申请人： FUJI ELECTRIC CO., LTD.
发明人： Takahiro Tamura , Michio Nemoto
IPC分类号： H01L29/739 , H01L27/06 , H01L29/06 , H01L29/10 , H01L29/861
摘要： Provided is a semiconductor device including a semiconductor substrate having a drift region; a transistor portion having a collector region; a diode portion having a cathode region; and a boundary portion arranged between the transistor portion and the diode portion at an upper surface of the semiconductor substrate, and having the collector region, wherein the mesa portion of each of the transistor portion and the boundary portion has an emitter region and a base region, the base region has a channel portion, and a density in the upper surface of the mesa portion in the region in which the channel portion is projected onto the upper surface of the mesa portion of the boundary portion may be smaller than the density of the region in which the channel portion is projected onto the upper surface of the mesa portion of the transistor portion.

2. 发明授权

US11362202B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US11362202B2
公开(公告)日：2022-06-14
申请号：US16992143
申请日：2020-08-13
申请人： FUJI ELECTRIC CO., LTD.
发明人： Takahiro Tamura , Michio Nemoto
IPC分类号： H01L29/739 , H01L27/06 , H01L21/285 , H01L29/32 , H01L29/36 , H01L29/423 , H01L29/47 , H01L29/872 , H01L21/02 , H01L21/265 , H01L21/266 , H01L21/22 , H01L21/225 , H01L29/10 , H01L29/78 , H01L29/66
摘要： There is provided a semiconductor device including: an anode electrode that is provided on a front surface side of a semiconductor substrate; a drift region of a first conductivity type that is provided in the semiconductor substrate; a first anode region of a first conductivity type that is in Schottky contact with the anode electrode; and a second anode region of a second conductivity type that is different from the first conductivity type, in which the first anode region has a doping concentration lower than or equal to a doping concentration of the second anode region, and is spaced from the drift region by the second anode region.

3. 发明授权

US09252209B2 Semiconductor device and method for manufacturing semiconductor device 有权
标题翻译：半导体装置及半导体装置的制造方法
公开(公告)号：US09252209B2
公开(公告)日：2016-02-02
申请号：US14730940
申请日：2015-06-04
申请人： FUJI ELECTRIC CO., LTD.
发明人： Michio Nemoto , Takashi Yoshimura
IPC分类号： H01L29/74 , H01L31/111 , H01L29/06 , H01L29/739 , H01L29/36 , H01L29/861 , H01L29/10 , H01L29/08
CPC分类号： H01L29/0611 , H01L21/263 , H01L21/268 , H01L21/3221 , H01L29/06 , H01L29/0684 , H01L29/0804 , H01L29/0821 , H01L29/1004 , H01L29/1095 , H01L29/32 , H01L29/36 , H01L29/66348 , H01L29/7393 , H01L29/7397 , H01L29/861 , H01L29/868 , H01L29/885
摘要： A p anode layer is formed on one main surface of an n− drift layer. N+ cathode layer having an impurity concentration more than that of the n− drift layer is formed on the other main surface. An anode electrode is formed on the surface of the p anode layer. A cathode electrode is formed on the surface of the n+ cathode layer. N-type broad buffer region having a net doping concentration more than the bulk impurity concentration of a wafer and less than the n+ cathode layer and p anode layer is formed in the n− drift layer. Resistivity ρ0 of the n− drift layer satisfies 0.12V0≦ρ0≦0.25V0 with respect to rated voltage V0. Total amount of net doping concentration of the broad buffer region is equal to or more than 4.8×1011 atoms/cm2 and equal to or less than 1.0×1012 atoms/cm2.
摘要翻译： p正极层形成在n漂移层的一个主表面上。在另一个主表面上形成杂质浓度大于n漂移层的N +阴极层。在p阳极层的表面上形成阳极电极。在n +阴极层的表面上形成阴极电极。在n漂移层中形成净掺杂浓度大于晶片的体杂质浓度并且小于n +阴极层和p阳极层的N型宽缓冲区。 n漂移层的电阻率＆rgr; 0相对于额定电压V0满足0.12V0＆nlE;＆rgr; 0＆nlE; 0.25V0。宽缓冲区域的净掺杂浓度的总量等于或大于4.8×10 11 atoms / cm 2，等于或小于1.0×10 12原子/ cm 2。

4. 发明授权

US09070658B2 Semiconductor device and method for manufacturing semiconductor device 有权
标题翻译：半导体装置及半导体装置的制造方法
公开(公告)号：US09070658B2
公开(公告)日：2015-06-30
申请号：US14283578
申请日：2014-05-21
申请人： FUJI ELECTRIC CO., LTD.
发明人： Michio Nemoto , Takashi Yoshimura
IPC分类号： H01L29/167 , H01L29/207 , H01L29/227 , H01L29/36 , H01L21/263 , H01L29/66 , H01L29/739 , H01L29/861 , H01L29/868 , H01L29/885 , H01L29/32 , H01L21/268 , H01L21/322
CPC分类号： H01L29/0611 , H01L21/263 , H01L21/268 , H01L21/3221 , H01L29/06 , H01L29/0684 , H01L29/0804 , H01L29/0821 , H01L29/1004 , H01L29/1095 , H01L29/32 , H01L29/36 , H01L29/66348 , H01L29/7393 , H01L29/7397 , H01L29/861 , H01L29/868 , H01L29/885
摘要： A p anode layer (2) is formed on one main surface of an n− drift layer (1). An n+ cathode layer (3) having an impurity concentration more than that of the n− drift layer (1) is formed on the other main surface of the n− drift layer (1). An anode electrode (4) is formed on the surface of the p anode layer (2). A cathode electrode (5) is formed on the surface of the n+ cathode layer (3). An n-type broad buffer region (6) that has a net doping concentration more than the bulk impurity concentration of a wafer and less than that of the n+ cathode layer (3) and the p anode layer (2) is formed in the n− drift layer (1). The resistivity ρ0 of the n− drift layer (1) satisfies 0.12V0≦ρ0≦0.25V0 with respect to a rated voltage V0. The total amount of the net doping concentration of the broad buffer region (6) is equal to or more than 4.8×1011 atoms/cm2 and equal to or less than 1.0×1012 atoms/cm2.
摘要翻译： p阳极层（2）形成在n漂移层（1）的一个主表面上。在n漂移层（1）的另一个主表面上形成杂质浓度大于n漂移层（1）的n +阴极层（3）。在p阳极层（2）的表面上形成阳极电极（4）。在n +阴极层（3）的表面上形成有阴极电极（5）。 n型宽缓冲区（6）的净掺杂浓度大于晶片的体杂质浓度并且小于n +阴极层（3）和p阳极层（2）的净掺杂浓度漂移层（1）。相对于额定电压V0，n漂移层（1）的电阻率＆rgr0满足0.12V0＆lt; nlE;＆rgr; 0＆nlE; 0.25V0。宽缓冲区域（6）的净掺杂浓度的总量等于或大于4.8×10 11原子/ cm 2，等于或小于1.0×10 12原子/ cm 2。

5. 发明授权

US10998398B2 Semiconductor device and method for manufacturing semiconductor device 有权
公开(公告)号：US10998398B2
公开(公告)日：2021-05-04
申请号：US16952725
申请日：2020-11-19
申请人： FUJI ELECTRIC CO., LTD.
发明人： Michio Nemoto , Takashi Yoshimura
IPC分类号： H01L29/06 , H01L29/66 , H01L29/739 , H01L29/861 , H01L29/868 , H01L29/885 , H01L29/32 , H01L29/36 , H01L29/08 , H01L29/10 , H01L21/263 , H01L21/322 , H01L21/268
摘要： A semiconductor device includes a plurality of broad buffer layers provided in a drift layer. Each of the plurality of the broad buffer layers has an impurity concentration exceeding that of a portion of the drift layer excluding the broad buffer layers, and has a mountain-shaped impurity concentration distribution in which a local maximum value is less than the impurity concentration of an anode layer and a cathode layer. The plurality of broad buffer layers are disposed at different depths from a first main surface of the drift layer, respectively, the number of broad buffer layers close to the first main surface from the intermediate position of the drift layer is at least one, and number of broad buffer layers close to a second main surface of the drift layer from the intermediate position of the drift layer is at least two. The broad buffer layer includes a hydrogen-related donor.

6. 发明授权

US10043865B2 Semiconductor device and method for manufacturing semiconductor device 有权
公开(公告)号：US10043865B2
公开(公告)日：2018-08-07
申请号：US14980433
申请日：2015-12-28
申请人： FUJI ELECTRIC CO., LTD.
发明人： Michio Nemoto , Takashi Yoshimura
IPC分类号： H01L29/74 , H01L31/111 , H01L29/06 , H01L21/263 , H01L29/36 , H01L29/66 , H01L29/739 , H01L29/861 , H01L29/868 , H01L29/885 , H01L29/32 , H01L29/08 , H01L29/10 , H01L21/268 , H01L21/322
摘要： A p anode layer is formed on one main surface of an n− drift layer. N+ cathode layer having an impurity concentration more than that of the n− drift layer is formed on the other main surface. An anode electrode is formed on the surface of the p anode layer. A cathode electrode is formed on the surface of the n+ cathode layer. N-type broad buffer region having a net doping concentration more than the bulk impurity concentration of a wafer and less than the n+ cathode layer and p anode layer is formed in the n− drift layer. Resistivity ρ0 of the n− drift layer satisfies 0.12V0≤ρ0≤0.25V0 with respect to rated voltage V0. Total amount of net doping concentration of the broad buffer region is equal to or more than 4.8×1011 atoms/cm2 and equal to or less than 1.0×1012 atoms/cm2.

7. 发明授权

US08957461B2 Schottky barrier diode having a trench structure 有权
标题翻译：具有沟槽结构的肖特基势垒二极管
公开(公告)号：US08957461B2
公开(公告)日：2015-02-17
申请号：US13952741
申请日：2013-07-29
申请人： Fuji Electric Co., Ltd.
发明人： Tomonori Mizushima , Michio Nemoto
IPC分类号： H01L29/872 , H01L29/06 , H01L29/40
CPC分类号： H01L29/872 , H01L29/0661 , H01L29/402 , H01L29/407 , H01L29/8725
摘要： A TMBS diode is disclosed. In an active portion and voltage withstanding structure portion of the diode, an end portion trench surrounds active portion trenches. An active end portion which is an outer circumferential side end portion of an anode electrode is in contact with conductive polysilicon inside the end portion trench. A guard trench is separated from the end portion trench and surrounds it. A field plate provided on an outer circumferential portion of the anode electrode is separated from the anode electrode, and contacts both part of a surface of n-type drift layer in a mesa region between the end portion trench and the guard trench and the conductive polysilicon formed inside the guard trench. The semiconductor device has high withstand voltage without injection of minority carriers, and relaxed electric field intensity of the trench formed in an end portion of an active portion.
摘要翻译：公开了TMBS二极管。在二极管的有效部分和耐电压结构部分中，端部沟槽围绕有源部分沟槽。作为阳极电极的外周侧端部的活性端部与端部槽内的导电性多晶硅接触。保护沟槽与端部沟槽分离并将其包围。设置在阳极电极的外周部上的场板与阳极分离，并且在端部沟槽和保护沟槽之间的台面区域中与n型漂移层的表面的两部分接触，并且导电多晶硅形成在防护沟内。半导体器件具有高耐压而不注入少数载流子，并且在有源部分的端部形成沟槽的松弛电场强度。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式