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1. 发明申请

US20170039039A1 SYSTEM AND METHOD FOR MODEL BASED TECHNOLOGY AND PROCESS FOR SAFETY-CRITICAL SOFTWARE DEVELOPMENT 审中-公开
标题翻译：基于模型的技术和安全关键软件开发过程的系统与方法
公开(公告)号：US20170039039A1
公开(公告)日：2017-02-09
申请号：US14819167
申请日：2015-08-05
申请人： General Electric Company
发明人： Timothy Lee Johnson , Andrew Walter Crapo , Michael Richard Durling , Alexander Walsch , Kit Yan Siu , Luca Parolini , Panagiotis Manolios , Meng Li , Han Yu , Scott Alan Stacey , Gregory Reed Sykes
IPC分类号： G06F9/44 , G06F9/45 , G06F11/36
CPC分类号： G06F8/35 , G06F8/20 , G06F11/3604 , G06F11/3608
摘要： A method for model-based design of safety-critical software is disclosed. The method includes receiving natural-language software requirements, developing a specification model by implementing either semantic modeling or graphical modeling, applying formal requirements analysis to the specification model, auto generating requirements based and robustness test cases from the specification model, developing a design model based on the specification model, applying test cases to the design model, auto-generating source code using the design model, verifying the source code using both test cases and static analysis technology, and compiling executable object code from the verified source code. If a result of the analysis of the software specification or design models is not satisfactory then adjusting the specification or design model to correct any inconsistency, and repeating applying the analysis and test cases. A system for implementing the model-based design and a non-transitory computer readable medium are disclosed.
摘要翻译：公开了一种基于安全关键软件的基于模型设计的方法。该方法包括接收自然语言软件需求，通过实现语义建模或图形建模开发规范模型，对规范模型应用形式需求分析，从规范模型中自动生成需求和鲁棒性测试用例，开发基于设计模型在规范模型上，将测试用例应用于设计模型，使用设计模型自动生成源代码，使用测试用例和静态分析技术验证源代码，并从验证的源代码编译可执行对象代码。如果软件规范或设计模型的分析结果不令人满意，则调整规范或设计模型以纠正任何不一致，并重复应用分析和测试用例。公开了一种用于实现基于模型的设计和非暂时计算机可读介质的系统。

2. 发明申请

US20160335115A1 SYSTEM AND METHOD FOR MULTI-LEVEL REAL-TIME SCHEDULING ANALYSES 有权
标题翻译：用于多级实时调度分析的系统和方法
公开(公告)号：US20160335115A1
公开(公告)日：2016-11-17
申请号：US14712707
申请日：2015-05-14
申请人： General Electric Company
发明人： Gregory Reed Sykes , Kevin Jones , Hongwei Liao , Panagiotis Manolios
IPC分类号： G06F9/46
CPC分类号： G06F9/46 , G06F9/4887
摘要： A system and method of multi-level scheduling analysis for a general processing module of a real-time operating system. The method includes identifying any processes within respective partitions of the general processing module, for each identified process, determining if the process is local-time centric or global-time centric. The method converts global-time centric process to a local-time centric process, applies a single-level scheduling analysis technique to the processes of respective partitions, and transforms local-time based response times to global-time based response times. The method performs scheduling and response time analyses on one or more of the identified processes of respective partitions. The method can be performed on a synchronous and/or asynchronous system, and on a hierarchical scheduling system that includes a top level scheduler having a static-cyclic schedule and/or a general static schedule. A system and non-transitory computer-readable medium are also disclosed.
摘要翻译：一种用于实时操作系统的通用处理模块的多级调度分析的系统和方法。该方法包括识别通用处理模块的各分区内对于每个识别的过程的任何过程，确定该过程是以本地时间为中心还是以全球时间为中心。该方法将以全球时间为中心的流程转换为本地时间流程，将单级调度分析技术应用于各个分区的流程，并将基于本地时间的响应时间转换为全球时间响应时间。该方法对相应分区的所识别的一个或多个进程执行调度和响应时间分析。该方法可以在同步和/或异步系统以及包括具有静态循环调度和/或一般静态调度的顶级调度器的分层调度系统上执行。还公开了一种系统和非暂时计算机可读介质。

3. 发明授权

US10346140B2 System and method for model based technology and process for safety-critical software development 有权
公开(公告)号：US10346140B2
公开(公告)日：2019-07-09
申请号：US14819167
申请日：2015-08-05
申请人： General Electric Company
发明人： Timothy Lee Johnson , Andrew Walter Crapo , Michael Richard Durling , Alexander Walsch , Kit Yan Siu , Luca Parolini , Panagiotis Manolios , Meng Li , Han Yu , Scott Alan Stacey , Gregory Reed Sykes
IPC分类号： G06F8/20 , G06F8/35 , G06F11/36
摘要： A method for model-based design of safety-critical software is disclosed. The method includes receiving natural-language software requirements, developing a specification model by implementing either semantic modeling or graphical modeling, applying formal requirements analysis to the specification model, auto generating requirements based and robustness test cases from the specification model, developing a design model based on the specification model, applying test cases to the design model, auto-generating source code using the design model, verifying the source code using both test cases and static analysis technology, and compiling executable object code from the verified source code. If a result of the analysis of the software specification or design models is not satisfactory then adjusting the specification or design model to correct any inconsistency, and repeating applying the analysis and test cases. A system for implementing the model-based design and a non-transitory computer readable medium are disclosed.

4. 发明授权

US10169217B2 System and method for test generation from software specification models that contain nonlinear arithmetic constraints over real number ranges 有权
公开(公告)号：US10169217B2
公开(公告)日：2019-01-01
申请号：US15092453
申请日：2016-04-06
申请人： General Electric Company
发明人： Han Yu , Michael Richard Durling , Kit Yan Siu , Meng Li , Baoluo Meng , Scott Alan Stacey , Daniel Edward Russell , Gregory Reed Sykes
IPC分类号： G06F11/36
摘要： A computer-implemented system for generating test cases and/or test procedures to verify software having a nonlinear arithmetic constraint over a Real number range. The system includes a translator that receives, as input, software specification models for the software to be verified. The translator is configured to generate, as output, a plurality of SMT formulas that are semantically equivalent to the software specification models. The system includes an analytical engine pool that receives, as input, the plurality of SMT formulas from the translator and analyzes the plurality of SMT formulas, and generates, as output, test case data for each of the plurality of SMT formulas determined to be satisfiable. The system includes a post-processor that receives, as input, the test case data from the analytical engine pool and generates, as output, the test cases and/or test procedures for the software to be verified based on the test case data.

5. 发明申请

US20170293549A1 SYSTEM AND METHOD FOR TEST GENERATION FROM SOFTWARE SPECIFICATION MODELS THAT CONTAIN NONLINEAR ARITHMETIC CONSTRAINTS OVER REAL NUMBER RANGES 审中-公开
公开(公告)号：US20170293549A1
公开(公告)日：2017-10-12
申请号：US15092453
申请日：2016-04-06
申请人： General Electric Company
发明人： Han Yu , Michael Richard Durling , Kit Yan Siu , Meng Li , Baoluo Meng , Scott Alan Stacey , Daniel Edward Russell , Gregory Reed Sykes
IPC分类号： G06F11/36
CPC分类号： G06F11/3684 , G06F11/3604 , G06F11/3692
摘要： A computer-implemented system for generating test cases and/or test procedures to verify software having a nonlinear arithmetic constraint over a Real number range. The system includes a translator that receives, as input, software specification models for the software to be verified. The translator is configured to generate, as output, a plurality of SMT formulas that are semantically equivalent to the software specification models. The system includes an analytical engine pool that receives, as input, the plurality of SMT formulas from the translator and analyzes the plurality of SMT formulas, and generates, as output, test case data for each of the plurality of SMT formulas determined to be satisfiable. The system includes a post-processor that receives, as input, the test case data from the analytical engine pool and generates, as output, the test cases and/or test procedures for the software to be verified based on the test case data.

6. 发明授权

US10402173B2 Systems and methods for arbitrary software logic modeling 有权
公开(公告)号：US10402173B2
公开(公告)日：2019-09-03
申请号：US15441626
申请日：2017-02-24
申请人： General Electric Company
发明人： Liling Ren , Han Yu , Gregory Reed Sykes , Michael Richard Durling , Kit Yan Siu , Scott Alan Stacey
IPC分类号： G06F8/20 , G06F8/34 , G06F8/35 , G06F8/30 , G06F9/44 , G06F9/455
摘要： According to some embodiments, an Arbitrary Software Logic Modeling (“ASLM”) data source may store electronic records associated with units, each electronic record including a unit identifier, one or more identification tags, context data, unit parameters, unit variables, and internal logic. An ASLM platform may express system requirements at a logic block level and establish the logic blocks as self-contained entities and connections in accordance with the system requirements (the established logic blocks graphically representing systems logic). The ASLM platform may then explicitly transform the systems logic automatically to output language agnostic common design information exchange model information. The ASLM platform may also translate and maintain traceability among the system requirements, common design information exchange model information, and generated code.

7. 发明授权

US09983902B2 System and method for multi-level real-time scheduling analyses 有权
公开(公告)号：US09983902B2
公开(公告)日：2018-05-29
申请号：US14712707
申请日：2015-05-14
申请人： General Electric Company
发明人： Gregory Reed Sykes , Kevin Jones , Hongwei Liao , Panagiotis Manolios
IPC分类号： G06F9/46 , G06F9/48
CPC分类号： G06F9/46 , G06F9/4887
摘要： A system and method of multi-level scheduling analysis for a general processing module of a real-time operating system. The method includes identifying any processes within respective partitions of the general processing module, for each identified process, determining if the process is local-time centric or global-time centric. The method converts global-time centric process to a local-time centric process, applies a single-level scheduling analysis technique to the processes of respective partitions, and transforms local-time based response times to global-time based response times. The method performs scheduling and response time analyses on one or more of the identified processes of respective partitions. The method can be performed on a synchronous and/or asynchronous system, and on a hierarchical scheduling system that includes a top level scheduler having a static-cyclic schedule and/or a general static schedule. A system and non-transitory computer-readable medium are also disclosed.

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