专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US10862578B2 Power supply with integrated MoCA and power over ethernet (PoE) 有权
公开(公告)号：US10862578B2
公开(公告)日：2020-12-08
申请号：US16236934
申请日：2018-12-31
申请人： HUGHES NETWORK SYSTEMS, LLC
发明人： Emanuel Harrington , Raymond Helfrich
IPC分类号： H04B7/185 , H04L12/10 , H01Q1/00 , H01Q1/24
摘要： An apparatus and system for supplying power to different devices at different levels. The apparatus includes an input port for receiving power from an external source. A first converter is provided for converting the input power to a first DC voltage, and a second converter for converting the input power to a second DC voltage. Ethernet ports are provided for supplying, at least in part, the first DC voltage to a first type of device. MoCA ports are provided for supplying, at least in part, the second DC voltage to a second type of device.

2. 发明申请

US20180013487A1 SYSTEMS AND METHODS FOR INCREASING THE TRANSMISSION SPEED OF A SATELLITE VSAT 审中-公开
公开(公告)号：US20180013487A1
公开(公告)日：2018-01-11
申请号：US15702514
申请日：2017-09-12
申请人： Hughes Network Systems, LLC
发明人： Emanuel Girard Harrington , Paul E. LaCasse , Mohana Subhash Oltikar , Raymond Helfrich
IPC分类号： H04B7/185
CPC分类号： H04B7/18528 , H04B7/18517 , H04B7/18519 , H04B7/18595
摘要： Systems and methods are provided for increasing or decreasing the transmission speed of a VSAT used in a satellite network. A VSAT may include an ASIC and an FPGA in a transmission block of the VSAT. The ASIC includes an ASIC transmit modulator configured to modulate an input information signal, and circuitry for bypassing at least a portion of the ASIC transmit modulator. The FPGA includes circuitry for receiving a signal bypassing at least a portion of the ASIC transmit modulator, and an FPGA transmit modulator configured to modulate the bypassed signal. In implementations, the system uses the ASIC to burst format an input information signal with a payload burst segment; bypasses a transmit modulator of the ASIC after burst formatting the input information signal with the ASIC; and uses an FPGA to insert additional burst segments into the ASIC burst-formatted signal.

3. 发明申请

US20160191148A1 SYSTEMS AND METHODS FOR INCREASING THE TRANSMISSION SPEED OF A SATELLITE VSAT 有权
标题翻译：提高卫星遥感影像传输速度的系统和方法
公开(公告)号：US20160191148A1
公开(公告)日：2016-06-30
申请号：US14587422
申请日：2014-12-31
申请人： Hughes Network Systems, LLC
发明人： Emanuel Girard Harrington , Paul E. LaCasse , Mohana Subhash Oltikar , Raymond Helfrich
IPC分类号： H04B7/185
CPC分类号： H04B7/18528 , H04B7/18517 , H04B7/18519 , H04B7/18595
摘要： Systems and methods are provided for increasing or decreasing the transmission speed of a VSAT used in a satellite network. A VSAT may include an ASIC and an FPGA in a transmission block of the VSAT. The ASIC includes an ASIC transmit modulator configured to modulate an input information signal, and circuitry for bypassing at least a portion of the ASIC transmit modulator. The FPGA includes circuitry for receiving a signal bypassing at least a portion of the ASIC transmit modulator, and an FPGA transmit modulator configured to modulate the bypassed signal. In implementations, the system uses the ASIC to burst format an input information signal with a payload burst segment; bypasses a transmit modulator of the ASIC after burst formatting the input information signal with the ASIC; and uses an FPGA to insert additional burst segments into the ASIC burst-formatted signal.
摘要翻译：提供了用于增加或降低在卫星网络中使用的VSAT的传输速度的系统和方法。 VSAT可以在VSAT的传输块中包括ASIC和FPGA。 ASIC包括被配置为调制输入信息信号的ASIC发送调制器和用于旁路至少一部分ASIC发送调制器的电路。 FPGA包括用于接收绕过ASIC传输调制器的至少一部分的信号的电路，以及被配置为调制旁路信号的FPGA发射调制器。在实现中，系统使用ASIC以有效载荷突发片段突发格式化输入信息信号; 在使用ASIC突发格式化输入信息信号之后，旁路ASIC的发射调制器; 并使用FPGA将额外的突发片段插入到ASIC突发格式的信号中。

4. 发明授权

US10270522B2 Systems and methods for increasing the transmission speed of a satellite VSAT 有权
公开(公告)号：US10270522B2
公开(公告)日：2019-04-23
申请号：US15702514
申请日：2017-09-12
申请人： Hughes Network Systems, LLC
发明人： Emanuel Girard Harrington , Paul E. LaCasse , Mohana Subhash Oltikar , Raymond Helfrich
IPC分类号： H04B7/185
摘要： Systems and methods are provided for increasing or decreasing the transmission speed of a VSAT used in a satellite network. A VSAT may include an ASIC and an FPGA in a transmission block of the VSAT. The ASIC includes an ASIC transmit modulator configured to modulate an input information signal, and circuitry for bypassing at least a portion of the ASIC transmit modulator. The FPGA includes circuitry for receiving a signal bypassing at least a portion of the ASIC transmit modulator, and an FPGA transmit modulator configured to modulate the bypassed signal. In implementations, the system uses the ASIC to burst format an input information signal with a payload burst segment; bypasses a transmit modulator of the ASIC after burst formatting the input information signal with the ASIC; and uses an FPGA to insert additional burst segments into the ASIC burst-formatted signal.

5. 发明授权

US09762313B2 Systems and methods for increasing the transmission speed of a satellite VSAT 有权
公开(公告)号：US09762313B2
公开(公告)日：2017-09-12
申请号：US14587422
申请日：2014-12-31
申请人： Hughes Network Systems, LLC
发明人： Emanuel Girard Harrington , Paul E. LaCasse , Mohana Subhash Oltikar , Raymond Helfrich
IPC分类号： H04B7/185
CPC分类号： H04B7/18528 , H04B7/18517 , H04B7/18519 , H04B7/18595
摘要： Systems and methods are provided for increasing or decreasing the transmission speed of a VSAT used in a satellite network. A VSAT may include an ASIC and an FPGA in a transmission block of the VSAT. The ASIC includes an ASIC transmit modulator configured to modulate an input information signal, and circuitry for bypassing at least a portion of the ASIC transmit modulator. The FPGA includes circuitry for receiving a signal bypassing at least a portion of the ASIC transmit modulator, and an FPGA transmit modulator configured to modulate the bypassed signal. In implementations, the system uses the ASIC to burst format an input information signal with a payload burst segment; bypasses a transmit modulator of the ASIC after burst formatting the input information signal with the ASIC; and uses an FPGA to insert additional burst segments into the ASIC burst-formatted signal.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式