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1. 发明授权

US09140288B2 Pipeline fastener 有权
标题翻译：管道紧固件
公开(公告)号：US09140288B2
公开(公告)日：2015-09-22
申请号：US14150943
申请日：2014-01-09
申请人： Hung-I Hsu
发明人： Hung-I Hsu
IPC分类号： F16B35/00 , F16B35/04
CPC分类号： F16B35/04 , B60T17/043
摘要： A pipeline fastener defines at least one hole formed on a hollow shank with a channel formed therein and has a chip-removing section at least formed between the hole and the channel of the shank. A diameter of the chip-removing section is bigger than a bore diameter of the hole. Accordingly, by the chip-removing section with the bigger diameter, burrs which are originally formed at a convergence between a bore surface of the hole and a periphery of the shank can be removed. Consequently, following burr-cleaning procedures are reduced to lower the production cost, and damages of the burrs to other objects at the time of using the pipeline fastener are further prevented, thereby improving the safety of the use efficiently.
摘要翻译：管道紧固件限定形成在具有形成在其中的通道的中空柄上的至少一个孔，并且具有至少形成在所述孔和杆的通道之间的除屑部分。除屑部的直径大于孔的孔径。因此，通过具有较大直径的切屑除去部分，可以去除原来形成在孔的孔表面和柄周边之间的会聚处的毛刺。因此，可以进一步防止以下的毛刺清洗工序，降低生产成本，并且进一步防止在使用管线紧固件时对其他物体的毛刺造成损坏，从而有效地提高使用的安全性。

2. 发明申请

US20070007522A1 THIN FILM TRANSISTOR AND METHOD OF FORMING THE SAME 有权
标题翻译：薄膜晶体管及其形成方法
公开(公告)号：US20070007522A1
公开(公告)日：2007-01-11
申请号：US11160660
申请日：2005-07-05
申请人： Wen-Kuang Tsao , Hung-I Hsu
发明人： Wen-Kuang Tsao , Hung-I Hsu
IPC分类号： H01L31/00
CPC分类号： H01L29/4908 , H01L29/458
摘要： A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
摘要翻译：提供了包括栅极，栅极绝缘层，半导体层和源极/漏极的薄膜晶体管。栅极设置在衬底上，其中栅极包括至少一个钼 - 铌合金氮化物层。栅极绝缘层形成在衬底上以覆盖栅极。半导体层设置在栅极上方的栅绝缘层上。源极/漏极设置在半导体层上。

3. 发明授权

US07800109B2 Thin film transistor with electrodes resistant to oxidation and erosion 有权
标题翻译：具有耐氧化和侵蚀的电极的薄膜晶体管
公开(公告)号：US07800109B2
公开(公告)日：2010-09-21
申请号：US10907956
申请日：2005-04-22
申请人： Wen-Kuang Tsao , Hung-I Hsu , Hsiang-Hsien Chung , Min-Huang Chen
发明人： Wen-Kuang Tsao , Hung-I Hsu , Hsiang-Hsien Chung , Min-Huang Chen
IPC分类号： H01L29/76
CPC分类号： H01L29/4908
摘要： A thin film transistor including a gate, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode is provided. The gate is disposed over a substrate, wherein the gate comprises at least one layer of aluminum-yttrium alloy nitride. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source electrode and the drain electrode are disposed over the semiconductor layer.
摘要翻译：提供了包括栅极，栅极绝缘层，半导体层，源极和漏极的薄膜晶体管。栅极设置在衬底上，其中栅极包括至少一层铝 - 钇合金氮化物。栅极绝缘层形成在衬底上以覆盖栅极。半导体层设置在栅极上方的栅绝缘层上。源电极和漏极设置在半导体层上。

4. 发明授权

US07408190B2 Thin film transistor and method of forming the same 有权
标题翻译：薄膜晶体管及其形成方法
公开(公告)号：US07408190B2
公开(公告)日：2008-08-05
申请号：US11160660
申请日：2005-07-05
申请人： Wen-Kuang Tsao , Hung-I Hsu
发明人： Wen-Kuang Tsao , Hung-I Hsu
IPC分类号： H01L29/04 , H01L29/10 , H01L31/20 , H01L31/036 , H01L31/0376
CPC分类号： H01L29/4908 , H01L29/458
摘要： A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
摘要翻译：提供了包括栅极，栅极绝缘层，半导体层和源极/漏极的薄膜晶体管。栅极设置在衬底上，其中栅极包括至少一个钼 - 铌合金氮化物层。栅极绝缘层形成在衬底上以覆盖栅极。半导体层设置在栅极上方的栅绝缘层上。源极/漏极设置在半导体层上。

5. 发明授权

US09790978B2 Recessed head screw 有权
公开(公告)号：US09790978B2
公开(公告)日：2017-10-17
申请号：US14940232
申请日：2015-11-13
申请人： Hung-I Hsu
发明人： Hung-I Hsu
IPC分类号： F16B23/00 , F16B25/00 , F16B25/10
CPC分类号： F16B23/0023 , F16B23/0015 , F16B23/003 , F16B23/0038 , F16B25/0015 , F16B25/106
摘要： A recessed head screw includes a shank, a head, a drilling portion and threads. The head includes a top face where a socket portion is formed. The socket portion has a driving recess and a driving socket formed between the driving recess and the top face. The driving socket communicates with the driving recess. A diameter value of the driving socket is a maximum circumscribed circle diameter value of the driving recess plus a value within 20% of the maximum circumscribed circle diameter value. When a driving tool engages the socket portion, the driving socket can be in close-fitting engagement with the driving tool to increase the engagement between the driving tool and the head and prevent the screw from falling off the tool easily during the driving action of the tool, thereby delivering a full driving force to the head to improve the working efficiency and smoothness.

6. 发明申请

US20060144696A1 MAGNETRON SPUTTERING PROCESS 审中-公开
标题翻译： MAGNETRON喷溅工艺
公开(公告)号：US20060144696A1
公开(公告)日：2006-07-06
申请号：US10908304
申请日：2005-05-06
申请人： Yu-Chou Lee , Hsiang-Hsien Chung , Hung-I Hsu
发明人： Yu-Chou Lee , Hsiang-Hsien Chung , Hung-I Hsu
IPC分类号： C23C14/32 , C23C14/00
CPC分类号： C23C14/35
摘要： A magnetron sputtering process is provided. First, a reaction chamber including a substrate base, a target comprised of Al or its alloy or other metals or their alloy with higher melting point, and a magnetron device. Next, a substrate is disposed onto the substrate base. The pressure within the reaction chamber is set from 0.1 pa˜0.35 pa, and then a sputtering process is initiated within the reaction chamber to deposit a film on the substrate. Because the pressure within the reaction chamber is set from 0.1 pa˜0.35 pa, a better step coverage can be achieved during the sputtering process so that a continuous film can be deposited on the substrate without the broken or defective climbing portion of the film. Therefore, the yield of film deposition on the substrate can also be significantly increased.
摘要翻译：提供磁控溅射工艺。首先，包括基材，包含Al或其合金或其它金属的靶或其熔点较高的合金的反应室和磁控管装置。接下来，将基板设置在基板基板上。反应室内的压力设定为0.1Pa〜0.35Pa，然后在反应室内引发溅射工艺，以在衬底上沉积膜。因为反应室内的压力设定在0.1Pa〜0.35Pa，所以在溅射过程中可以实现更好的阶梯覆盖，使得连续的膜可以沉积在衬底上而没有膜的破损或有缺陷的攀登部分。因此，也可以显着提高基板上的成膜率。

7. 发明申请

US20060144695A1 SPUTTERING PROCESS FOR DEPOSITING INDIUM TIN OXIDE AND METHOD FOR FORMING INDIUM TIN OXIDE LAYER 审中-公开
标题翻译：用于沉积氧化铅的溅射工艺和形成氧化钛填料层的方法
公开(公告)号：US20060144695A1
公开(公告)日：2006-07-06
申请号：US10907189
申请日：2005-03-24
申请人： Yu-Chou Lee , Tsung-Chi Cheng , Hung-I Hsu
发明人： Yu-Chou Lee , Tsung-Chi Cheng , Hung-I Hsu
IPC分类号： C23C14/00
CPC分类号： C23C14/086
摘要： A sputtering process of indium tin oxide (ITO) is provided. The sputtering process includes the following steps. First, a substrate is moved into a reaction chamber, wherein an ITO target is disposed inside the reaction chamber. Then, a plasma gas and a reaction gas are provided into the reaction chamber to form an ITO layer on the substrate. The reaction gas comprises at least hydrogen having a volume ratio of 1%˜4% based on the total gas volume in the reaction chamber. Furthermore, a method of forming an indium tin oxide layer is also provided.
摘要翻译：提供氧化铟锡（ITO）的溅射工艺。溅射工艺包括以下步骤。首先，将基板移动到反应室中，其中ITO靶设置在反应室内。然后，将等离子体气体和反应气体提供到反应室中，以在基板上形成ITO层。反应气体至少包含基于反应室中的总气体体积的体积比为1％〜4％的氢。此外，还提供了形成氧化铟锡层的方法。

8. 发明申请

US20170138386A1 Recessed Head Screw 审中-公开
公开(公告)号：US20170138386A1
公开(公告)日：2017-05-18
申请号：US14940232
申请日：2015-11-13
申请人： Hung-I Hsu
发明人： Hung-I Hsu
IPC分类号： F16B23/00 , F16B25/10
CPC分类号： F16B23/0023 , F16B23/0015 , F16B23/003 , F16B23/0038 , F16B25/0015 , F16B25/106
摘要： A recessed head screw includes a shank, a head, a drilling portion and threads. The head includes a top face where a socket portion is formed. The socket portion has a driving recess and a driving socket formed between the driving recess and the top face. The driving socket communicates with the driving recess. A diameter value of the driving socket is a maximum circumscribed circle diameter value of the driving recess plus a value within 20% of the maximum circumscribed circle diameter value. When a driving tool engages the socket portion, the driving socket can be in close-fitting engagement with the driving tool to increase the engagement between the driving tool and the head and prevent the screw from falling off the tool easily during the driving action of the tool, thereby delivering a full driving force to the head to improve the working efficiency and smoothness.

9. 发明授权

US07807519B2 Method of forming thin film transistor 有权
标题翻译：薄膜晶体管的形成方法
公开(公告)号：US07807519B2
公开(公告)日：2010-10-05
申请号：US12146439
申请日：2008-06-25
申请人： Wen-Kuang Tsao , Hung-I Hsu
发明人： Wen-Kuang Tsao , Hung-I Hsu
IPC分类号： H01L21/336
CPC分类号： H01L29/4908 , H01L29/458
摘要： A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate and includes at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
摘要翻译：提供了包括栅极，栅极绝缘层，半导体层和源极/漏极的薄膜晶体管。栅极设置在衬底上并且包括至少一个钼 - 铌合金氮化物层。栅极绝缘层形成在衬底上以覆盖栅极。半导体层设置在栅极上方的栅绝缘层上。源极/漏极设置在半导体层上。

10. 发明申请

US20080261356A1 METHOD OF FORMING THIN FILM TRANSISTOR 有权
标题翻译：形成薄膜晶体管的方法
公开(公告)号：US20080261356A1
公开(公告)日：2008-10-23
申请号：US12146439
申请日：2008-06-25
申请人： Wen-Kuang Tsao , Hung-I Hsu
发明人： Wen-Kuang Tsao , Hung-I Hsu
IPC分类号： H01L21/336
CPC分类号： H01L29/4908 , H01L29/458
摘要： A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate and includes at least one molybdenum-niobium alloy nitride layer. The gate insulating layer is formed over the substrate to cover the gate. The semiconductor layer is disposed over the gate insulating layer above the gate. The source/drain is disposed over the semiconductor layer.
摘要翻译：提供了包括栅极，栅极绝缘层，半导体层和源极/漏极的薄膜晶体管。栅极设置在衬底上并且包括至少一个钼 - 铌合金氮化物层。栅极绝缘层形成在衬底上以覆盖栅极。半导体层设置在栅极上方的栅绝缘层上。源极/漏极设置在半导体层上。

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