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    • 1. 发明申请
    • INITIAL-ON SCR DEVICE FOR ON-CHIP ESD PROTECTION
    • 用于片上ESD保护的初始化SCR器件
    • US20130094113A1
    • 2013-04-18
    • US13707380
    • 2012-12-06
    • Industrial Technology Research Institute
    • Ming-Dou KerShih-Hung ChenKun-Hsien Lin
    • H01L23/62
    • H01L23/62H01L27/0262H01L2924/0002H01L2924/00
    • A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.
    • 一种用于静电放电(ESD)保护的半导体器件包括可控硅整流器(SCR),其包括半导体衬底,形成在衬底中的第一阱,在衬底中形成的第二阱,形成在第一阱中的第一p型区 用作阳极,以及部分地形成在第二阱中用作阴极的第一n型区域,形成在包括栅极的第一阱中的p型金属氧化物半导体(PMOS)晶体管,第一扩散层 区域和与第一扩散区域分离的第二扩散区域,形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。
    • 5. 发明授权
    • Initial-on SCR device on-chip ESD protection
    • 初始化SCR器件,用于片上ESD保护
    • US08842400B2
    • 2014-09-23
    • US13707380
    • 2012-12-06
    • Industrial Technology Research Institute
    • Ming-Dou KerShih-Hung ChenKun-Hsien Lin
    • H02H9/00H01L27/02H01L23/62
    • H01L23/62H01L27/0262H01L2924/0002H01L2924/00
    • A semiconductor device for electrostatic discharge (ESD) protection includes a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.
    • 一种用于静电放电(ESD)保护的半导体器件包括可控硅整流器(SCR),其包括半导体衬底,形成在衬底中的第一阱,形成在衬底中的第二阱,形成在第一阱中的第一p型区 用作阳极,以及部分地形成在第二阱中用作阴极的第一n型区域,形成在包括栅极的第一阱中的p型金属氧化物半导体(PMOS)晶体管,第一扩散层 区域和与第一扩散区域分离的第二扩散区域,形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。