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1. 发明授权

US11921632B2 Method and apparatus to use DRAM as a cache for slow byte-addressable memory for efficient cloud applications 有权
公开(公告)号：US11921632B2
公开(公告)日：2024-03-05
申请号：US17695788
申请日：2022-03-15
申请人： Intel Corporation
发明人： Yao Zu Dong , Kun Tian , Fengguang Wu , Jingqi Liu
IPC分类号： G06F12/08 , G06F3/06 , G06F12/0802
CPC分类号： G06F12/0802 , G06F3/0604 , G06F3/0647 , G06F3/0667 , G06F3/0673 , G06F2212/651
摘要： Various embodiments are generally directed to virtualized systems. A first guest memory page may be identified based at least in part on a number of accesses to a page table entry for the first guest memory page in a page table by an application executing in a virtual machine (VM) on the processor, the first guest memory page corresponding to a first byte-addressable memory. The execution of the VM and the application on the processor may be paused. The first guest memory page may be migrated to a target memory page in a second byte-addressable memory, the target memory page comprising one of a target host memory page and a target guest memory page, the second byte-addressable memory having an access speed faster than an access speed of the first byte-addressable memory.

2. 发明授权

US10929157B2 Techniques for checkpointing/delivery between primary and secondary virtual machines 有权
公开(公告)号：US10929157B2
公开(公告)日：2021-02-23
申请号：US16802110
申请日：2020-02-26
申请人： INTEL CORPORATION
发明人： Kun Tian , Yao Zu Dong
IPC分类号： G06F9/44 , G06F9/455 , G06F11/14
摘要： Examples may include a determining a policy for primary and secondary virtual machines based on output-packet-similarities. The output-packet-similarities may be based on a comparison of time intervals via which content matched for packets outputted from the primary and secondary virtual machines. A mode may then be selected based, at least in part, on the determined policy.

3. 发明授权

US10831625B2 Method and apparatus periodic snapshotting in a graphics processing environment 有权
公开(公告)号：US10831625B2
公开(公告)日：2020-11-10
申请号：US16080234
申请日：2016-04-01
申请人： Intel Corporation
发明人： Yao Zu Dong , Kun Tian
IPC分类号： G06F11/00 , G06F11/22 , G06F11/14 , G06F11/30 , G06F11/34
摘要： An apparatus and method performing debug and rollback operations using snapshots. For example, one embodiment of an apparatus comprises: a graphics processing unit (GPU) to perform graphics processing operations by executing graphics commands; a command parser to parse graphics commands submitted to the GPU and generate a list of graphics memory pages which will be affected by the graphics commands; an I/O state tracker to track I/O accesses from a graphics driver to determine a list of registers affected by the I/O accesses; snapshot circuitry and/or logic to perform a memory snapshot and I/O snapshot based on the list of graphics memory pages and the list of registers, respectively; and rollback circuitry and/or logic to perform a rollback operation using the memory snapshot and I/O snapshot in response to detecting a GPU error condition.

4. 发明授权

US09921868B2 Cooperated interrupt moderation for a virtualization environment 有权
公开(公告)号：US09921868B2
公开(公告)日：2018-03-20
申请号：US14930413
申请日：2015-11-02
申请人： Intel Corporation
发明人： Yao Zu Dong , Yunhong Jiang , Kun Tian
IPC分类号： G06F13/24 , G06F9/455 , G06F9/48 , H04L29/08 , G06F9/50
CPC分类号： G06F9/45558 , G06F9/45545 , G06F9/48 , G06F9/4812 , G06F9/5077 , G06F13/24 , G06F2009/45595 , G06F2213/2408 , H04L69/321
摘要： Generally, this disclosure describes systems (and methods) of moderating interrupts in a virtualization environment. An overflow interval is defined. The overflow interrupt interval is used to trigger activation of an inactive guest so that the guest may respond to a critical event. The guest, including a network application, may be active for a first time interval and inactive for a second time interval. A latency interrupt interval may be defined. The latency interrupt interval is configured for interrupt moderation when the network application associated with a packet flow is active, i.e., when the guest including the network application is active on a processor. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

5. 发明授权

US09824026B2 Apparatus and method for managing a virtual graphics processor unit (VGPU) 有权
公开(公告)号：US09824026B2
公开(公告)日：2017-11-21
申请号：US14780401
申请日：2014-12-23
申请人： Intel Corporation
发明人： Yao Zu Dong , Kun Tian
IPC分类号： G06F9/45 , G06F12/08 , G06F12/0808 , G06F12/0815 , G06F12/109 , G06F12/02 , G06F9/455 , G06F9/50 , G06T1/20 , G06T1/60
CPC分类号： G06F12/109 , G06F9/455 , G06F9/45533 , G06F9/45558 , G06F9/50 , G06F12/02 , G06F2009/45583 , G06F2212/657 , G06T1/20 , G06T1/60 , G06T2200/28
摘要： An apparatus and method are described for managing a virtual graphics processor unit (GPU). For example, one embodiment of an apparatus comprises: a dynamic addressing module to map portions of an address space required by the virtual machine to matching free address spaces of a host if such matching free address spaces are available, and to select non-matching address spaces for those portions of the address space required by the virtual machine which cannot be matched with free address spaces of the host; and a balloon module to perform address space ballooning (ASB) techniques for those portions of the address space required by the virtual machine which have been mapped to matching address spaces of the host; and address remapping logic to perform address remapping techniques for those portions of the address space required by the virtual machine which have not been mapped to matching address spaces of the host.

6. 发明授权

US09336040B2 Techniques for remapping sessions for a multi-threaded application 有权
标题翻译：重新映射多线程应用程序的技术
公开(公告)号：US09336040B2
公开(公告)日：2016-05-10
申请号：US14486270
申请日：2014-09-15
申请人： Intel Corporation
发明人： Yao Zu Dong , Kun Tian
IPC分类号： G06F9/455 , H04L29/08 , G06F9/54 , G06F9/44
CPC分类号： H04L67/148 , G06F9/451 , G06F9/45533 , G06F9/45558 , G06F9/466 , G06F9/541 , G06F11/3612 , G06F2009/4557 , H04L67/10 , H04L69/16
摘要： Examples may include a remapping of sessions for a multi-threaded application that may be executed at a server or a client coupled to the server via a plurality of transmit control protocol (TCP) connections. Sessions may be remapped such that the multi-threaded application may expect to route sessions through a same TCP connection but the sessions are actually outputted via separate TCP connections.
摘要翻译：示例可以包括可以在经由多个传输控制协议（TCP）连接耦合到服务器的服务器或客户机上执行的多线程应用的会话的重新映射。会话可以被重新映射，使得多线程应用可能期望通过相同的TCP连接路由会话，但是会话实际上是通过单独的TCP连接输出的。

7. 发明授权

US09098337B2 Scheduling virtual central processing units of virtual machines among physical processing units 有权
标题翻译：在物理处理单元之间调度虚拟机的虚拟中央处理单元
公开(公告)号：US09098337B2
公开(公告)日：2015-08-04
申请号：US13675669
申请日：2012-11-13
申请人： Intel Corporation
发明人： Yao Zu Dong , Kun Tian
IPC分类号： G06F9/455 , G06F9/46 , G06F9/50
CPC分类号： G06F9/5033 , G06F9/45558 , G06F2009/45562
摘要： Embodiments of apparatus, computer-implemented methods, systems, and computer-readable media are described herein for a virtual machine monitor. The virtual machine monitor may be configured to determine whether to schedule a virtual central processing unit of one of a plurality of virtual machines on a first physical processing unit of a plurality of physical processing units. Each virtual machine may have one or more virtual central processing units. The determination may be based at least in part on whether a context of the virtual central processing unit suggests a desired cache hit rate on one or more cache units of the apparatus by the first physical processing unit when operating the virtual central processing unit.
摘要翻译：这里描述了用于虚拟机监视器的装置，计算机实现的方法，系统和计算机可读介质的实施例。虚拟机监视器可以被配置为确定是否在多个物理处理单元的第一物理处理单元上调度多个虚拟机之一的虚拟中央处理单元。每个虚拟机可以具有一个或多个虚拟中央处理单元。该确定可以至少部分地基于在操作虚拟中央处理单元时虚拟中央处理单元的上下文是否由第一物理处理单元在设备的一个或多个高速缓存单元上建议期望的高速缓存命中率。

8. 发明授权

US11947991B2 Methods and apparatus to process commands from virtual machines 有权
公开(公告)号：US11947991B2
公开(公告)日：2024-04-02
申请号：US17845752
申请日：2022-06-21
申请人： Intel Corporation
发明人： Yao Zu Dong , Yuankai Guo , Haozhong Zhang , Kun Tian
IPC分类号： G06F9/455 , G06F13/16
CPC分类号： G06F9/45558 , G06F13/1668 , G06F2009/45579 , G06F2009/45583
摘要： A disclosed example includes accessing, by a backend block service driver in an input/output virtual machine executing on one or more processors, a first command submitted to a buffer by a paravirtualized input/output frontend block driver executing in a guest virtual machine; generating, by the backend block service driver, a translated command based on the first command by translating a virtual parameter of the first command to a physical parameter associated with a physical resource; submitting, by the backend block service driver, the translated command to an input/output queue to be processed by the physical resource based on the physical parameter; and submitting, by the backend block service driver, a completion status entry to the buffer, the completion status entry indicative of completion of a direct memory access operation that copies data between the physical resource and a guest memory buffer corresponding to the guest virtual machine.

9. 发明申请

US20220171704A1 AVOIDANCE OF GARBAGE COLLECTION IN HIGH PERFORMANCE MEMORY MANAGEMENT SYSTEMS 有权
公开(公告)号：US20220171704A1
公开(公告)日：2022-06-02
申请号：US17598190
申请日：2019-05-31
申请人： INTEL CORPORATION
发明人： Yao Zu Dong , Qiming Shi , Chao Xie , Bin Yang , Zhen Zhou
IPC分类号： G06F12/02 , G06F9/54
摘要： Systems, apparatuses and methods may provide for technology that detects a creation of a thread, dedicates a memory region to objects associated with the thread, and conducts a reclamation of the memory region in response to a termination of the thread. In one example, the memory region is a heap region and the reclamation bypasses at least a pause phase and a copy phase of a garbage collection process with respect to the heap region.

10. 发明授权

US11297163B2 Scenario profile based partitioning and management of application code 有权
公开(公告)号：US11297163B2
公开(公告)日：2022-04-05
申请号：US16973856
申请日：2019-01-17
申请人： INTEL CORPORATION
发明人： Shoumeng Yan , Xiao Dong Lin , Yao Zu Dong , Zhen Zhou , Bin Yang
IPC分类号： H04L67/00 , H04L67/04 , H04L67/50
摘要： Method, systems and apparatuses may provide for technology that divides an application into a plurality of portions that are each associated with one or more functions of the application and determine a plurality of transition probabilities between the plurality of portions. Some technology may also receive at least a first portion of the plurality of portions, and receive a relation file indicating the plurality of transition probabilities between the plurality of portions.

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