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1. 发明授权

US10248749B2 Automated attribute propagation and hierarchical consistency checking for non-standard extensions 有权
公开(公告)号：US10248749B2
公开(公告)日：2019-04-02
申请号：US15897655
申请日：2018-02-15
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Robert M. Averill, III , Erwin Behnen , David S. Wolpert
IPC分类号： G06F9/455 , G06F17/50
摘要： Examples of techniques for automated attribute propagation and hierarchical consistency checking are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: detecting, by a processor, a non-standard extension during convergence of an integrated circuit logic design; propagating, by the processor, the non-standard extension to each level of a plurality of hierarchies of the integrated circuit design for which a net utilizes a special constraint; and verifying, by the processor, a hierarchy consistency across each level of the plurality of hierarchies.

2. 发明申请

US20140101629A1 EARLY DESIGN CYCLE OPTIMZATION 有权
标题翻译：早期设计周期优化
公开(公告)号：US20140101629A1
公开(公告)日：2014-04-10
申请号：US14100553
申请日：2013-12-09
申请人： International Business Machines Corporation
发明人： Charles Jay Alpert , Robert M. Averill, III , Zhuo Li , Jose L. P. Neves , Stephen T. Quay
IPC分类号： G06F17/50
CPC分类号： G06F17/505
摘要： Some example embodiments include a computer-implemented method for designing an integrated circuit. The computer-implemented method includes receiving a hierarchical network design for the integrated circuit, wherein the hierarchical design comprises a number of components that are coupled together. The computer-implemented method includes detecting that a component of the number of components has at least one of failed timing and incomplete timing based on a problem that comprises at least one of a missing assertion, one or more missing latches, a source driver having an input source slew that is greater than a source slew limit threshold, and a sink having an input sink slew that is greater than a sink slew limit threshold. The computer-implemented method includes replacing the component with a different component that is independent of the problem and testing others components of the number of components based on the different component.
摘要翻译：一些示例性实施例包括用于设计集成电路的计算机实现的方法。计算机实现的方法包括接收集成电路的分层网络设计，其中分层设计包括耦合在一起的多个组件。计算机实现的方法包括基于包括缺失断言，一个或多个缺失锁存器，源驱动程序中的至少一个的问题，检测组件数量的组件具有故障定时和不完整定时中的至少一个输入源电压大于源极限极限阈值，以及具有大于漏极极限极限阈值的输入接收器的接收器。计算机实现的方法包括使用独立于问题的不同组件替换组件，并且基于不同的组件测试组件数量的其他组件。

3. 发明申请

US20180173817A1 AUTOMATED ATTRIBUTE PROPAGATION AND HIERARCHICAL CONSISTENCY CHECKING FOR NON-STANDARD EXTENSIONS 审中-公开
公开(公告)号：US20180173817A1
公开(公告)日：2018-06-21
申请号：US15897655
申请日：2018-02-15
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Robert M. Averill, III , Erwin Behnen , David S. Wolpert
IPC分类号： G06F17/50
CPC分类号： G06F17/504 , G06F17/5036 , G06F17/5045
摘要： Examples of techniques for automated attribute propagation and hierarchical consistency checking are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: detecting, by a processor, a non-standard extension during convergence of an integrated circuit logic design; propagating, by the processor, the non-standard extension to each level of a plurality of hierarchies of the integrated circuit design for which a net utilizes a special constraint; and verifying, by the processor, a hierarchy consistency across each level of the plurality of hierarchies.

4. 发明申请

US20180046741A1 AUTOMATED ATTRIBUTE PROPAGATION AND HIERARCHICAL CONSISTENCY CHECKING FOR NON-STANDARD EXTENSIONS 有权
公开(公告)号：US20180046741A1
公开(公告)日：2018-02-15
申请号：US15234250
申请日：2016-08-11
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Robert M. Averill, III , Erwin Behnen , David S. Wolpert
IPC分类号： G06F17/50
CPC分类号： G06F17/504 , G06F17/5045
摘要： Examples of techniques for automated attribute propagation and hierarchical consistency checking are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: detecting, by a processor, a non-standard extension during convergence of an integrated circuit logic design; propagating, by the processor, the non-standard extension to each level of a plurality of hierarchies of the integrated circuit design for which a net utilizes a special constraint; and verifying, by the processor, a hierarchy consistency across each level of the plurality of hierarchies.

5. 发明授权

US09038009B2 Early design cycle optimization 有权
标题翻译：早期设计周期优化
公开(公告)号：US09038009B2
公开(公告)日：2015-05-19
申请号：US14100553
申请日：2013-12-09
申请人： International Business Machines Corporation
发明人： Charles Jay Alpert , Robert M. Averill, III , Zhuo Li , Jose L. P. Neves , Stephen T. Quay
IPC分类号： G06F17/50
CPC分类号： G06F17/505
摘要： Some example embodiments include a computer-implemented method for designing an integrated circuit. The computer-implemented method includes receiving a hierarchical network design for the integrated circuit, wherein the hierarchical design comprises a number of components that are coupled together. The computer-implemented method includes detecting that a component of the number of components has at least one of failed timing and incomplete timing based on a problem that comprises at least one of a missing assertion, one or more missing latches, a source driver having an input source slew that is greater than a source slew limit threshold, and a sink having an input sink slew that is greater than a sink slew limit threshold. The computer-implemented method includes replacing the component with a different component that is independent of the problem and testing others components of the number of components based on the different component.
摘要翻译：一些示例性实施例包括用于设计集成电路的计算机实现的方法。计算机实现的方法包括接收集成电路的分层网络设计，其中分层设计包括耦合在一起的多个组件。计算机实现的方法包括基于包括缺失断言，一个或多个缺失锁存器，源驱动程序中的至少一个的问题，检测组件数量的组件具有故障定时和不完整定时中的至少一个输入源电压大于源极限极限阈值，以及具有大于漏极极限极限阈值的输入接收器的接收器。计算机实现的方法包括使用独立于问题的不同组件替换组件，并且基于不同的组件测试组件数量的其他组件。

6. 发明授权

US10223487B2 Automated attribute propagation and hierarchical consistency checking for non-standard extensions 有权
公开(公告)号：US10223487B2
公开(公告)日：2019-03-05
申请号：US15430864
申请日：2017-02-13
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Robert M. Averill, III , Erwin Behnen , David S. Wolpert
IPC分类号： G06F9/455 , G06F17/50
摘要： Examples of techniques for automated attribute propagation and hierarchical consistency checking are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: detecting, by a processor, a non-standard extension during convergence of an integrated circuit logic design; propagating, by the processor, the non-standard extension to each level of a plurality of hierarchies of the integrated circuit design for which a net utilizes a special constraint; and verifying, by the processor, a hierarchy consistency across each level of the plurality of hierarchies.

7. 发明申请

US20180075171A1 AUTOMATED ATTRIBUTE PROPAGATION AND HIERARCHICAL CONSISTENCY CHECKING FOR NON-STANDARD EXTENSIONS 有权
公开(公告)号：US20180075171A1
公开(公告)日：2018-03-15
申请号：US15814447
申请日：2017-11-16
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Robert M. Averill, III , Erwin Behnen , David S. Wolpert
IPC分类号： G06F17/50
CPC分类号： G06F17/504 , G06F17/5045
摘要： Examples of techniques for automated attribute propagation and hierarchical consistency checking are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: detecting, by a processor, a non-standard extension during convergence of an integrated circuit logic design; propagating, by the processor, the non-standard extension to each level of a plurality of hierarchies of the integrated circuit design for which a net utilizes a special constraint; and verifying, by the processor, a hierarchy consistency across each level of the plurality of hierarchies.

8. 发明授权

US09892222B1 Automated attribute propagation and hierarchical consistency checking for non-standard extensions 有权
公开(公告)号：US09892222B1
公开(公告)日：2018-02-13
申请号：US15234250
申请日：2016-08-11
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Robert M. Averill, III , Erwin Behnen , David S. Wolpert
IPC分类号： G06F9/455 , G06F17/50
CPC分类号： G06F17/504 , G06F17/5045
摘要： Examples of techniques for automated attribute propagation and hierarchical consistency checking are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: detecting, by a processor, a non-standard extension during convergence of an integrated circuit logic design; propagating, by the processor, the non-standard extension to each level of a plurality of hierarchies of the integrated circuit design for which a net utilizes a special constraint; and verifying, by the processor, a hierarchy consistency across each level of the plurality of hierarchies.

9. 发明申请

US20140195998A1 Automatic Generation of Wire Tag Lists for a Metal Stack 有权
公开(公告)号：US20140195998A1
公开(公告)日：2014-07-10
申请号：US13737231
申请日：2013-01-09
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Charles J. Alpert , Robert M. Averill, III , Eric J. Fluhr , Zhuo Li , Tuhin Mahmud , Jose L.P. Neves , Stephen T. Quay , Chin Ngai Sze , Yaoguang Wei
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F17/505
摘要： Mechanisms are provided for pruning a layer trait library for use in wire routing in an integrated circuit design process. The mechanisms receive a plurality of wirecodes and a metal stack definition. The mechanisms generate a verbose layer trait library based on all possible combinations of the wirecodes and layers of the metal stack definition. The mechanisms generate a pruned layer trait library by pruning the verbose layer trait library to remove redundant layer traits from the verbose layer trait library. In addition, the mechanisms store the pruned layer trait library for performing wire routing of an integrated circuit design.

10. 发明授权

US09977851B2 Automated attribute propagation and hierarchical consistency checking for non-standard extensions 有权
公开(公告)号：US09977851B2
公开(公告)日：2018-05-22
申请号：US15814447
申请日：2017-11-16
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Robert M. Averill, III , Erwin Behnen , David S. Wolpert
IPC分类号： G06F9/455 , G06F17/50
CPC分类号： G06F17/504 , G06F17/5045
摘要： Examples of techniques for automated attribute propagation and hierarchical consistency checking are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: detecting, by a processor, a non-standard extension during convergence of an integrated circuit logic design; propagating, by the processor, the non-standard extension to each level of a plurality of hierarchies of the integrated circuit design for which a net utilizes a special constraint; and verifying, by the processor, a hierarchy consistency across each level of the plurality of hierarchies.

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