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1. 发明授权

US10355087B2 Semiconductor device including a transistor with a gate dielectric having a variable thickness 有权
公开(公告)号：US10355087B2
公开(公告)日：2019-07-16
申请号：US15062370
申请日：2016-03-07
申请人： Infineon Technologies AG
发明人： Martin Vielemeyer , Andreas Meiser , Till Schloesser , Franz Hirler , Martin Poelzl
IPC分类号： H01L29/10 , H01L29/78 , H01L29/66 , H01L21/28 , H01L29/40 , H01L29/417 , H01L29/423 , H01L21/265
摘要： A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. The gate electrode is disposed adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the main surface between the source region and the drain region. The gate dielectric has a thickness that varies at different positions of the gate electrode.

2. 发明授权

US09960156B2 Integrated semiconductor device having a level shifter 有权
公开(公告)号：US09960156B2
公开(公告)日：2018-05-01
申请号：US14795207
申请日：2015-07-09
申请人： Infineon Technologies AG
发明人： Franz Hirler , Andreas Meiser , Steffen Thiele
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L27/088 , H01L21/336 , H01L21/70 , H01L27/06 , H01L27/082 , H01L29/423 , H01L23/48 , H01L23/528 , H01L29/10 , H01L29/739 , H03K17/687 , H03K19/0185 , H01L29/40 , H01L29/732 , H01L29/735 , H01L29/78 , H01L29/06
CPC分类号： H01L27/0623 , H01L23/481 , H01L23/528 , H01L27/0826 , H01L27/088 , H01L29/0634 , H01L29/1095 , H01L29/402 , H01L29/42372 , H01L29/7327 , H01L29/735 , H01L29/7395 , H01L29/7802 , H01L29/781 , H01L29/7811 , H01L29/7813 , H01L29/7824 , H01L2924/0002 , H03K17/687 , H03K19/018507 , H03K2217/0063 , H03K2217/0072 , H03K2217/0081 , H01L2924/00
摘要： An integrated semiconductor device is provided. According to an embodiment, the integrated semiconductor device includes a semiconductor body having a first surface with a normal direction defining a vertical direction, an opposite surface, a first area including a vertical power field-effect transistor structure, a second area including a three-terminal step-down level-shifter, and a third area including a three-terminal step-up level-shifter. A terminal of the vertical power field-effect transistor structure is electrically connected with one of the three-terminal step-down level-shifter and the three-terminal step-up level-shifter.

3. 发明授权

US09947648B2 Semiconductor device including a diode at least partly arranged in a trench 有权
公开(公告)号：US09947648B2
公开(公告)日：2018-04-17
申请号：US15189031
申请日：2016-06-22
申请人： Infineon Technologies AG
发明人： Joachim Weyers , Anton Mauder , Franz Hirler , Andreas Meiser , Ulrich Glaser
IPC分类号： H01L27/02 , H01L27/06 , H01L27/08 , H01L29/40 , H01L29/861 , H01L29/872
CPC分类号： H01L27/0255 , H01L27/06 , H01L27/0814 , H01L29/407 , H01L29/861 , H01L29/8611 , H01L29/8725
摘要： A semiconductor device includes a semiconductor body including a first trench extending into the semiconductor body from a first surface and a diode including an anode region and a cathode region. One of the anode region and the cathode region is at least partly arranged in the first trench. The other one of the anode region and the cathode region includes a first semiconductor region directly adjoining the one of the anode region and the cathode region from outside of the first trench, thereby constituting a pn junction. The semiconductor device further includes a conducting path through a sidewall of the first trench.

4. 发明授权

US09754859B2 Semiconductor device 有权
公开(公告)号：US09754859B2
公开(公告)日：2017-09-05
申请号：US14037057
申请日：2013-09-25
申请人： Infineon Technologies AG
发明人： Walter Rieger , Franz Hirler , Martin Poelzl , Manfred Kotek
IPC分类号： H01L29/732 , H01L23/48 , H01L21/768 , H01L23/485
CPC分类号： H01L23/481 , H01L21/76838 , H01L21/76895 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate, a doped zone, a polysilicon layer and an elongate plug structure. The doped zone is within the semiconductor substrate. The polysilicon layer is disposed in a trench electrically isolated from the semiconductor substrate by an insulating layer. The elongate plug structure extends in a lateral direction in or above the semiconductor substrate. The elongate plug structure provides electrical connection between the doped zone and the polysilicon layer.

5. 发明授权

US09559167B2 Semiconductor component with dynamic behavior 有权
标题翻译：具有动态行为的半导体元件
公开(公告)号：US09559167B2
公开(公告)日：2017-01-31
申请号：US15004467
申请日：2016-01-22
申请人： Infineon Technologies AG
发明人： Markus Zundel , Franz Hirler
IPC分类号： H01L29/08 , H01L29/40 , H01L29/423 , H01L29/739 , H01L29/78 , H01L29/861 , H01L29/10 , H01L29/66
CPC分类号： H01L29/7802 , H01L29/0878 , H01L29/1045 , H01L29/1095 , H01L29/404 , H01L29/407 , H01L29/4236 , H01L29/42368 , H01L29/66734 , H01L29/7397 , H01L29/7809 , H01L29/7813 , H01L29/7827 , H01L29/861
摘要： One embodiment provides a semiconductor component including a semiconductor body having a first side and a second side and a drift zone; a first semiconductor zone doped complementarily to the drift zone and adjacent to the drift zone in a direction of the first side; a second semiconductor zone of the same conduction type as the drift zone adjacent to the drift zone in a direction of the second side; at least two trenches arranged in the semiconductor body and extending into the semiconductor body and arranged at a distance from one another; and a field electrode arranged in the at least two trenches adjacent to the drift zone. The at least two trenches are arranged at a distance from the second semiconductor zone in the vertical direction, a distance between the trenches and the second semiconductor zone is greater than 1.5 times the mutual distance between the trenches, and a doping concentration of the drift zone in a section between the trenches and the second semiconductor zone differs by at most 35% from a minimum doping concentration in a section between the trenches.
摘要翻译：一个实施例提供了包括具有第一侧和第二侧以及漂移区的半导体本体的半导体部件; 与所述漂移区域互补地并且在所述第一侧的方向上与所述漂移区域相邻地掺杂的第一半导体区域; 与所述漂移区相邻的所述漂移区与所述第二侧方向相同的导电类型的第二半导体区; 至少两个沟槽布置在半导体本体中并延伸到半导体本体中并且彼此间隔一定距离; 以及设置在与漂移区相邻的至少两个沟槽中的场电极。所述至少两个沟槽在垂直方向上与所述第二半导体区域一定距离地布置，所述沟槽和所述第二半导体区域之间的距离大于所述沟槽之间的相互距离的1.5倍，并且所述漂移区域的掺杂浓度在沟槽和第二半导体区域之间的区段中，在沟槽之间的截面中与最小掺杂浓度相差至多35％。

6. 发明申请

US20160380063A1 Method for Producing a Semiconductor Component with Insulated Semiconductor Mesas in a Semiconductor Body 审中-公开
标题翻译：用于在半导体本体中制造具有绝缘半导体板的半导体部件的方法
公开(公告)号：US20160380063A1
公开(公告)日：2016-12-29
申请号：US15189147
申请日：2016-06-22
申请人： Infineon Technologies AG
发明人： Franz Hirler , Anton Mauder , Hermann Gruber , Hubert Rothleitner , Andreas Peter Meiser
IPC分类号： H01L29/40
CPC分类号： H01L29/407 , H01L21/76224 , H01L21/76898 , H01L21/823481 , H01L23/481 , H01L24/16 , H01L27/088 , H01L29/0653 , H01L29/401 , H01L29/402 , H01L29/408 , H01L29/41741 , H01L29/42372 , H01L29/4238 , H01L29/456 , H01L29/66734 , H01L29/7397 , H01L29/7803 , H01L29/7804 , H01L29/7808 , H01L29/7811 , H01L29/7813 , H01L2224/16245 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01068 , H01L2924/01074 , H01L2924/12035 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/00
摘要： A method for producing a semiconductor component is provided. The method includes providing a semiconductor body with a first surface and a second surface opposite to the first surface, etching an insulation trench from the first surface partially into the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, processing the second surface by at least one of grinding, polishing and a CMP-process to expose the first insulation layer, and depositing on the processed second surface a second insulation layer which extends to the first insulation layer.
摘要翻译：提供一种半导体元件的制造方法。该方法包括：提供具有与第一表面相对的第一表面和第二表面的半导体本体，将绝缘沟槽从第一表面部分地蚀刻到半导体本体中，在绝缘沟槽的一个或多个侧壁上形成第一绝缘层，通过研磨，抛光和CMP工艺中的至少一个来处理第二表面以暴露第一绝缘层，以及在经处理的第二表面上沉积延伸到第一绝缘层的第二绝缘层。

7. 发明授权

US09484410B2 Lateral MOS power transistor having front side drain electrode and back side source electrode 有权
标题翻译：侧面MOS功率晶体管，具有前侧漏电极和背侧源电极
公开(公告)号：US09484410B2
公开(公告)日：2016-11-01
申请号：US14642638
申请日：2015-03-09
申请人： Infineon Technologies AG
发明人： Oliver Haeberlen , Franz Hirler , Maximilian Roesch
IPC分类号： H01L29/10 , H01L29/417 , H01L29/78 , H01L29/861 , H01L29/06 , H01L29/40
CPC分类号： H01L29/1045 , H01L29/0626 , H01L29/0649 , H01L29/0653 , H01L29/1095 , H01L29/402 , H01L29/4175 , H01L29/41775 , H01L29/7816 , H01L29/7824 , H01L29/7833 , H01L29/7835 , H01L29/8611
摘要： A semiconductor component may include a semiconductor layer which has a front side and a back side, a first terminal electrode on the front side, a second terminal electrode on the back side, a first dopant region of a first conduction type on the front side, which is electrically connected to one of the terminal electrodes, a second dopant region of a second conduction type in the semiconductor layer, which is electrically connected to the other terminal electrode, a pn junction being formed between the first and second dopant regions, a dielectric layer on the back side between the semiconductor layer and the second terminal electrode, and the dielectric layer having an opening through which an electrical connection between the second terminal electrode and the first or second dopant region is passed.
摘要翻译：半导体部件可以包括具有前侧和后侧的半导体层，前侧的第一端子电极，背面侧的第二端子电极，前侧的第一导电型的第一掺杂剂区域，其电连接到一个端子电极，在半导体层中的第二导电类型的第二掺杂区域，其电连接到另一个端子电极，在第一和第二掺杂剂区域之间形成pn结，电介质在所述半导体层和所述第二端子电极之间的背侧上形成层，并且所述电介质层具有通过所述第二端子电极和所述第一或第二掺杂剂区域之间的电连接的开口。

8. 发明申请

US20160307885A1 Semiconductor Device Including a Diode at Least Partly Arranged in a Trench 有权
标题翻译：包括二极管的半导体器件至少部分安排在沟槽中
公开(公告)号：US20160307885A1
公开(公告)日：2016-10-20
申请号：US15189031
申请日：2016-06-22
申请人： Infineon Technologies AG
发明人： Joachim Weyers , Anton Mauder , Franz Hirler , Andreas Meiser , Ulrich Glaser
IPC分类号： H01L27/02 , H01L29/40 , H01L29/872
CPC分类号： H01L27/0255 , H01L27/06 , H01L27/0814 , H01L29/407 , H01L29/861 , H01L29/8611 , H01L29/8725
摘要： A semiconductor device includes a semiconductor body including a first trench extending into the semiconductor body from a first surface and a diode including an anode region and a cathode region. One of the anode region and the cathode region is at least partly arranged in the first trench. The other one of the anode region and the cathode region includes a first semiconductor region directly adjoining the one of the anode region and the cathode region from outside of the first trench, thereby constituting a pn junction. The semiconductor device further includes a conducting path through a sidewall of the first trench.
摘要翻译：半导体器件包括半导体本体，其包括从第一表面延伸到半导体本体中的第一沟槽和包括阳极区域和阴极区域的二极管。阳极区域和阴极区域中的一个至少部分地布置在第一沟槽中。阳极区域和阴极区域中的另一个包括从第一沟槽的外部直接邻接阳极区域和阴极区域中的一个的第一半导体区域，从而构成pn结。半导体器件还包括穿过第一沟槽的侧壁的导电路径。

9. 发明授权

US09299834B2 Trench connection between a transistor and a further component 有权
标题翻译：晶体管与另一组件之间的沟槽连接
公开(公告)号：US09299834B2
公开(公告)日：2016-03-29
申请号：US13933047
申请日：2013-07-01
申请人： Infineon Technologies AG
发明人： Markus Zundel , Franz Hirler , Norbert Krischke
IPC分类号： H01L29/76 , H01L29/78 , H01L21/74 , H01L27/07 , H01L29/40 , H01L29/417 , H01L29/66 , H01L29/94 , H01L49/02 , H01L29/06
CPC分类号： H01L29/7827 , H01L21/743 , H01L27/0733 , H01L28/40 , H01L29/0696 , H01L29/0878 , H01L29/407 , H01L29/41766 , H01L29/66734 , H01L29/7803 , H01L29/7804 , H01L29/7809 , H01L29/7813 , H01L29/7816 , H01L29/945
摘要： A semiconductor component arrangement includes a semiconductor body, a transistor structure, a further component, and at least a first electrode structure. The semiconductor body has a first side and a second side. The transistor structure is integrated in the semiconductor body, and includes a source and a drain. The further component is also integrated in the semiconductor body. The first electrode structure is disposed in at least a first trench, and includes at least one electrode. The first electrode structure electrically connects at least one of the source and the drain to the further component.
摘要翻译：半导体元件布置包括半导体本体，晶体管结构，另外的元件以及至少第一电极结构。半导体本体具有第一面和第二面。晶体管结构集成在半导体本体中，并且包括源极和漏极。另外的部件也集成在半导体本体中。第一电极结构设置在至少第一沟槽中，并且包括至少一个电极。第一电极结构将源极和漏极中的至少一个电连接到另一个部件。

10. 发明授权

US09269592B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09269592B2
公开(公告)日：2016-02-23
申请号：US14464849
申请日：2014-08-21
申请人： Infineon Technologies AG
发明人： Andreas Meiser , Franz Hirler , Christian Kampen
IPC分类号： H01L21/383 , H01L29/78 , H01L29/40 , H01L29/66
CPC分类号： H01L21/383 , H01L29/402 , H01L29/407 , H01L29/66803 , H01L29/7816 , H01L29/785
摘要： A transistor is formed by forming a ridge including a first ridge portion and a second ridge portion in a semiconductor substrate, the ridge extending along a first direction, forming a source region, a drain region, a channel region, a drain extension region and a gate electrode adjacent to the channel region, in the ridge, doping the channel region with dopants of a first conductivity type, and doping the source region and the drain region with dopants of a second conductivity type. Forming the drain extension region includes forming a core portion doped with the first conductivity type in the second ridge portion, and forming the drain extension region further includes forming a cover portion doped with the second conductivity type, the cover portion being formed so as to be adjacent to at least one or two sidewalls of the second ridge portion.
摘要翻译：晶体管通过在半导体衬底中形成包括第一脊部分和第二脊部分的脊而形成，所述脊部沿着第一方向延伸，形成源极区域，漏极区域，沟道区域，漏极延伸区域和栅极与沟道区相邻，在脊中，掺杂具有第一导电类型的掺杂剂的沟道区，并用第二导电类型的掺杂剂掺杂源区和漏区。形成漏极延伸区域包括在第二脊部中形成掺杂有第一导电类型的芯部分，并且形成漏极延伸区域还包括形成掺杂有第二导电类型的覆盖部分，盖部分形成为邻近第二脊部分的至少一个或两个侧壁。

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