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1. 发明申请

US20210271426A1 SHARED MEMORY MECHANISM TO SUPPORT FAST TRANSPORT OF SQ/CQ PAIR COMMUNICATION BETWEEN SSD DEVICE DRIVER IN VIRTUALIZATION ENVIRONMENT AND PHYSICAL SSD 有权
公开(公告)号：US20210271426A1
公开(公告)日：2021-09-02
申请号：US17253578
申请日：2019-01-31
申请人： Intel Corporation
发明人： Gang CAO , Ziye YANG , Xiaodong LIU , Changpeng LIU
IPC分类号： G06F3/06 , G06F9/455 , G06F9/48
摘要： An apparatus is described. The apparatus includes an accelerator to be coupled to a memory region that the accelerator shares with a virtualization environment comprising a guest OS, a guest VM and an SSD device driver. The accelerator is to forward a submission queue doorbell setting made by the SSD device driver in the shared memory to a corresponding submission queue doorbell in an SSD controller.

2. 发明申请

US20230130859A1 NETWORK INTERFACE WITH INTELLIGENCE TO BUILD NULL BLOCKS FOR UN-MAPPABLE LOGICAL BLOCK ADDRESSES 有权
公开(公告)号：US20230130859A1
公开(公告)日：2023-04-27
申请号：US17894041
申请日：2022-08-23
申请人： Intel Corporation
发明人： Xiaodong LIU , Ziye YANG , James R. HARRIS , Changpeng LIU , Gang CAO
IPC分类号： G06F12/0811 , G06F12/0873
摘要： An apparatus is described. The apparatus includes a network interface having a system interface, a media access interface and circuitry to construct a block of null values for a logical block address (LBA) in response to a remote storage system having informed the network interface that the LBA was un-mappable.

3. 发明申请

US20210089236A1 NETWORK DEVICE INTERMEDIARY FOR MEMORY ACCESS REQUESTS 有权
公开(公告)号：US20210089236A1
公开(公告)日：2021-03-25
申请号：US17112235
申请日：2020-12-04
申请人： Intel Corporation
发明人： Ziye YANG , Shaopeng HE , Changpeng LIU , Xiaodong LIU
IPC分类号： G06F3/06
摘要： Examples described herein relate to receiving memory access requests in a first number of connections from one or more front-end clients destined to a storage system and consolidating the memory access requests to a second number of connections between a network device and the storage system, wherein the second number is less than the first number. In some examples, consolidating the memory access requests includes combining read commands with other read commands destined to the storage system among connections of the first number of connections and combining write commands with other write commands destined to a same storage system among connections of the first number of connections. In some examples, consolidating the memory access requests includes performing protocol conversion to a format accepted by the storage system. In some examples, read or write commands are identified based on content of a header of a received packet, wherein the received packet includes a read or write command.

4. 发明申请

US20210072927A1 COMPUTER PROGRAM PRODUCT, SYSTEM, AND METHOD TO MANAGE ACCESS TO STORAGE RESOURCES FROM MULTIPLE APPLICATIONS 有权
公开(公告)号：US20210072927A1
公开(公告)日：2021-03-11
申请号：US16643470
申请日：2017-09-27
申请人： INTEL CORPORATION
发明人： Ziye YANG , Gang CAO , Cunyin CHANG , Changpeng LIU , James HARRIS
IPC分类号： G06F3/06 , G06F9/50
摘要： A computer program product, system, and method to manage access to storage resources from multiple applications. A plurality of virtual controllers is generated in a host memory space. Each virtual controller includes at least one virtual namespace that maps to a physical namespace in a physical controller. Applications are assigned to the virtual controllers. For each application of the applications assigned one of the virtual controllers, a virtual submission queue is generated to communicate with the virtual controller assigned to the application. An Input/Output (I/O) request to a target virtual namespace in one of the virtual submission queues is added to a physical submission queue for the physical controller having the physical namespace for which the target virtual namespace was generated.

5. 发明申请

US20200319812A1 INTERMEDIARY FOR STORAGE COMMAND TRANSFERS 审中-公开
公开(公告)号：US20200319812A1
公开(公告)日：2020-10-08
申请号：US16909693
申请日：2020-06-23
申请人： Intel Corporation
发明人： Shaopeng HE , Yadong LI , Ziye YANG , Changpeng LIU , Banghao YING , Robert O. SHARP
IPC分类号： G06F3/06
摘要： Examples described herein relate to accessing an initiator as a Non-Volatile Memory Express (NMVe) device. In some examples, the initiator is configured with an address space, configured in kernel or user space, for access by a virtualized execution environment. In some examples, the initiator to copy one or more storage access commands from the virtualized execution environment into a queue for access by a remote direct memory access (RDMA) compatible network interface. In some examples, the network interface to provide Non-Volatile Memory Express over Fabrics (NVMe-oF) compatible commands based on the one or more storage access commands to a target storage device. In some examples, the initiator is created as a mediated device in kernel space or user space of a host system. In some examples, configuration of a physical storage pool address of the target storage device for access by the virtualized execution environment occurs by receipt of the physical storage pool address in a configuration command. In some examples, configuration of the target storage device for access by the virtualized execution environment occurs by receipt of a storage pool internal NVMe Qualified Name in the configuration command.

6. 发明申请

US20230053744A1 RELIABLE TRANSPORT OFFLOADED TO NETWORK DEVICES 有权
公开(公告)号：US20230053744A1
公开(公告)日：2023-02-23
申请号：US17981255
申请日：2022-11-04
申请人： Intel Corporation
发明人： Shaopeng HE , Cunming LIANG , Jiang YU , Ziye YANG , Ping YU , Bo CUI , Jingjing WU , Liang MA , Hongjun NI , Zhiguo WEN , Changpeng LIU , Anjali Singhai JAIN , Daniel DALY , Yadong LI
IPC分类号： H04L49/9057 , H04L47/56 , H04L47/34 , H04L1/18 , H04L49/552
摘要： Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.

7. 发明申请

US20220247696A1 RELIABLE TRANSPORT OFFLOADED TO NETWORK DEVICES 有权
公开(公告)号：US20220247696A1
公开(公告)日：2022-08-04
申请号：US17238893
申请日：2021-04-23
申请人： Intel Corporation
发明人： Shaopeng HE , Cunming LIANG , Jiang YU , Ziye YANG , Ping YU , Bo CUI , Jingjing WU , Liang MA , Hongjun NI , Zhiguo WEN , Changpeng LIU , Anjali Singhai JAIN , Daniel DALY , Yadong LI
IPC分类号： H04L12/861 , H04L12/875 , H04L12/939 , H04L12/801 , H04L1/18
摘要： Examples described herein relate to a reliable transport protocol for packet transmission using an Address Family of an eXpress Data Path (AF_XDP) queue framework, wherein the AF_XDP queue framework is to provide a queue for received packet receipt acknowledgements (ACKs). In some examples, an AF_XDP socket is to connect a service with a driver for the network device, one or more queues are associated with the AF_XDP socket, and at least one of the one or more queues comprises a waiting queue for received packet receipt ACKs. In some examples, at least one of the one or more queues is to identify one or more packets for which ACKs have been received. In some examples, the network device is to re-transmit a packet identified by a descriptor in the waiting queue based on non-receipt of an ACK associated with the packet from a receiver.

8. 发明申请

US20200218676A1 ADAPTIVE PROCESSOR RESOURCE UTILIZATION 审中-公开
公开(公告)号：US20200218676A1
公开(公告)日：2020-07-09
申请号：US16825538
申请日：2020-03-20
申请人： Intel Corporation
发明人： Gang CAO , James R. HARRIS , Ziye YANG , Vishal VERMA , Changpeng LIU , Chong HAN , Benjamin WALKER
IPC分类号： G06F13/16 , G06F9/50
摘要： Examples herein relate to polling for input/output transactions of a network interface or a storage device, or any peripheral device. Some examples monitor clock cycles spent checking for a presence of input/output (I/O) events and processing I/O events and monitor clock cycles spent checking for presence of I/O events without completing an I/O event. Central processing unit (CPU) core utilization can be based on clock cycles spent checking for a presence of I/O events and processing I/O events and clock cycles spent checking for presence of I/O events without completion of an I/O event. For example, if core utilization is below a threshold, frequency of the core can be reduced for performing polling of I/O events. If core utilization is at or above the threshold, frequency of the core can be increased used to performing polling of I/O events.

9. 发明申请

US20220365729A1 SHARED MEMORY MECHANISM TO SUPPORT FAST TRANSPORT OF SQ/CQ PAIR COMMUNICATION BETWEEN SSD DEVICE DRIVER IN VIRTUALIZATION ENVIRONMENT AND PHYSICAL SSD 有权
公开(公告)号：US20220365729A1
公开(公告)日：2022-11-17
申请号：US17874237
申请日：2022-07-26
申请人： Intel Corporation
发明人： Gang CAO , Ziye YANG , Xiaodong LIU , Changpeng LIU
IPC分类号： G06F3/06 , G06F9/455 , G06F9/48
摘要： An apparatus is described. The apparatus includes an accelerator to be coupled to a memory region that the accelerator shares with a virtualization environment comprising a guest OS, a guest VM and an SSD device driver. The accelerator is to forward a submission queue doorbell setting made by the SSD device driver in the shared memory to a corresponding submission queue doorbell in an SSD controller.

10. 发明申请

US20210243247A1 SERVICE MESH OFFLOAD TO NETWORK DEVICES 有权
公开(公告)号：US20210243247A1
公开(公告)日：2021-08-05
申请号：US17238960
申请日：2021-04-23
申请人： Intel Corporation
发明人： Shaopeng HE , Cunming LIANG , Haitao KANG , Hongjun NI , Jiang YU , Ziye YANG , Anjali Singhai JAIN , Daniel DALY , Yadong LI , Ping YU , Bo CUI , Jingjing WU , Liang MA , Changpeng LIU
IPC分类号： H04L29/08
摘要： Examples described herein relate to a switch comprising a programmable data plane pipeline, wherein the programmable data plane pipeline is configured to provide microservice-to-microservice communications within a service mesh. In some examples, to provide microservice-to-microservice communications within a service mesh, the programmable data plane pipeline is to perform a forwarding operation for a communication from a first microservice to a second microservice. In some examples, to perform a forwarding operation for a communication from a first microservice to a second microservice, the programmable data plane pipeline is to utilize a reliable transport protocol.

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