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1. 发明授权

US11444811B2 Interference mitigation 有权
公开(公告)号：US11444811B2
公开(公告)日：2022-09-13
申请号：US16834032
申请日：2020-03-30
申请人： Intel Corporation
发明人： Bernard Arambepola , Thushara Hewavithana
IPC分类号： H04L25/08 , H04B1/10 , H04L5/00 , H04L7/00 , H04L5/14 , H04L25/02 , H04L25/03
摘要： Symbols are received on a downstream channel. A value of a channel synchronization parameter is determined based on the received symbols. An interference event on the downstream channel is detected. In response to detecting the interference event: an output signal is determined based on at least one cached value of the channel synchronization parameter, the at least one cached value being determined based on symbols received prior to and offset from the detecting of the interference event.

2. 发明申请

US20210116531A1 RADAR APPARATUS, SYSTEM, AND METHOD OF GENERATING ANGLE OF ARRIVAL (AOA) INFORMATION 有权
公开(公告)号：US20210116531A1
公开(公告)日：2021-04-22
申请号：US17133924
申请日：2020-12-24
申请人： Intel Corporation
发明人： Ophir Shabtay , Joseph Tabrikian , Thushara Hewavithana
IPC分类号： G01S3/74 , G01S13/931 , G01S13/42 , G06K9/62
摘要： For example, a radar processor may be configured to determine a first 1D AoA spectrum corresponding to a first dimension of an Azimuth-Elevation domain based on radar Rx data, to determine a second 1D AoA spectrum corresponding to a second dimension of the Azimuth-Elevation domain based on the radar Rx data, to detect one or more first object hypotheses in the first dimension based on the first 1D AoA spectrum, to detect one or more second object hypotheses in the second dimension based on the second 1D AoA spectrum, to determine a plurality of 2D object hypotheses corresponding to the Azimuth-Elevation domain based on the first object hypotheses and the second object hypotheses, and to generate 2D AoA information based on a 2D AoA spectrum analysis of the radar Rx data according to the plurality of 2D object hypotheses.

3. 发明授权

US10826635B2 Synchronization of adaptive filter switching and channel equalization in full duplex (FDX) cable modems 有权
公开(公告)号：US10826635B2
公开(公告)日：2020-11-03
申请号：US16274645
申请日：2019-02-13
申请人： Intel Corporation
发明人： Nathan Goichberg , Shaul Shulman , Thushara Hewavithana
IPC分类号： H04L5/14 , H04J3/06 , H04L25/03 , H04L12/28 , H04L5/00
摘要： Synchronizing methods and architectures for cable modems to transmit and receive Full Duplex (FDX) resource block allocations (RBAs) using filter switching and coordinated updating of equalization coefficients. A cable modem including a block of switchable filters, an analog front end (AFE) and a PHY/MAC System on a Chip (SoC) tuner to, at least in part, provide signals to switch the switchable filters in accordance with the RBA changes and synchronize updating tuner equalizations to match filter switching in a coordinated manner by marking received data at the AFE.

4. 发明申请

US20200244505A1 CLOCK SYNCHRONIZATION AND OFDM SYMBOL TIMING SYNCHRONIZATION ALGORITHM AND ARCHITECTURE FOR DATA OVER CABLE SERVICE INTERFACE SPECIFICATION (DOCSIS) FULL DUPLEX (FDX) CABLE MODEM (CM) TO ENABLE FAST RECOVERY OF DOWNSTREAM CHANNELS FOLLOWING AN EXTENDED DOWNSTREAM FREEZE 审中-公开
公开(公告)号：US20200244505A1
公开(公告)日：2020-07-30
申请号：US16774349
申请日：2020-01-28
申请人： Intel Corporation
发明人： Thushara Hewavithana , Noam Tal , Boaz Kol , Murti Devarakonda
IPC分类号： H04L27/26 , H04L27/00 , H04L27/38
摘要： A modem circuit associated with a communication system is disclosed. The modem circuit comprises a symbol tracking circuit configured to track a symbol timing associated with a downstream (DS) channel associated with the modem circuit, in accordance with a timing offset estimate. In some embodiments, the timing offset estimate comprises a unified timing offset derived based on one or more external channels associated with the modem circuit that is different from the DS channel. The symbol tracking circuit is further configured to apply a sample rate correction to a DS signal associated with the DS channel, based on the timing offset estimate comprising the unified timing offset, and apply a frequency correction to the DS signal, based on a frequency offset estimate comprising a unified frequency offset derived based on the one or more external channels.

5. 发明授权

US10305714B2 Method and apparatus for frequency interleaving 有权
公开(公告)号：US10305714B2
公开(公告)日：2019-05-28
申请号：US15882156
申请日：2018-01-29
申请人： Intel Corporation
发明人： Bernard Arambepola , Parveen K. Shukla , Thushara Hewavithana , Sahan S. Gamage
IPC分类号： H04L27/00 , H04B7/02 , H04L27/26 , G06F12/00 , G06F7/76 , H03M13/27 , H04L1/00
摘要： The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.

6. 发明授权

US10171272B2 Computationally efficient algorithm for mitigating phase noise in OFDM receivers 有权
公开(公告)号：US10171272B2
公开(公告)日：2019-01-01
申请号：US15639196
申请日：2017-06-30
申请人： Intel Corporation
发明人： Thushara Hewavithana , Bernard Arambepola
IPC分类号： H04L25/02 , H04L25/03 , H04L27/26
摘要： An inter-carrier interference (ICI) mitigation circuit associated with an orthogonal frequency division multiplexing (OFDM) receiver is disclosed. The ICI mitigation circuit comprises an ICI cancellation circuit configured to receive an OFDM symbol associated with an OFDM signal and determine an ICI associated with one or more OFDM subcarriers within the OFDM symbol. The ICI cancellation circuit is further configured to cancel the ICI from the one or more OFDM subcarriers associated with the OFDM symbol, in order to generate a desired OFDM symbol. In some embodiments, the ICI is determined and cancelled at the ICI cancellation circuit, in accordance with a predetermined ICI mitigation algorithm.

7. 发明授权

US09742610B2 Adaptive channel prediction and mitigating interference in OFDM systems 有权
公开(公告)号：US09742610B2
公开(公告)日：2017-08-22
申请号：US15069312
申请日：2016-03-14
申请人： Intel Corporation
发明人： Bernard Arambepola , Parveen K. Shukla , Thushara Hewavithana
IPC分类号： H04L27/26 , H04L5/00 , H04L25/02 , H04L25/03
CPC分类号： H04L27/2646 , H04L5/0007 , H04L25/0218 , H04L25/022 , H04L25/0232 , H04L25/03343 , H04L27/2607 , H04L27/2613 , H04L27/2647 , H04L27/2665 , H04L27/2678
摘要： One embodiment provides an apparatus. The apparatus includes an optimization module configured to determine a guard interval remainder based, at least in part on a comparison of an allowable microreflection interference level and an actual microreflection interference level; and a windowing module configured to window an OFDM (orthogonal frequency division multiplexed) symbol utilizing the guard interval remainder. The apparatus may further include a channel estimator module configured to determine a predicted channel frequency response based, at least in part, on a probing symbol; and a pre-equalizer module configured to pre-equalize the OFDM symbol based, at least in part, on the predicted channel frequency response.

8. 发明授权

US08938041B2 Techniques for managing interference in multiple channel communications system 有权
标题翻译：用于管理多通道通信系统中的干扰的技术
公开(公告)号：US08938041B2
公开(公告)日：2015-01-20
申请号：US13718812
申请日：2012-12-18
申请人： Intel Corporation
发明人： Bernard Arambepola , Thushara Hewavithana
IPC分类号： H04B1/10
CPC分类号： H04L27/0008 , H04L5/0007 , H04L5/0028 , H04L5/0062 , H04L27/0006 , H04L27/2626 , H04L27/362
摘要： An apparatus may include a processor circuit, and a dynamic filter adjustment component for execution on the processor. The dynamic filter adjustment component may identify in a wideband communications signal a set of one or more interferer frequencies for one or more respective interferer channels of a set of communications channels to be filtered, select a kernel filter comprising a low pass filter having a channel width corresponding to a channel of the one or more interferer channels, and generate a co-channel interference (CCI) filter to stop the one or more interferer channels by inverting the kernel filter. Other embodiments are described and claimed.
摘要翻译：设备可以包括处理器电路和用于在处理器上执行的动态滤波器调整组件。动态滤波器调整组件可以在宽带通信信号中识别要被滤波的一组通信信道中的一个或多个相应干扰信道的一个或多个干扰信号频率的集合，选择包括低通滤波器的核心滤波器，该低通滤波器具有信道宽度对应于一个或多个干扰信道的信道，并且产生同信道干扰（CCI）滤波器，以通过反转内核滤波器来停止一个或多个干扰信道。描述和要求保护其他实施例。

9. 发明授权

US08929471B2 Methods and systems to mitigate impulse interference 有权
标题翻译：减少冲击干扰的方法和系统
公开(公告)号：US08929471B2
公开(公告)日：2015-01-06
申请号：US13661817
申请日：2012-10-26
申请人： Intel Corporation
发明人： Thushara Hewavithana , Bernard Arambepola , Sahan Gamage
IPC分类号： H04L5/12 , H04L23/02
CPC分类号： H04L27/38 , H04L25/067 , H04L27/2649
摘要： Methods and systems to mitigate impulse interference in an OFDM QAM signal. A per-symbol noise measure, or quality measure (QM) is computed for a symbol k as a MSE of distances between carriers in the symbol and points of corresponding QAM constellations. MSE(k) is averaged over multiple symbols to compute a background signal QM, AVG_MSE(k). If MSE(k) exceeds AVG_MSE(k) by a moderate amount, symbol k may be moderately affected by impulse interference, and per-carrier SNR estimates are downgraded for all data carriers in symbol k, prior to LLR computation. SNR downgrading may be linear or step-wise based on an extent to which MSE(k) exceeds AVG_MSE(k). If MSE(k) exceeds AVG_MSE(k) by a significant amount, symbol k may be significantly affected by impulse interference, and LLRs may be set to indicate that all data carriers are erased in symbol k.
摘要翻译：减少OFDM QAM信号脉冲干扰的方法和系统。针对符号k计算每符号噪声测量或质量测量（QM），作为符号中的载波与相应QAM星座的点之间的距离的MSE。 MSE（k）在多个符号之间进行平均以计算背景信号QM，AVG_MSE（k）。如果MSE（k）超过AVG_MSE（k）中等量，则符号k可能受脉冲干扰的适度影响，并且在LLR计算之前，符号k中的所有数据载波的每载波SNR估计被降级。基于MSE（k）超过AVG_MSE（k）的程度，SNR降级可以是线性的或逐步的。如果MSE（k）超过AVG_MSE（k）大量，则符号k可能受脉冲干扰的显着影响，并且可以将LLR设置为指示所有数据载体在符号k中被擦除。

10. 发明授权

US11546578B2 Method and apparatus for controlling a gain of an amplifier of a cable modem 有权
公开(公告)号：US11546578B2
公开(公告)日：2023-01-03
申请号：US16976082
申请日：2019-05-06
申请人： Intel Corporation
发明人： Walter Bschor , Thushara Hewavithana , Boaz Kol
IPC分类号： H04N17/04 , H04N21/61 , H04L5/14 , H04N21/442
摘要： A method and apparatus for controlling a gain of an amplifier of a cable modem operating in a full duplex (FDX) mode. A cable modem includes an amplifier configured to amplify a received signal, a power meter configured to measure a power of the received signal on a plurality of channels, and a control unit configured to estimate a maximum expected power to receive on the plurality of channels based on the measured power and set a gain of the amplifier based on the maximum expected power. The cable modem is configured to operate in a full duplex mode. The channels include a full duplex upstream channel, a full duplex downstream channel, and a legacy downstream channel. The maximum expected power may be estimated via a sounding procedure. A power spectral density may be measured and the maximum expected power may be derived from the power spectral density.

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