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1. 发明授权

US09000843B2 Power management in transceivers 有权
标题翻译：收发器电源管理
公开(公告)号：US09000843B2
公开(公告)日：2015-04-07
申请号：US14255444
申请日：2014-04-17
申请人： Intel Corporation
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H03G3/00 , H03F3/04 , H03F1/02 , H03F3/24 , H03G3/20 , H03G3/30
CPC分类号： H03F3/24 , H03F1/0211 , H03F1/0216 , H03F2200/294 , H03F2200/504 , H03F2203/20 , H03G3/20 , H03G3/3042 , H03G3/3047
摘要： Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.
摘要翻译：各种实施例涉及用于产生表示调制数据的第一信号和表示调制数据的幅度的第二信号，第一信号和第二信号以依赖于输出信号并将电源电压改变为增益的装置和方法与调制数据的幅度成比例。

2. 发明授权

US11588454B2 Power management in transceivers 有权
公开(公告)号：US11588454B2
公开(公告)日：2023-02-21
申请号：US16925948
申请日：2020-07-10
申请人： Intel Corporation
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H03F3/24 , H03G3/30 , H03F1/02 , H03G3/20
摘要： Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

3. 发明申请

US20180270948A1 DECOUPLING ARRANGEMENT 审中-公开
公开(公告)号：US20180270948A1
公开(公告)日：2018-09-20
申请号：US15675883
申请日：2017-08-14
申请人： Intel Corporation
发明人： William L. Barber , Keith Pinson , Andrew P. Collins , Boping Wu , Isaac Ali , Colin L. Perry
IPC分类号： H05K1/02 , H02H9/04 , H01L23/50
CPC分类号： H05K1/0231 , H01L23/50 , H01L2924/0002 , H02H9/04 , H05K1/025 , H05K2201/09672 , H01L2924/00
摘要： In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.

4. 发明授权

US10015878B2 Decoupling arrangement 有权
公开(公告)号：US10015878B2
公开(公告)日：2018-07-03
申请号：US14945762
申请日：2015-11-19
申请人： Intel Corporation
发明人： William L. Barber , Keith Pinson , Andrew P. Collins , Boping Wu , Isaac Ali , Colin L. Perry
IPC分类号： H02H9/04 , H05K1/02 , H01L23/50
CPC分类号： H05K1/0231 , H01L23/50 , H01L2924/0002 , H02H9/04 , H05K1/025 , H05K2201/09672 , H01L2924/00
摘要： In various embodiments, apparatuses and methods are disclosed that may be able to implement a multi-layer, three dimensional routing between a decoupling component and an input port for a SoC or MCM. A three dimensional (3D) structure may provide a defined current return path from the decoupling component to the input port. The current return path may be constrained by design to provide an equal and opposite electromagnetic flux to the input port thereby reducing series inductance between the input port and the decoupling component.

5. 发明授权

US10715092B2 Power management in transceivers 有权
公开(公告)号：US10715092B2
公开(公告)日：2020-07-14
申请号：US16251476
申请日：2019-01-18
申请人： INTEL CORPORATION
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H03F3/24 , H03G3/30 , H03F1/02 , H03G3/20
摘要： Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

6. 发明授权

US10224883B2 Power management in transceivers 有权
公开(公告)号：US10224883B2
公开(公告)日：2019-03-05
申请号：US15659857
申请日：2017-07-26
申请人： Intel Corporation
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H03F3/24 , H03G3/30 , H03F1/02 , H03G3/20
摘要： Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

7. 发明申请

US20180198425A1 POWER MANAGEMENT IN TRANSCEIVERS 审中-公开
公开(公告)号：US20180198425A1
公开(公告)日：2018-07-12
申请号：US15659857
申请日：2017-07-26
申请人： Intel Corporation
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H03F3/24 , H03G3/30 , H03G3/20 , H03F1/02
CPC分类号： H03F3/24 , H03F1/0211 , H03F1/0216 , H03F2200/294 , H03F2200/504 , H03F2203/20 , H03G3/20 , H03G3/3042 , H03G3/3047
摘要： Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

8. 发明申请

US20150295550A1 POWER MANAGEMENT IN TRANSCEIVERS 审中-公开
标题翻译：收银机电力管理
公开(公告)号：US20150295550A1
公开(公告)日：2015-10-15
申请号：US14643164
申请日：2015-03-10
申请人： Intel Corporation
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H03F3/24 , H03F1/02 , H03G3/30
CPC分类号： H03F3/24 , H03F1/0211 , H03F1/0216 , H03F2200/294 , H03F2200/504 , H03F2203/20 , H03G3/20 , H03G3/3042 , H03G3/3047
摘要： Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.
摘要翻译：各种实施例涉及用于产生表示调制数据的第一信号和表示调制数据的幅度的第二信号，第一信号和第二信号以依赖于输出信号并将电源电压改变为增益的装置和方法与调制数据的幅度成比例。

9. 发明申请

US20140349714A1 SYSTEM FOR ANALOG TO DIGITAL CONVERSION WITH IMPROVED SPURIOUS FREE DYNAMIC RANGE 有权
标题翻译：用于模拟数字转换的系统，具有改进的免费动态范围
公开(公告)号：US20140349714A1
公开(公告)日：2014-11-27
申请号：US13995211
申请日：2012-05-01
申请人： INTEL CORPORATION
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H03M1/12 , H03B28/00 , H03H7/01
CPC分类号： H03M1/124 , H03B28/00 , H03H7/01 , H03M1/0626 , H03M1/1215
摘要： Generally, this disclosure describes an apparatus, systems and methods for analog to digital conversion with improved spurious free dynamic range. The system includes a segmented ADC circuit with a plurality of interleaved ADC segments, the segmented ADC circuit configured to generate a digital signal including a channel with an associated channel frequency; a frequency down-converter circuit coupled to the segmented ADC circuit, the frequency down-converter circuit configured to frequency shift the digital signal by a frequency offset; a spur frequency prediction circuit coupled to the frequency down-converter circuit, the spur frequency prediction circuit configured to predict frequencies of spurs generated by the ADC segments, the prediction based on the number of ADC segments and based on the sampling rate of the digital signal; the spur frequency prediction circuit further configured to generate the frequency offset based on the predicted spur frequencies and based on a frequency band of the channel; and a filter circuit coupled to the frequency down-converter circuit, the filter circuit configured to remove one or more of the spurs from the frequency shifted digital signal to generate a filtered signal.
摘要翻译：通常，本公开描述了具有改进的无杂散动态范围的用于模数转换的装置，系统和方法。该系统包括具有多个交错ADC段的分段ADC电路，分段ADC电路被配置为生成包括具有相关信道频率的信道的数字信号; 所述降频转换器电路被耦合到所述分段ADC电路，所述降频转换器电路被配置为使所述数字信号频率偏移频率偏移; 耦合到所述降频转换器电路的杂散频率预测电路，所述杂散频率预测电路被配置为预测由所述ADC段产生的杂散的频率，所述预测基于所述ADC段的数量，并且基于所述数字信号的采样率 ; 所述杂音频率预测电路还被配置为基于所述预测的杂散频率并且基于所述信道的频带来生成所述频率偏移; 以及耦合到所述降频转换器电路的滤波器电路，所述滤波器电路被配置为从所述频移数字信号中去除所述杂波中的一个或多个以产生经滤波的信号。

10. 发明授权

US09729112B2 Power management in transceivers 有权
公开(公告)号：US09729112B2
公开(公告)日：2017-08-08
申请号：US14643164
申请日：2015-03-10
申请人： Intel Corporation
发明人： Nicholas P. Cowley , Isaac Ali , William L. Barber
IPC分类号： H03G3/00 , H03F3/04 , H03F3/24 , H03G3/30 , H03F1/02 , H03G3/20
CPC分类号： H03F3/24 , H03F1/0211 , H03F1/0216 , H03F2200/294 , H03F2200/504 , H03F2203/20 , H03G3/20 , H03G3/3042 , H03G3/3047
摘要： Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

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