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1. 发明授权

US10459516B2 Staged power distribution control 有权
公开(公告)号：US10459516B2
公开(公告)日：2019-10-29
申请号：US15670421
申请日：2017-08-07
申请人： Intel Corporation
发明人： Reed D. Vilhauer , William T. Glennan
IPC分类号： G06F1/3287 , G06F1/3234 , G06F1/3212 , G06F1/3293 , G06F1/3296
摘要： Various embodiments are directed to restrictions in portable computing device electric power to accommodate reductions in the voltage level of a power source. An apparatus comprises a controller caused to receive configuration data from a main processor circuit specifying a voltage level threshold and selected action to take to reduce electric power to a first component in response to the voltage level falling below the first voltage level threshold, recurringly monitor the voltage level; based on the voltage level falling below the first voltage level threshold, take the first selected action and transmit a signal to the main processor circuit indicating that the voltage level has fallen below the first voltage level threshold and that the first selected action has been taken; transmit the voltage level to the main processor circuit; receive a signal from the main processor circuit to undo the first selected action; and so undo.

2. 发明申请

US20180090468A1 INTEGRATED CIRCUIT PACKAGE ASSEMBLY WITH WIRE END ABOVE A TOPMOST COMPONENT 有权
公开(公告)号：US20180090468A1
公开(公告)日：2018-03-29
申请号：US15280860
申请日：2016-09-29
申请人： Intel Corporation
发明人： William T. Glennan , Frank D. Madrigal
IPC分类号： H01L25/065 , H01L23/31 , H01L23/00 , H01L23/498 , H01L21/56 , H01L25/00 , H01L25/18 , H01L21/66
CPC分类号： H01L25/0657 , H01L21/56 , H01L22/32 , H01L23/3128 , H01L23/49838 , H01L24/05 , H01L24/49 , H01L24/85 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/32225 , H01L2224/432 , H01L2224/48091 , H01L2224/48106 , H01L2224/48147 , H01L2224/48227 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06555 , H01L2225/06575 , H01L2225/06596 , H01L2924/1433 , H01L2924/1436 , H01L2924/1443 , H01L2924/15311 , H01L2924/19042 , H01L2924/19105 , H01L2924/00
摘要： Embodiments of the present disclosure describe integrated circuit (IC) package assemblies having one or more wires that extend beyond a topmost component in the IC package assembly, computing devices incorporating the IC package assemblies, methods for formation of the IC package assemblies, and associated configurations. An IC package assembly may include a substrate having a first side and a second side opposite the first side, an IC die having a first side and a second side opposite the first side, where the first side of the IC die faces the first side of the substrate, a wire electrically coupled with the IC die, where an end of the wire extends beyond a topmost component in the IC package assembly, and an overmold coupled with the topmost component. Other embodiments may be described and/or claimed.

3. 发明授权

US09727122B2 Staged power distribution control 有权
公开(公告)号：US09727122B2
公开(公告)日：2017-08-08
申请号：US14789827
申请日：2015-07-01
申请人： Intel Corporation
发明人： Reed D. Vilhauer , William T. Glennan
IPC分类号： G06F1/32
CPC分类号： G06F1/3287 , G06F1/3212 , G06F1/3234 , G06F1/3243 , G06F1/3293 , G06F1/3296 , Y02D10/122 , Y02D10/152 , Y02D10/174
摘要： Various embodiments are directed to restrictions in portable computing device electric power to accommodate reductions in the voltage level of a power source. An apparatus comprises a controller caused to receive configuration data from a main processor circuit specifying a voltage level threshold and selected action to take to reduce electric power to a first component in response to the voltage level falling below the first voltage level threshold, recurringly monitor the voltage level; based on the voltage level falling below the first voltage level threshold, take the first selected action and transmit a signal to the main processor circuit indicating that the voltage level has fallen below the first voltage level threshold and that the first selected action has been taken; transmit the voltage level to the main processor circuit; receive a signal from the main processor circuit to undo the first selected action; and so undo.

4. 发明授权

US10416241B2 Battery life estimation based on multiple locations 有权
公开(公告)号：US10416241B2
公开(公告)日：2019-09-17
申请号：US15529332
申请日：2015-11-20
申请人： INTEL CORPORATION
发明人： Naoki Matsumura , Allen Huang , Gang Ji , Brian C. Fritz , William T. Glennan , Ramakrishna Ram Pallala , Hung T. Tran
IPC分类号： G01R31/392 , G01R31/374 , G01R31/371 , G01R31/382 , G01S19/42 , G01S5/00 , G01K1/00 , G01R31/36
摘要： In embodiments, an apparatus may include a battery life monitor. The battery life monitor may, in some embodiments, receive a battery level indicator indicative of a current charge level of a battery that is coupled with the apparatus and a first temperature that may indicate a temperature of a current location of the apparatus. The battery life monitor may also receive one or more additional temperatures that indicate respective temperatures of one or more locations in which the apparatus is likely to be operated prior to discharge of the current charge level of the battery. Based at least in part on the current charge level, the first temperature indicator, and the one or more additional temperatures, the battery life monitor may calculate one or more battery life estimates that correspond with the one or more locations. Other embodiments may be described and/or claimed.

5. 发明授权

US09098280B2 Staged power distribution control 有权
标题翻译：分期配电控制
公开(公告)号：US09098280B2
公开(公告)日：2015-08-04
申请号：US13729452
申请日：2012-12-28
申请人： Intel Corporation
发明人： Reed D. Vilhauer , William T. Glennan
IPC分类号： G06F1/32
CPC分类号： G06F1/3287 , G06F1/3212 , G06F1/3234 , G06F1/3243 , G06F1/3293 , G06F1/3296 , Y02D10/122 , Y02D10/152 , Y02D10/174
摘要： Various embodiments are directed to restrictions in portable computing device electric power to accommodate reductions in the voltage level of a power source. An apparatus comprises a controller caused to receive configuration data from a main processor circuit specifying a voltage level threshold and selected action to take to reduce electric power to a first component in response to the voltage level falling below the first voltage level threshold, recurringly monitor the voltage level; based on the voltage level falling below the first voltage level threshold, take the first selected action and transmit a signal to the main processor circuit indicating that the voltage level has fallen below the first voltage level threshold and that the first selected action has been taken; transmit the voltage level to the main processor circuit; receive a signal from the main processor circuit to undo the first selected action; and so undo.
摘要翻译：各种实施例涉及便携式计算设备电力中的限制以适应电源的电压电平的降低。一种装置包括控制器，用于接收来自指定电压电平门限的主处理器电路的配置数据，以及响应于低于第一电压电平阈值的电压电平来降低对第一部件的功率所采取的动作，经常监视电压电平; 基于低于第一电压电平阈值的电压电平，采取第一选择的动作并将信号发送到主处理器电路，指示电压电平已经低于第一电压电平门限，并且已经采取了第一选择的动作; 将电压电平传送到主处理器电路; 从主处理器电路接收信号以撤销第一选择的动作; 所以撤消。

6. 发明授权

US09978722B2 Integrated circuit package assembly with wire end above a topmost component 有权
公开(公告)号：US09978722B2
公开(公告)日：2018-05-22
申请号：US15280860
申请日：2016-09-29
申请人： Intel Corporation
发明人： William T. Glennan , Frank D. Madrigal
IPC分类号： H01L25/065 , H01L23/31 , H01L23/00 , H01L23/498 , H01L21/56 , H01L25/00 , H01L25/18 , H01L21/66
CPC分类号： H01L25/0657 , H01L21/56 , H01L22/32 , H01L23/3128 , H01L23/49838 , H01L24/05 , H01L24/49 , H01L24/85 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/32225 , H01L2224/432 , H01L2224/48091 , H01L2224/48106 , H01L2224/48147 , H01L2224/48227 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06555 , H01L2225/06575 , H01L2225/06596 , H01L2924/1433 , H01L2924/1436 , H01L2924/1443 , H01L2924/15311 , H01L2924/19042 , H01L2924/19105 , H01L2924/00
摘要： Embodiments of the present disclosure describe integrated circuit (IC) package assemblies having one or more wires that extend beyond a topmost component in the IC package assembly, computing devices incorporating the IC package assemblies, methods for formation of the IC package assemblies, and associated configurations. An IC package assembly may include a substrate having a first side and a second side opposite the first side, an IC die having a first side and a second side opposite the first side, where the first side of the IC die faces the first side of the substrate, a wire electrically coupled with the IC die, where an end of the wire extends beyond a topmost component in the IC package assembly, and an overmold coupled with the topmost component. Other embodiments may be described and/or claimed.

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